xref: /openbmc/linux/arch/arc/kernel/setup.c (revision 6aa7de05)
1 /*
2  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8 
9 #include <linux/seq_file.h>
10 #include <linux/fs.h>
11 #include <linux/delay.h>
12 #include <linux/root_dev.h>
13 #include <linux/clk.h>
14 #include <linux/clk-provider.h>
15 #include <linux/clocksource.h>
16 #include <linux/console.h>
17 #include <linux/module.h>
18 #include <linux/cpu.h>
19 #include <linux/of_fdt.h>
20 #include <linux/of.h>
21 #include <linux/cache.h>
22 #include <asm/sections.h>
23 #include <asm/arcregs.h>
24 #include <asm/tlb.h>
25 #include <asm/setup.h>
26 #include <asm/page.h>
27 #include <asm/irq.h>
28 #include <asm/unwind.h>
29 #include <asm/mach_desc.h>
30 #include <asm/smp.h>
31 
32 #define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))
33 
34 unsigned int intr_to_DE_cnt;
35 
36 /* Part of U-boot ABI: see head.S */
37 int __initdata uboot_tag;
38 char __initdata *uboot_arg;
39 
40 const struct machine_desc *machine_desc;
41 
42 struct task_struct *_current_task[NR_CPUS];	/* For stack switching */
43 
44 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
45 
46 static const struct id_to_str arc_cpu_rel[] = {
47 #ifdef CONFIG_ISA_ARCOMPACT
48 	{ 0x34, "R4.10"},
49 	{ 0x35, "R4.11"},
50 #else
51 	{ 0x51, "R2.0" },
52 	{ 0x52, "R2.1" },
53 	{ 0x53, "R3.0" },
54 	{ 0x54, "R4.0" },
55 #endif
56 	{ 0x00, NULL   }
57 };
58 
59 static const struct id_to_str arc_cpu_nm[] = {
60 #ifdef CONFIG_ISA_ARCOMPACT
61 	{ 0x20, "ARC 600"   },
62 	{ 0x30, "ARC 770"   },  /* 750 identified seperately */
63 #else
64 	{ 0x40, "ARC EM"  },
65 	{ 0x50, "ARC HS38"  },
66 	{ 0x54, "ARC HS48"  },
67 #endif
68 	{ 0x00, "Unknown"   }
69 };
70 
71 static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
72 {
73 	if (is_isa_arcompact()) {
74 		struct bcr_iccm_arcompact iccm;
75 		struct bcr_dccm_arcompact dccm;
76 
77 		READ_BCR(ARC_REG_ICCM_BUILD, iccm);
78 		if (iccm.ver) {
79 			cpu->iccm.sz = 4096 << iccm.sz;	/* 8K to 512K */
80 			cpu->iccm.base_addr = iccm.base << 16;
81 		}
82 
83 		READ_BCR(ARC_REG_DCCM_BUILD, dccm);
84 		if (dccm.ver) {
85 			unsigned long base;
86 			cpu->dccm.sz = 2048 << dccm.sz;	/* 2K to 256K */
87 
88 			base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
89 			cpu->dccm.base_addr = base & ~0xF;
90 		}
91 	} else {
92 		struct bcr_iccm_arcv2 iccm;
93 		struct bcr_dccm_arcv2 dccm;
94 		unsigned long region;
95 
96 		READ_BCR(ARC_REG_ICCM_BUILD, iccm);
97 		if (iccm.ver) {
98 			cpu->iccm.sz = 256 << iccm.sz00;	/* 512B to 16M */
99 			if (iccm.sz00 == 0xF && iccm.sz01 > 0)
100 				cpu->iccm.sz <<= iccm.sz01;
101 
102 			region = read_aux_reg(ARC_REG_AUX_ICCM);
103 			cpu->iccm.base_addr = region & 0xF0000000;
104 		}
105 
106 		READ_BCR(ARC_REG_DCCM_BUILD, dccm);
107 		if (dccm.ver) {
108 			cpu->dccm.sz = 256 << dccm.sz0;
109 			if (dccm.sz0 == 0xF && dccm.sz1 > 0)
110 				cpu->dccm.sz <<= dccm.sz1;
111 
112 			region = read_aux_reg(ARC_REG_AUX_DCCM);
113 			cpu->dccm.base_addr = region & 0xF0000000;
114 		}
115 	}
116 }
117 
118 static void read_arc_build_cfg_regs(void)
119 {
120 	struct bcr_timer timer;
121 	struct bcr_generic bcr;
122 	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
123 	const struct id_to_str *tbl;
124 	struct bcr_isa_arcv2 isa;
125 
126 	FIX_PTR(cpu);
127 
128 	READ_BCR(AUX_IDENTITY, cpu->core);
129 
130 	for (tbl = &arc_cpu_rel[0]; tbl->id != 0; tbl++) {
131 		if (cpu->core.family == tbl->id) {
132 			cpu->details = tbl->str;
133 			break;
134 		}
135 	}
136 
137 	for (tbl = &arc_cpu_nm[0]; tbl->id != 0; tbl++) {
138 		if ((cpu->core.family & 0xF4) == tbl->id)
139 			break;
140 	}
141 	cpu->name = tbl->str;
142 
143 	READ_BCR(ARC_REG_TIMERS_BCR, timer);
144 	cpu->extn.timer0 = timer.t0;
145 	cpu->extn.timer1 = timer.t1;
146 	cpu->extn.rtc = timer.rtc;
147 
148 	cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
149 
150 	READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
151 
152 	cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
153 	cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
154 	cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0;        /* 1,3 */
155 	cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
156 	cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
157 	cpu->extn.swape = (cpu->core.family >= 0x34) ? 1 :
158 				IS_ENABLED(CONFIG_ARC_HAS_SWAPE);
159 
160 	READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
161 
162 	/* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
163 	read_decode_ccm_bcr(cpu);
164 
165 	read_decode_mmu_bcr();
166 	read_decode_cache_bcr();
167 
168 	if (is_isa_arcompact()) {
169 		struct bcr_fp_arcompact sp, dp;
170 		struct bcr_bpu_arcompact bpu;
171 
172 		READ_BCR(ARC_REG_FP_BCR, sp);
173 		READ_BCR(ARC_REG_DPFP_BCR, dp);
174 		cpu->extn.fpu_sp = sp.ver ? 1 : 0;
175 		cpu->extn.fpu_dp = dp.ver ? 1 : 0;
176 
177 		READ_BCR(ARC_REG_BPU_BCR, bpu);
178 		cpu->bpu.ver = bpu.ver;
179 		cpu->bpu.full = bpu.fam ? 1 : 0;
180 		if (bpu.ent) {
181 			cpu->bpu.num_cache = 256 << (bpu.ent - 1);
182 			cpu->bpu.num_pred = 256 << (bpu.ent - 1);
183 		}
184 	} else {
185 		struct bcr_fp_arcv2 spdp;
186 		struct bcr_bpu_arcv2 bpu;
187 
188 		READ_BCR(ARC_REG_FP_V2_BCR, spdp);
189 		cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
190 		cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
191 
192 		READ_BCR(ARC_REG_BPU_BCR, bpu);
193 		cpu->bpu.ver = bpu.ver;
194 		cpu->bpu.full = bpu.ft;
195 		cpu->bpu.num_cache = 256 << bpu.bce;
196 		cpu->bpu.num_pred = 2048 << bpu.pte;
197 
198 		if (cpu->core.family >= 0x54) {
199 			unsigned int exec_ctrl;
200 
201 			READ_BCR(AUX_EXEC_CTRL, exec_ctrl);
202 			cpu->extn.dual_iss_exist = 1;
203 			cpu->extn.dual_iss_enb = exec_ctrl & 1;
204 		}
205 	}
206 
207 	READ_BCR(ARC_REG_AP_BCR, bcr);
208 	cpu->extn.ap = bcr.ver ? 1 : 0;
209 
210 	READ_BCR(ARC_REG_SMART_BCR, bcr);
211 	cpu->extn.smart = bcr.ver ? 1 : 0;
212 
213 	READ_BCR(ARC_REG_RTT_BCR, bcr);
214 	cpu->extn.rtt = bcr.ver ? 1 : 0;
215 
216 	cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
217 
218 	READ_BCR(ARC_REG_ISA_CFG_BCR, isa);
219 
220 	/* some hacks for lack of feature BCR info in old ARC700 cores */
221 	if (is_isa_arcompact()) {
222 		if (!isa.ver)	/* ISA BCR absent, use Kconfig info */
223 			cpu->isa.atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
224 		else {
225 			/* ARC700_BUILD only has 2 bits of isa info */
226 			struct bcr_generic bcr = *(struct bcr_generic *)&isa;
227 			cpu->isa.atomic = bcr.info & 1;
228 		}
229 
230 		cpu->isa.be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
231 
232 		 /* there's no direct way to distinguish 750 vs. 770 */
233 		if (unlikely(cpu->core.family < 0x34 || cpu->mmu.ver < 3))
234 			cpu->name = "ARC750";
235 	} else {
236 		cpu->isa = isa;
237 	}
238 }
239 
240 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
241 {
242 	struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
243 	struct bcr_identity *core = &cpu->core;
244 	int i, n = 0;
245 
246 	FIX_PTR(cpu);
247 
248 	n += scnprintf(buf + n, len - n,
249 		       "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
250 		       core->family, core->cpu_id, core->chip_id);
251 
252 	n += scnprintf(buf + n, len - n, "processor [%d]\t: %s %s (%s ISA) %s%s%s\n",
253 		       cpu_id, cpu->name, cpu->details,
254 		       is_isa_arcompact() ? "ARCompact" : "ARCv2",
255 		       IS_AVAIL1(cpu->isa.be, "[Big-Endian]"),
256 		       IS_AVAIL3(cpu->extn.dual_iss_exist, cpu->extn.dual_iss_enb, " Dual-Issue"));
257 
258 	n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t: ",
259 		       IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
260 		       IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
261 		       IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT),
262 		       IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT));
263 
264 	n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
265 			   IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
266 			   IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
267 			   IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
268 
269 	if (i)
270 		n += scnprintf(buf + n, len - n, "\n\t\t: ");
271 
272 	if (cpu->extn_mpy.ver) {
273 		if (cpu->extn_mpy.ver <= 0x2) {	/* ARCompact */
274 			n += scnprintf(buf + n, len - n, "mpy ");
275 		} else {
276 			int opt = 2;	/* stock MPY/MPYH */
277 
278 			if (cpu->extn_mpy.dsp)	/* OPT 7-9 */
279 				opt = cpu->extn_mpy.dsp + 6;
280 
281 			n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
282 		}
283 	}
284 
285 	n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
286 		       IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
287 		       IS_AVAIL1(cpu->extn.norm, "norm "),
288 		       IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
289 		       IS_AVAIL1(cpu->extn.swap, "swap "),
290 		       IS_AVAIL1(cpu->extn.minmax, "minmax "),
291 		       IS_AVAIL1(cpu->extn.crc, "crc "),
292 		       IS_AVAIL2(cpu->extn.swape, "swape", CONFIG_ARC_HAS_SWAPE));
293 
294 	if (cpu->bpu.ver)
295 		n += scnprintf(buf + n, len - n,
296 			      "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
297 			      IS_AVAIL1(cpu->bpu.full, "full"),
298 			      IS_AVAIL1(!cpu->bpu.full, "partial"),
299 			      cpu->bpu.num_cache, cpu->bpu.num_pred);
300 
301 	return buf;
302 }
303 
304 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
305 {
306 	int n = 0;
307 	struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
308 
309 	FIX_PTR(cpu);
310 
311 	n += scnprintf(buf + n, len - n, "Vector Table\t: %#x\n", cpu->vec_base);
312 
313 	if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
314 		n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
315 			       IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
316 			       IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
317 
318 	if (cpu->extn.debug)
319 		n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
320 			       IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
321 			       IS_AVAIL1(cpu->extn.smart, "smaRT "),
322 			       IS_AVAIL1(cpu->extn.rtt, "RTT "));
323 
324 	if (cpu->dccm.sz || cpu->iccm.sz)
325 		n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
326 			       cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
327 			       cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
328 
329 	n += scnprintf(buf + n, len - n, "OS ABI [v%d]\t: %s\n",
330 			EF_ARC_OSABI_CURRENT >> 8,
331 			EF_ARC_OSABI_CURRENT == EF_ARC_OSABI_V3 ?
332 			"no-legacy-syscalls" : "64-bit data any register aligned");
333 
334 	return buf;
335 }
336 
337 static void arc_chk_core_config(void)
338 {
339 	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
340 	int saved = 0, present = 0;
341 	char *opt_nm = NULL;;
342 
343 	if (!cpu->extn.timer0)
344 		panic("Timer0 is not present!\n");
345 
346 	if (!cpu->extn.timer1)
347 		panic("Timer1 is not present!\n");
348 
349 #ifdef CONFIG_ARC_HAS_DCCM
350 	/*
351 	 * DCCM can be arbit placed in hardware.
352 	 * Make sure it's placement/sz matches what Linux is built with
353 	 */
354 	if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
355 		panic("Linux built with incorrect DCCM Base address\n");
356 
357 	if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
358 		panic("Linux built with incorrect DCCM Size\n");
359 #endif
360 
361 #ifdef CONFIG_ARC_HAS_ICCM
362 	if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
363 		panic("Linux built with incorrect ICCM Size\n");
364 #endif
365 
366 	/*
367 	 * FP hardware/software config sanity
368 	 * -If hardware present, kernel needs to save/restore FPU state
369 	 * -If not, it will crash trying to save/restore the non-existant regs
370 	 */
371 
372 	if (is_isa_arcompact()) {
373 		opt_nm = "CONFIG_ARC_FPU_SAVE_RESTORE";
374 		saved = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
375 
376 		/* only DPDP checked since SP has no arch visible regs */
377 		present = cpu->extn.fpu_dp;
378 	} else {
379 		opt_nm = "CONFIG_ARC_HAS_ACCL_REGS";
380 		saved = IS_ENABLED(CONFIG_ARC_HAS_ACCL_REGS);
381 
382 		/* Accumulator Low:High pair (r58:59) present if DSP MPY or FPU */
383 		present = cpu->extn_mpy.dsp | cpu->extn.fpu_sp | cpu->extn.fpu_dp;
384 	}
385 
386 	if (present && !saved)
387 		pr_warn("Enable %s for working apps\n", opt_nm);
388 	else if (!present && saved)
389 		panic("Disable %s, hardware NOT present\n", opt_nm);
390 }
391 
392 /*
393  * Initialize and setup the processor core
394  * This is called by all the CPUs thus should not do special case stuff
395  *    such as only for boot CPU etc
396  */
397 
398 void setup_processor(void)
399 {
400 	char str[512];
401 	int cpu_id = smp_processor_id();
402 
403 	read_arc_build_cfg_regs();
404 	arc_init_IRQ();
405 
406 	pr_info("%s", arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
407 
408 	arc_mmu_init();
409 	arc_cache_init();
410 
411 	pr_info("%s", arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
412 	pr_info("%s", arc_platform_smp_cpuinfo());
413 
414 	arc_chk_core_config();
415 }
416 
417 static inline int is_kernel(unsigned long addr)
418 {
419 	if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
420 		return 1;
421 	return 0;
422 }
423 
424 void __init setup_arch(char **cmdline_p)
425 {
426 #ifdef CONFIG_ARC_UBOOT_SUPPORT
427 	/* make sure that uboot passed pointer to cmdline/dtb is valid */
428 	if (uboot_tag && is_kernel((unsigned long)uboot_arg))
429 		panic("Invalid uboot arg\n");
430 
431 	/* See if u-boot passed an external Device Tree blob */
432 	machine_desc = setup_machine_fdt(uboot_arg);	/* uboot_tag == 2 */
433 	if (!machine_desc)
434 #endif
435 	{
436 		/* No, so try the embedded one */
437 		machine_desc = setup_machine_fdt(__dtb_start);
438 		if (!machine_desc)
439 			panic("Embedded DT invalid\n");
440 
441 		/*
442 		 * If we are here, it is established that @uboot_arg didn't
443 		 * point to DT blob. Instead if u-boot says it is cmdline,
444 		 * append to embedded DT cmdline.
445 		 * setup_machine_fdt() would have populated @boot_command_line
446 		 */
447 		if (uboot_tag == 1) {
448 			/* Ensure a whitespace between the 2 cmdlines */
449 			strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
450 			strlcat(boot_command_line, uboot_arg,
451 				COMMAND_LINE_SIZE);
452 		}
453 	}
454 
455 	/* Save unparsed command line copy for /proc/cmdline */
456 	*cmdline_p = boot_command_line;
457 
458 	/* To force early parsing of things like mem=xxx */
459 	parse_early_param();
460 
461 	/* Platform/board specific: e.g. early console registration */
462 	if (machine_desc->init_early)
463 		machine_desc->init_early();
464 
465 	smp_init_cpus();
466 
467 	setup_processor();
468 	setup_arch_memory();
469 
470 	/* copy flat DT out of .init and then unflatten it */
471 	unflatten_and_copy_device_tree();
472 
473 	/* Can be issue if someone passes cmd line arg "ro"
474 	 * But that is unlikely so keeping it as it is
475 	 */
476 	root_mountflags &= ~MS_RDONLY;
477 
478 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
479 	conswitchp = &dummy_con;
480 #endif
481 
482 	arc_unwind_init();
483 }
484 
485 /*
486  * Called from start_kernel() - boot CPU only
487  */
488 void __init time_init(void)
489 {
490 	of_clk_init(NULL);
491 	timer_probe();
492 }
493 
494 static int __init customize_machine(void)
495 {
496 	if (machine_desc->init_machine)
497 		machine_desc->init_machine();
498 
499 	return 0;
500 }
501 arch_initcall(customize_machine);
502 
503 static int __init init_late_machine(void)
504 {
505 	if (machine_desc->init_late)
506 		machine_desc->init_late();
507 
508 	return 0;
509 }
510 late_initcall(init_late_machine);
511 /*
512  *  Get CPU information for use by the procfs.
513  */
514 
515 #define cpu_to_ptr(c)	((void *)(0xFFFF0000 | (unsigned int)(c)))
516 #define ptr_to_cpu(p)	(~0xFFFF0000UL & (unsigned int)(p))
517 
518 static int show_cpuinfo(struct seq_file *m, void *v)
519 {
520 	char *str;
521 	int cpu_id = ptr_to_cpu(v);
522 	struct device *cpu_dev = get_cpu_device(cpu_id);
523 	struct clk *cpu_clk;
524 	unsigned long freq = 0;
525 
526 	if (!cpu_online(cpu_id)) {
527 		seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
528 		goto done;
529 	}
530 
531 	str = (char *)__get_free_page(GFP_KERNEL);
532 	if (!str)
533 		goto done;
534 
535 	seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
536 
537 	cpu_clk = clk_get(cpu_dev, NULL);
538 	if (IS_ERR(cpu_clk)) {
539 		seq_printf(m, "CPU speed \t: Cannot get clock for processor [%d]\n",
540 			   cpu_id);
541 	} else {
542 		freq = clk_get_rate(cpu_clk);
543 	}
544 	if (freq)
545 		seq_printf(m, "CPU speed\t: %lu.%02lu Mhz\n",
546 			   freq / 1000000, (freq / 10000) % 100);
547 
548 	seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
549 		   loops_per_jiffy / (500000 / HZ),
550 		   (loops_per_jiffy / (5000 / HZ)) % 100);
551 
552 	seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
553 	seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
554 	seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
555 	seq_printf(m, arc_platform_smp_cpuinfo());
556 
557 	free_page((unsigned long)str);
558 done:
559 	seq_printf(m, "\n");
560 
561 	return 0;
562 }
563 
564 static void *c_start(struct seq_file *m, loff_t *pos)
565 {
566 	/*
567 	 * Callback returns cpu-id to iterator for show routine, NULL to stop.
568 	 * However since NULL is also a valid cpu-id (0), we use a round-about
569 	 * way to pass it w/o having to kmalloc/free a 2 byte string.
570 	 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
571 	 */
572 	return *pos < nr_cpu_ids ? cpu_to_ptr(*pos) : NULL;
573 }
574 
575 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
576 {
577 	++*pos;
578 	return c_start(m, pos);
579 }
580 
581 static void c_stop(struct seq_file *m, void *v)
582 {
583 }
584 
585 const struct seq_operations cpuinfo_op = {
586 	.start	= c_start,
587 	.next	= c_next,
588 	.stop	= c_stop,
589 	.show	= show_cpuinfo
590 };
591 
592 static DEFINE_PER_CPU(struct cpu, cpu_topology);
593 
594 static int __init topology_init(void)
595 {
596 	int cpu;
597 
598 	for_each_present_cpu(cpu)
599 	    register_cpu(&per_cpu(cpu_topology, cpu), cpu);
600 
601 	return 0;
602 }
603 
604 subsys_initcall(topology_init);
605