1 /* 2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9 #include <linux/seq_file.h> 10 #include <linux/fs.h> 11 #include <linux/delay.h> 12 #include <linux/root_dev.h> 13 #include <linux/console.h> 14 #include <linux/module.h> 15 #include <linux/cpu.h> 16 #include <linux/of_fdt.h> 17 #include <linux/cache.h> 18 #include <asm/sections.h> 19 #include <asm/arcregs.h> 20 #include <asm/tlb.h> 21 #include <asm/setup.h> 22 #include <asm/page.h> 23 #include <asm/irq.h> 24 #include <asm/unwind.h> 25 #include <asm/clk.h> 26 #include <asm/mach_desc.h> 27 28 #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x)) 29 30 int running_on_hw = 1; /* vs. on ISS */ 31 32 char __initdata command_line[COMMAND_LINE_SIZE]; 33 const struct machine_desc *machine_desc; 34 35 struct task_struct *_current_task[NR_CPUS]; /* For stack switching */ 36 37 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS]; 38 39 40 void read_arc_build_cfg_regs(void) 41 { 42 struct bcr_perip uncached_space; 43 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; 44 FIX_PTR(cpu); 45 46 READ_BCR(AUX_IDENTITY, cpu->core); 47 48 cpu->timers = read_aux_reg(ARC_REG_TIMERS_BCR); 49 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE); 50 51 READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space); 52 cpu->uncached_base = uncached_space.start << 24; 53 54 cpu->extn.mul = read_aux_reg(ARC_REG_MUL_BCR); 55 cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR); 56 cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR); 57 cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR); 58 cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR); 59 READ_BCR(ARC_REG_MAC_BCR, cpu->extn_mac_mul); 60 61 cpu->extn.ext_arith = read_aux_reg(ARC_REG_EXTARITH_BCR); 62 cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR); 63 64 /* Note that we read the CCM BCRs independent of kernel config 65 * This is to catch the cases where user doesn't know that 66 * CCMs are present in hardware build 67 */ 68 { 69 struct bcr_iccm iccm; 70 struct bcr_dccm dccm; 71 struct bcr_dccm_base dccm_base; 72 unsigned int bcr_32bit_val; 73 74 bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR); 75 if (bcr_32bit_val) { 76 iccm = *((struct bcr_iccm *)&bcr_32bit_val); 77 cpu->iccm.base_addr = iccm.base << 16; 78 cpu->iccm.sz = 0x2000 << (iccm.sz - 1); 79 } 80 81 bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR); 82 if (bcr_32bit_val) { 83 dccm = *((struct bcr_dccm *)&bcr_32bit_val); 84 cpu->dccm.sz = 0x800 << (dccm.sz); 85 86 READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base); 87 cpu->dccm.base_addr = dccm_base.addr << 8; 88 } 89 } 90 91 READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem); 92 93 read_decode_mmu_bcr(); 94 read_decode_cache_bcr(); 95 96 READ_BCR(ARC_REG_FP_BCR, cpu->fp); 97 READ_BCR(ARC_REG_DPFP_BCR, cpu->dpfp); 98 } 99 100 static const struct cpuinfo_data arc_cpu_tbl[] = { 101 { {0x10, "ARCTangent A5"}, 0x1F}, 102 { {0x20, "ARC 600" }, 0x2F}, 103 { {0x30, "ARC 700" }, 0x33}, 104 { {0x34, "ARC 700 R4.10"}, 0x34}, 105 { {0x00, NULL } } 106 }; 107 108 char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len) 109 { 110 int n = 0; 111 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id]; 112 struct bcr_identity *core = &cpu->core; 113 const struct cpuinfo_data *tbl; 114 int be = 0; 115 #ifdef CONFIG_CPU_BIG_ENDIAN 116 be = 1; 117 #endif 118 FIX_PTR(cpu); 119 120 n += scnprintf(buf + n, len - n, 121 "\nARC IDENTITY\t: Family [%#02x]" 122 " Cpu-id [%#02x] Chip-id [%#4x]\n", 123 core->family, core->cpu_id, 124 core->chip_id); 125 126 for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) { 127 if ((core->family >= tbl->info.id) && 128 (core->family <= tbl->up_range)) { 129 n += scnprintf(buf + n, len - n, 130 "processor\t: %s %s\n", 131 tbl->info.str, 132 be ? "[Big Endian]" : ""); 133 break; 134 } 135 } 136 137 if (tbl->info.id == 0) 138 n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n"); 139 140 n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n", 141 (unsigned int)(arc_get_core_freq() / 1000000), 142 (unsigned int)(arc_get_core_freq() / 10000) % 100); 143 144 n += scnprintf(buf + n, len - n, "Timers\t\t: %s %s\n", 145 (cpu->timers & 0x200) ? "TIMER1" : "", 146 (cpu->timers & 0x100) ? "TIMER0" : ""); 147 148 n += scnprintf(buf + n, len - n, "Vect Tbl Base\t: %#x\n", 149 cpu->vec_base); 150 151 n += scnprintf(buf + n, len - n, "UNCACHED Base\t: %#x\n", 152 cpu->uncached_base); 153 154 return buf; 155 } 156 157 static const struct id_to_str mul_type_nm[] = { 158 { 0x0, "N/A"}, 159 { 0x1, "32x32 (spl Result Reg)" }, 160 { 0x2, "32x32 (ANY Result Reg)" } 161 }; 162 163 static const struct id_to_str mac_mul_nm[] = { 164 {0x0, "N/A"}, 165 {0x1, "N/A"}, 166 {0x2, "Dual 16 x 16"}, 167 {0x3, "N/A"}, 168 {0x4, "32x16"}, 169 {0x5, "N/A"}, 170 {0x6, "Dual 16x16 and 32x16"} 171 }; 172 173 char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len) 174 { 175 int n = 0; 176 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id]; 177 178 FIX_PTR(cpu); 179 #define IS_AVAIL1(var, str) ((var) ? str : "") 180 #define IS_AVAIL2(var, str) ((var == 0x2) ? str : "") 181 #define IS_USED(cfg) (IS_ENABLED(cfg) ? "(in-use)" : "(not used)") 182 183 n += scnprintf(buf + n, len - n, 184 "Extn [700-Base]\t: %s %s %s %s %s %s\n", 185 IS_AVAIL2(cpu->extn.norm, "norm,"), 186 IS_AVAIL2(cpu->extn.barrel, "barrel-shift,"), 187 IS_AVAIL1(cpu->extn.swap, "swap,"), 188 IS_AVAIL2(cpu->extn.minmax, "minmax,"), 189 IS_AVAIL1(cpu->extn.crc, "crc,"), 190 IS_AVAIL2(cpu->extn.ext_arith, "ext-arith")); 191 192 n += scnprintf(buf + n, len - n, "Extn [700-MPY]\t: %s", 193 mul_type_nm[cpu->extn.mul].str); 194 195 n += scnprintf(buf + n, len - n, " MAC MPY: %s\n", 196 mac_mul_nm[cpu->extn_mac_mul.type].str); 197 198 if (cpu->core.family == 0x34) { 199 n += scnprintf(buf + n, len - n, 200 "Extn [700-4.10]\t: LLOCK/SCOND %s, SWAPE %s, RTSC %s\n", 201 IS_USED(CONFIG_ARC_HAS_LLSC), 202 IS_USED(CONFIG_ARC_HAS_SWAPE), 203 IS_USED(CONFIG_ARC_HAS_RTSC)); 204 } 205 206 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: %s", 207 !(cpu->dccm.sz || cpu->iccm.sz) ? "N/A" : ""); 208 209 if (cpu->dccm.sz) 210 n += scnprintf(buf + n, len - n, "DCCM: @ %x, %d KB ", 211 cpu->dccm.base_addr, TO_KB(cpu->dccm.sz)); 212 213 if (cpu->iccm.sz) 214 n += scnprintf(buf + n, len - n, "ICCM: @ %x, %d KB", 215 cpu->iccm.base_addr, TO_KB(cpu->iccm.sz)); 216 217 n += scnprintf(buf + n, len - n, "\nExtn [FPU]\t: %s", 218 !(cpu->fp.ver || cpu->dpfp.ver) ? "N/A" : ""); 219 220 if (cpu->fp.ver) 221 n += scnprintf(buf + n, len - n, "SP [v%d] %s", 222 cpu->fp.ver, cpu->fp.fast ? "(fast)" : ""); 223 224 if (cpu->dpfp.ver) 225 n += scnprintf(buf + n, len - n, "DP [v%d] %s", 226 cpu->dpfp.ver, cpu->dpfp.fast ? "(fast)" : ""); 227 228 n += scnprintf(buf + n, len - n, "\n"); 229 230 n += scnprintf(buf + n, len - n, 231 "OS ABI [v3]\t: no-legacy-syscalls\n"); 232 233 return buf; 234 } 235 236 void arc_chk_ccms(void) 237 { 238 #if defined(CONFIG_ARC_HAS_DCCM) || defined(CONFIG_ARC_HAS_ICCM) 239 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; 240 241 #ifdef CONFIG_ARC_HAS_DCCM 242 /* 243 * DCCM can be arbit placed in hardware. 244 * Make sure it's placement/sz matches what Linux is built with 245 */ 246 if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr) 247 panic("Linux built with incorrect DCCM Base address\n"); 248 249 if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz) 250 panic("Linux built with incorrect DCCM Size\n"); 251 #endif 252 253 #ifdef CONFIG_ARC_HAS_ICCM 254 if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz) 255 panic("Linux built with incorrect ICCM Size\n"); 256 #endif 257 #endif 258 } 259 260 /* 261 * Ensure that FP hardware and kernel config match 262 * -If hardware contains DPFP, kernel needs to save/restore FPU state 263 * across context switches 264 * -If hardware lacks DPFP, but kernel configured to save FPU state then 265 * kernel trying to access non-existant DPFP regs will crash 266 * 267 * We only check for Dbl precision Floating Point, because only DPFP 268 * hardware has dedicated regs which need to be saved/restored on ctx-sw 269 * (Single Precision uses core regs), thus kernel is kind of oblivious to it 270 */ 271 void arc_chk_fpu(void) 272 { 273 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; 274 275 if (cpu->dpfp.ver) { 276 #ifndef CONFIG_ARC_FPU_SAVE_RESTORE 277 pr_warn("DPFP support broken in this kernel...\n"); 278 #endif 279 } else { 280 #ifdef CONFIG_ARC_FPU_SAVE_RESTORE 281 panic("H/w lacks DPFP support, apps won't work\n"); 282 #endif 283 } 284 } 285 286 /* 287 * Initialize and setup the processor core 288 * This is called by all the CPUs thus should not do special case stuff 289 * such as only for boot CPU etc 290 */ 291 292 void setup_processor(void) 293 { 294 char str[512]; 295 int cpu_id = smp_processor_id(); 296 297 read_arc_build_cfg_regs(); 298 arc_init_IRQ(); 299 300 printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str))); 301 302 arc_mmu_init(); 303 arc_cache_init(); 304 arc_chk_ccms(); 305 306 printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str))); 307 308 #ifdef CONFIG_SMP 309 printk(arc_platform_smp_cpuinfo()); 310 #endif 311 312 arc_chk_fpu(); 313 } 314 315 void __init setup_arch(char **cmdline_p) 316 { 317 /* This also populates @boot_command_line from /bootargs */ 318 machine_desc = setup_machine_fdt(__dtb_start); 319 if (!machine_desc) 320 panic("Embedded DT invalid\n"); 321 322 /* Append any u-boot provided cmdline */ 323 #ifdef CONFIG_CMDLINE_UBOOT 324 /* Add a whitespace seperator between the 2 cmdlines */ 325 strlcat(boot_command_line, " ", COMMAND_LINE_SIZE); 326 strlcat(boot_command_line, command_line, COMMAND_LINE_SIZE); 327 #endif 328 329 /* Save unparsed command line copy for /proc/cmdline */ 330 *cmdline_p = boot_command_line; 331 332 /* To force early parsing of things like mem=xxx */ 333 parse_early_param(); 334 335 /* Platform/board specific: e.g. early console registration */ 336 if (machine_desc->init_early) 337 machine_desc->init_early(); 338 339 setup_processor(); 340 341 #ifdef CONFIG_SMP 342 smp_init_cpus(); 343 #endif 344 345 setup_arch_memory(); 346 347 /* copy flat DT out of .init and then unflatten it */ 348 unflatten_and_copy_device_tree(); 349 350 /* Can be issue if someone passes cmd line arg "ro" 351 * But that is unlikely so keeping it as it is 352 */ 353 root_mountflags &= ~MS_RDONLY; 354 355 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE) 356 conswitchp = &dummy_con; 357 #endif 358 359 arc_unwind_init(); 360 arc_unwind_setup(); 361 } 362 363 static int __init customize_machine(void) 364 { 365 /* Add platform devices */ 366 if (machine_desc->init_machine) 367 machine_desc->init_machine(); 368 369 return 0; 370 } 371 arch_initcall(customize_machine); 372 373 static int __init init_late_machine(void) 374 { 375 if (machine_desc->init_late) 376 machine_desc->init_late(); 377 378 return 0; 379 } 380 late_initcall(init_late_machine); 381 /* 382 * Get CPU information for use by the procfs. 383 */ 384 385 #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c))) 386 #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p)) 387 388 static int show_cpuinfo(struct seq_file *m, void *v) 389 { 390 char *str; 391 int cpu_id = ptr_to_cpu(v); 392 393 str = (char *)__get_free_page(GFP_TEMPORARY); 394 if (!str) 395 goto done; 396 397 seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE)); 398 399 seq_printf(m, "Bogo MIPS : \t%lu.%02lu\n", 400 loops_per_jiffy / (500000 / HZ), 401 (loops_per_jiffy / (5000 / HZ)) % 100); 402 403 seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE)); 404 405 seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE)); 406 407 seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE)); 408 409 #ifdef CONFIG_SMP 410 seq_printf(m, arc_platform_smp_cpuinfo()); 411 #endif 412 413 free_page((unsigned long)str); 414 done: 415 seq_printf(m, "\n\n"); 416 417 return 0; 418 } 419 420 static void *c_start(struct seq_file *m, loff_t *pos) 421 { 422 /* 423 * Callback returns cpu-id to iterator for show routine, NULL to stop. 424 * However since NULL is also a valid cpu-id (0), we use a round-about 425 * way to pass it w/o having to kmalloc/free a 2 byte string. 426 * Encode cpu-id as 0xFFcccc, which is decoded by show routine. 427 */ 428 return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL; 429 } 430 431 static void *c_next(struct seq_file *m, void *v, loff_t *pos) 432 { 433 ++*pos; 434 return c_start(m, pos); 435 } 436 437 static void c_stop(struct seq_file *m, void *v) 438 { 439 } 440 441 const struct seq_operations cpuinfo_op = { 442 .start = c_start, 443 .next = c_next, 444 .stop = c_stop, 445 .show = show_cpuinfo 446 }; 447 448 static DEFINE_PER_CPU(struct cpu, cpu_topology); 449 450 static int __init topology_init(void) 451 { 452 int cpu; 453 454 for_each_present_cpu(cpu) 455 register_cpu(&per_cpu(cpu_topology, cpu), cpu); 456 457 return 0; 458 } 459 460 subsys_initcall(topology_init); 461