xref: /openbmc/linux/arch/arc/kernel/fpu.c (revision 7d545e77)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * fpu.c - save/restore of Floating Point Unit Registers on task switch
4  *
5  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
6  */
7 
8 #include <linux/sched.h>
9 #include <asm/switch_to.h>
10 
11 /*
12  * To save/restore FPU regs, simplest scheme would use LR/SR insns.
13  * However since SR serializes the pipeline, an alternate "hack" can be used
14  * which uses the FPU Exchange insn (DEXCL) to r/w FPU regs.
15  *
16  * Store to 64bit dpfp1 reg from a pair of core regs:
17  *   dexcl1 0, r1, r0  ; where r1:r0 is the 64 bit val
18  *
19  * Read from dpfp1 into pair of core regs (w/o clobbering dpfp1)
20  *   mov_s    r3, 0
21  *   daddh11  r1, r3, r3   ; get "hi" into r1 (dpfp1 unchanged)
22  *   dexcl1   r0, r1, r3   ; get "low" into r0 (dpfp1 low clobbered)
23  *   dexcl1    0, r1, r0   ; restore dpfp1 to orig value
24  *
25  * However we can tweak the read, so that read-out of outgoing task's FPU regs
26  * and write of incoming task's regs happen in one shot. So all the work is
27  * done before context switch
28  */
29 
30 void fpu_save_restore(struct task_struct *prev, struct task_struct *next)
31 {
32 	unsigned int *saveto = &prev->thread.fpu.aux_dpfp[0].l;
33 	unsigned int *readfrom = &next->thread.fpu.aux_dpfp[0].l;
34 
35 	const unsigned int zero = 0;
36 
37 	__asm__ __volatile__(
38 		"daddh11  %0, %2, %2\n"
39 		"dexcl1   %1, %3, %4\n"
40 		: "=&r" (*(saveto + 1)), /* early clobber must here */
41 		  "=&r" (*(saveto))
42 		: "r" (zero), "r" (*(readfrom + 1)), "r" (*(readfrom))
43 	);
44 
45 	__asm__ __volatile__(
46 		"daddh22  %0, %2, %2\n"
47 		"dexcl2   %1, %3, %4\n"
48 		: "=&r"(*(saveto + 3)),	/* early clobber must here */
49 		  "=&r"(*(saveto + 2))
50 		: "r" (zero), "r" (*(readfrom + 3)), "r" (*(readfrom + 2))
51 	);
52 }
53