xref: /openbmc/linux/arch/arc/kernel/entry.S (revision 97da55fc) 
1/*
2 * Low Level Interrupts/Traps/Exceptions(non-TLB) Handling for ARC
3 *
4 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * vineetg: May 2011
11 *  -Userspace unaligned access emulation
12 *
13 * vineetg: Feb 2011 (ptrace low level code fixes)
14 *  -traced syscall return code (r0) was not saved into pt_regs for restoring
15 *   into user reg-file when traded task rets to user space.
16 *  -syscalls needing arch-wrappers (mainly for passing sp as pt_regs)
17 *   were not invoking post-syscall trace hook (jumping directly into
18 *   ret_from_system_call)
19 *
20 * vineetg: Nov 2010:
21 *  -Vector table jumps (@8 bytes) converted into branches (@4 bytes)
22 *  -To maintain the slot size of 8 bytes/vector, added nop, which is
23 *   not executed at runtime.
24 *
25 * vineetg: Nov 2009 (Everything needed for TIF_RESTORE_SIGMASK)
26 *  -do_signal()invoked upon TIF_RESTORE_SIGMASK as well
27 *  -Wrappers for sys_{,rt_}sigsuspend() nolonger needed as they don't
28 *   need ptregs anymore
29 *
30 * Vineetg: Oct 2009
31 *  -In a rare scenario, Process gets a Priv-V exception and gets scheduled
32 *   out. Since we don't do FAKE RTIE for Priv-V, CPU excpetion state remains
33 *   active (AE bit enabled).  This causes a double fault for a subseq valid
34 *   exception. Thus FAKE RTIE needed in low level Priv-Violation handler.
35 *   Instr Error could also cause similar scenario, so same there as well.
36 *
37 * Vineetg: March 2009 (Supporting 2 levels of Interrupts)
38 *
39 * Vineetg: Aug 28th 2008: Bug #94984
40 *  -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap
41 *   Normally CPU does this automatically, however when doing FAKE rtie,
42 *   we need to explicitly do this. The problem in macros
43 *   FAKE_RET_FROM_EXCPN and FAKE_RET_FROM_EXCPN_LOCK_IRQ was that this bit
44 *   was being "CLEARED" rather then "SET". Since it is Loop INHIBIT Bit,
45 *   setting it and not clearing it clears ZOL context
46 *
47 * Vineetg: May 16th, 2008
48 *  - r25 now contains the Current Task when in kernel
49 *
50 * Vineetg: Dec 22, 2007
51 *    Minor Surgery of Low Level ISR to make it SMP safe
52 *    - MMU_SCRATCH0 Reg used for freeing up r9 in Level 1 ISR
53 *    - _current_task is made an array of NR_CPUS
54 *    - Access of _current_task wrapped inside a macro so that if hardware
55 *       team agrees for a dedicated reg, no other code is touched
56 *
57 * Amit Bhor, Rahul Trivedi, Kanika Nema, Sameer Dhavale : Codito Tech 2004
58 */
59
60/*------------------------------------------------------------------
61 *    Function                            ABI
62 *------------------------------------------------------------------
63 *
64 *  Arguments                           r0 - r7
65 *  Caller Saved Registers              r0 - r12
66 *  Callee Saved Registers              r13- r25
67 *  Global Pointer (gp)                 r26
68 *  Frame Pointer (fp)                  r27
69 *  Stack Pointer (sp)                  r28
70 *  Interrupt link register (ilink1)    r29
71 *  Interrupt link register (ilink2)    r30
72 *  Branch link register (blink)        r31
73 *------------------------------------------------------------------
74 */
75
76	.cpu A7
77
78;############################ Vector Table #################################
79
80.macro VECTOR  lbl
81#if 1   /* Just in case, build breaks */
82	j   \lbl
83#else
84	b   \lbl
85	nop
86#endif
87.endm
88
89	.section .vector, "ax",@progbits
90	.align 4
91
92/* Each entry in the vector table must occupy 2 words. Since it is a jump
93 * across sections (.vector to .text) we are gauranteed that 'j somewhere'
94 * will use the 'j limm' form of the intrsuction as long as somewhere is in
95 * a section other than .vector.
96 */
97
98; ********* Critical System Events **********************
99VECTOR   res_service             ; 0x0, Restart Vector  (0x0)
100VECTOR   mem_service             ; 0x8, Mem exception   (0x1)
101VECTOR   instr_service           ; 0x10, Instrn Error   (0x2)
102
103; ******************** Device ISRs **********************
104#ifdef CONFIG_ARC_IRQ3_LV2
105VECTOR   handle_interrupt_level2
106#else
107VECTOR   handle_interrupt_level1
108#endif
109
110VECTOR   handle_interrupt_level1
111
112#ifdef CONFIG_ARC_IRQ5_LV2
113VECTOR   handle_interrupt_level2
114#else
115VECTOR   handle_interrupt_level1
116#endif
117
118#ifdef CONFIG_ARC_IRQ6_LV2
119VECTOR   handle_interrupt_level2
120#else
121VECTOR   handle_interrupt_level1
122#endif
123
124.rept   25
125VECTOR   handle_interrupt_level1 ; Other devices
126.endr
127
128/* FOR ARC600: timer = 0x3, uart = 0x8, emac = 0x10 */
129
130; ******************** Exceptions **********************
131VECTOR   EV_MachineCheck         ; 0x100, Fatal Machine check   (0x20)
132VECTOR   EV_TLBMissI             ; 0x108, Intruction TLB miss   (0x21)
133VECTOR   EV_TLBMissD             ; 0x110, Data TLB miss         (0x22)
134VECTOR   EV_TLBProtV             ; 0x118, Protection Violation  (0x23)
135				 ;         or Misaligned Access
136VECTOR   EV_PrivilegeV           ; 0x120, Privilege Violation   (0x24)
137VECTOR   EV_Trap                 ; 0x128, Trap exception        (0x25)
138VECTOR   EV_Extension            ; 0x130, Extn Intruction Excp  (0x26)
139
140.rept   24
141VECTOR   reserved                ; Reserved Exceptions
142.endr
143
144#include <linux/linkage.h>   /* ARC_{EXTRY,EXIT} */
145#include <asm/entry.h>       /* SAVE_ALL_{INT1,INT2,TRAP...} */
146#include <asm/errno.h>
147#include <asm/arcregs.h>
148#include <asm/irqflags.h>
149
150;##################### Scratch Mem for IRQ stack switching #############
151
152ARCFP_DATA int1_saved_reg
153	.align 32
154	.type   int1_saved_reg, @object
155	.size   int1_saved_reg, 4
156int1_saved_reg:
157	.zero 4
158
159/* Each Interrupt level needs it's own scratch */
160#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
161
162ARCFP_DATA int2_saved_reg
163	.type   int2_saved_reg, @object
164	.size   int2_saved_reg, 4
165int2_saved_reg:
166	.zero 4
167
168#endif
169
170; ---------------------------------------------
171	.section .text, "ax",@progbits
172
173res_service:		; processor restart
174	flag    0x1     ; not implemented
175	nop
176	nop
177
178reserved:		; processor restart
179	rtie            ; jump to processor initializations
180
181;##################### Interrupt Handling ##############################
182
183#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
184; ---------------------------------------------
185;  Level 2 ISR: Can interrupt a Level 1 ISR
186; ---------------------------------------------
187ARC_ENTRY handle_interrupt_level2
188
189	; TODO-vineetg for SMP this wont work
190	; free up r9 as scratchpad
191	st  r9, [@int2_saved_reg]
192
193	;Which mode (user/kernel) was the system in when intr occured
194	lr  r9, [status32_l2]
195
196	SWITCH_TO_KERNEL_STK
197	SAVE_ALL_INT2
198
199	;------------------------------------------------------
200	; if L2 IRQ interrupted a L1 ISR, disable preemption
201	;------------------------------------------------------
202
203	ld r9, [sp, PT_status32]        ; get statu32_l2 (saved in pt_regs)
204	bbit0 r9, STATUS_A1_BIT, 1f     ; L1 not active when L2 IRQ, so normal
205
206	; A1 is set in status32_l2
207	; bump thread_info->preempt_count (Disable preemption)
208	GET_CURR_THR_INFO_FROM_SP   r10
209	ld      r9, [r10, THREAD_INFO_PREEMPT_COUNT]
210	add     r9, r9, 1
211	st      r9, [r10, THREAD_INFO_PREEMPT_COUNT]
212
2131:
214	;------------------------------------------------------
215	; setup params for Linux common ISR and invoke it
216	;------------------------------------------------------
217	lr  r0, [icause2]
218	and r0, r0, 0x1f
219
220	bl.d  @arch_do_IRQ
221	mov r1, sp
222
223	mov r8,0x2
224	sr r8, [AUX_IRQ_LV12]       ; clear bit in Sticky Status Reg
225
226	b   ret_from_exception
227
228ARC_EXIT handle_interrupt_level2
229
230#endif
231
232; ---------------------------------------------
233;  Level 1 ISR
234; ---------------------------------------------
235ARC_ENTRY handle_interrupt_level1
236
237	/* free up r9 as scratchpad */
238#ifdef CONFIG_SMP
239	sr  r9, [ARC_REG_SCRATCH_DATA0]
240#else
241	st   r9, [@int1_saved_reg]
242#endif
243
244	;Which mode (user/kernel) was the system in when intr occured
245	lr  r9, [status32_l1]
246
247	SWITCH_TO_KERNEL_STK
248	SAVE_ALL_INT1
249
250	lr  r0, [icause1]
251	and r0, r0, 0x1f
252
253	bl.d  @arch_do_IRQ
254	mov r1, sp
255
256	mov r8,0x1
257	sr r8, [AUX_IRQ_LV12]       ; clear bit in Sticky Status Reg
258
259	b   ret_from_exception
260ARC_EXIT handle_interrupt_level1
261
262;################### Non TLB Exception Handling #############################
263
264; ---------------------------------------------
265; Instruction Error Exception Handler
266; ---------------------------------------------
267
268ARC_ENTRY instr_service
269
270	EXCPN_PROLOG_FREEUP_REG r9
271
272	lr  r9, [erstatus]
273
274	SWITCH_TO_KERNEL_STK
275	SAVE_ALL_SYS
276
277	lr  r0, [ecr]
278	lr  r1, [efa]
279
280	mov r2, sp
281
282	FAKE_RET_FROM_EXCPN r9
283
284	bl  do_insterror_or_kprobe
285	b   ret_from_exception
286ARC_EXIT instr_service
287
288; ---------------------------------------------
289; Memory Error Exception Handler
290; ---------------------------------------------
291
292ARC_ENTRY mem_service
293
294	EXCPN_PROLOG_FREEUP_REG r9
295
296	lr  r9, [erstatus]
297
298	SWITCH_TO_KERNEL_STK
299	SAVE_ALL_SYS
300
301	lr  r0, [ecr]
302	lr  r1, [efa]
303	mov r2, sp
304	bl  do_memory_error
305	b   ret_from_exception
306ARC_EXIT mem_service
307
308; ---------------------------------------------
309; Machine Check Exception Handler
310; ---------------------------------------------
311
312ARC_ENTRY EV_MachineCheck
313
314	EXCPN_PROLOG_FREEUP_REG r9
315	lr  r9, [erstatus]
316
317	SWITCH_TO_KERNEL_STK
318	SAVE_ALL_SYS
319
320	lr  r0, [ecr]
321	lr  r1, [efa]
322	mov r2, sp
323
324	brne    r0, 0x200100, 1f
325	bl      do_tlb_overlap_fault
326	b       ret_from_exception
327
3281:
329	; DEAD END: can't do much, display Regs and HALT
330	SAVE_CALLEE_SAVED_USER
331
332	GET_CURR_TASK_FIELD_PTR   TASK_THREAD, r10
333	st  sp, [r10, THREAD_CALLEE_REG]
334
335	j  do_machine_check_fault
336
337ARC_EXIT EV_MachineCheck
338
339; ---------------------------------------------
340; Protection Violation Exception Handler
341; ---------------------------------------------
342
343ARC_ENTRY EV_TLBProtV
344
345	EXCPN_PROLOG_FREEUP_REG r9
346
347	;Which mode (user/kernel) was the system in when Exception occured
348	lr  r9, [erstatus]
349
350	SWITCH_TO_KERNEL_STK
351	SAVE_ALL_SYS
352
353	;---------(3) Save some more regs-----------------
354	;  vineetg: Mar 6th: Random Seg Fault issue #1
355	;  ecr and efa were not saved in case an Intr sneaks in
356	;  after fake rtie
357	;
358	lr  r3, [ecr]
359	lr  r4, [efa]
360
361	; --------(4) Return from CPU Exception Mode ---------
362	;  Fake a rtie, but rtie to next label
363	;  That way, subsequently, do_page_fault ( ) executes in pure kernel
364	;  mode with further Exceptions enabled
365
366	FAKE_RET_FROM_EXCPN r9
367
368	;------ (5) Type of Protection Violation? ----------
369	;
370	; ProtV Hardware Exception is triggered for Access Faults of 2 types
371	;   -Access Violaton (WRITE to READ ONLY Page) - for linux COW
372	;   -Unaligned Access (READ/WRITE on odd boundary)
373	;
374	cmp r3, 0x230400    ; Misaligned data access ?
375	beq 4f
376
377	;========= (6a) Access Violation Processing ========
378	cmp r3, 0x230100
379	mov r1, 0x0              ; if LD exception ? write = 0
380	mov.ne r1, 0x1           ; else write = 1
381
382	mov r2, r4              ; faulting address
383	mov r0, sp              ; pt_regs
384	bl  do_page_fault
385	b   ret_from_exception
386
387	;========== (6b) Non aligned access ============
3884:
389	mov r0, r3              ; cause code
390	mov r1, r4              ; faulting address
391	mov r2, sp              ; pt_regs
392
393#ifdef  CONFIG_ARC_MISALIGN_ACCESS
394	SAVE_CALLEE_SAVED_USER
395	mov r3, sp              ; callee_regs
396#endif
397
398	bl  do_misaligned_access
399
400#ifdef  CONFIG_ARC_MISALIGN_ACCESS
401	DISCARD_CALLEE_SAVED_USER
402#endif
403
404	b   ret_from_exception
405
406ARC_EXIT EV_TLBProtV
407
408; ---------------------------------------------
409; Privilege Violation Exception Handler
410; ---------------------------------------------
411ARC_ENTRY EV_PrivilegeV
412
413	EXCPN_PROLOG_FREEUP_REG r9
414
415	lr  r9, [erstatus]
416
417	SWITCH_TO_KERNEL_STK
418	SAVE_ALL_SYS
419
420	lr  r0, [ecr]
421	lr  r1, [efa]
422	mov r2, sp
423
424	FAKE_RET_FROM_EXCPN r9
425
426	bl  do_privilege_fault
427	b   ret_from_exception
428ARC_EXIT EV_PrivilegeV
429
430; ---------------------------------------------
431; Extension Instruction Exception Handler
432; ---------------------------------------------
433ARC_ENTRY EV_Extension
434
435	EXCPN_PROLOG_FREEUP_REG r9
436	lr  r9, [erstatus]
437
438	SWITCH_TO_KERNEL_STK
439	SAVE_ALL_SYS
440
441	lr  r0, [ecr]
442	lr  r1, [efa]
443	mov r2, sp
444	bl  do_extension_fault
445	b   ret_from_exception
446ARC_EXIT EV_Extension
447
448;######################### System Call Tracing #########################
449
450tracesys:
451	; save EFA in case tracer wants the PC of traced task
452	; using ERET won't work since next-PC has already committed
453	lr  r12, [efa]
454	GET_CURR_TASK_FIELD_PTR   TASK_THREAD, r11
455	st  r12, [r11, THREAD_FAULT_ADDR]
456
457	; PRE Sys Call Ptrace hook
458	mov r0, sp			; pt_regs needed
459	bl  @syscall_trace_entry
460
461	; Tracing code now returns the syscall num (orig or modif)
462	mov r8, r0
463
464	; Do the Sys Call as we normally would.
465	; Validate the Sys Call number
466	cmp     r8,  NR_syscalls
467	mov.hi  r0, -ENOSYS
468	bhi     tracesys_exit
469
470	; Restore the sys-call args. Mere invocation of the hook abv could have
471	; clobbered them (since they are in scratch regs). The tracer could also
472	; have deliberately changed the syscall args: r0-r7
473	ld  r0, [sp, PT_r0]
474	ld  r1, [sp, PT_r1]
475	ld  r2, [sp, PT_r2]
476	ld  r3, [sp, PT_r3]
477	ld  r4, [sp, PT_r4]
478	ld  r5, [sp, PT_r5]
479	ld  r6, [sp, PT_r6]
480	ld  r7, [sp, PT_r7]
481	ld.as   r9, [sys_call_table, r8]
482	jl      [r9]        ; Entry into Sys Call Handler
483
484tracesys_exit:
485	st  r0, [sp, PT_r0]     ; sys call return value in pt_regs
486
487	;POST Sys Call Ptrace Hook
488	bl  @syscall_trace_exit
489	b   ret_from_exception ; NOT ret_from_system_call at is saves r0 which
490	; we'd done before calling post hook above
491
492;################### Break Point TRAP ##########################
493
494	; ======= (5b) Trap is due to Break-Point =========
495
496trap_with_param:
497
498	; stop_pc info by gdb needs this info
499	stw orig_r8_IS_BRKPT, [sp, PT_orig_r8]
500
501	mov r0, r12
502	lr  r1, [efa]
503	mov r2, sp
504
505	; Now that we have read EFA, its safe to do "fake" rtie
506	;   and get out of CPU exception mode
507	FAKE_RET_FROM_EXCPN r11
508
509	; Save callee regs in case gdb wants to have a look
510	; SP will grow up by size of CALLEE Reg-File
511	; NOTE: clobbers r12
512	SAVE_CALLEE_SAVED_USER
513
514	; save location of saved Callee Regs @ thread_struct->pc
515	GET_CURR_TASK_FIELD_PTR   TASK_THREAD, r10
516	st  sp, [r10, THREAD_CALLEE_REG]
517
518	; Call the trap handler
519	bl  do_non_swi_trap
520
521	; unwind stack to discard Callee saved Regs
522	DISCARD_CALLEE_SAVED_USER
523
524	b   ret_from_exception
525
526;##################### Trap Handling ##############################
527;
528; EV_Trap caused by TRAP_S and TRAP0 instructions.
529;------------------------------------------------------------------
530;   (1) System Calls
531;       :parameters in r0-r7.
532;       :r8 has the system call number
533;   (2) Break Points
534;------------------------------------------------------------------
535
536ARC_ENTRY EV_Trap
537
538	; Need at least 1 reg to code the early exception prolog
539	EXCPN_PROLOG_FREEUP_REG r9
540
541	;Which mode (user/kernel) was the system in when intr occured
542	lr  r9, [erstatus]
543
544	SWITCH_TO_KERNEL_STK
545	SAVE_ALL_TRAP
546
547	;------- (4) What caused the Trap --------------
548	lr     r12, [ecr]
549	and.f  0, r12, ECR_PARAM_MASK
550	bnz    trap_with_param
551
552	; ======= (5a) Trap is due to System Call ========
553
554	; Before doing anything, return from CPU Exception Mode
555	FAKE_RET_FROM_EXCPN r11
556
557	; If syscall tracing ongoing, invoke pre-pos-hooks
558	GET_CURR_THR_INFO_FLAGS   r10
559	btst r10, TIF_SYSCALL_TRACE
560	bnz tracesys  ; this never comes back
561
562	;============ This is normal System Call case ==========
563	; Sys-call num shd not exceed the total system calls avail
564	cmp     r8,  NR_syscalls
565	mov.hi  r0, -ENOSYS
566	bhi     ret_from_system_call
567
568	; Offset into the syscall_table and call handler
569	ld.as   r9,[sys_call_table, r8]
570	jl      [r9]        ; Entry into Sys Call Handler
571
572	; fall through to ret_from_system_call
573ARC_EXIT EV_Trap
574
575ARC_ENTRY ret_from_system_call
576
577	st  r0, [sp, PT_r0]     ; sys call return value in pt_regs
578
579	; fall through yet again to ret_from_exception
580
581;############# Return from Intr/Excp/Trap (Linux Specifics) ##############
582;
583; If ret to user mode do we need to handle signals, schedule() et al.
584
585ARC_ENTRY ret_from_exception
586
587	; Pre-{IRQ,Trap,Exception} K/U mode from pt_regs->status32
588	ld  r8, [sp, PT_status32]   ; returning to User/Kernel Mode
589
590#ifdef CONFIG_PREEMPT
591	bbit0  r8, STATUS_U_BIT, resume_kernel_mode
592#else
593	bbit0  r8, STATUS_U_BIT, restore_regs
594#endif
595
596	; Before returning to User mode check-for-and-complete any pending work
597	; such as rescheduling/signal-delivery etc.
598resume_user_mode_begin:
599
600	; Disable IRQs to ensures that chk for pending work itself is atomic
601	; (and we don't end up missing a NEED_RESCHED/SIGPENDING due to an
602	; interim IRQ).
603	IRQ_DISABLE	r10
604
605	; Fast Path return to user mode if no pending work
606	GET_CURR_THR_INFO_FLAGS   r9
607	and.f  0,  r9, _TIF_WORK_MASK
608	bz     restore_regs
609
610	; --- (Slow Path #1) task preemption ---
611	bbit0  r9, TIF_NEED_RESCHED, .Lchk_pend_signals
612	mov    blink, resume_user_mode_begin  ; tail-call to U mode ret chks
613	b      @schedule 	; BTST+Bnz causes relo error in link
614
615.Lchk_pend_signals:
616	IRQ_ENABLE	r10
617
618	; --- (Slow Path #2) pending signal  ---
619	mov r0, sp	; pt_regs for arg to do_signal()/do_notify_resume()
620
621	bbit0  r9, TIF_SIGPENDING, .Lchk_notify_resume
622
623	; Normal Trap/IRQ entry only saves Scratch (caller-saved) regs
624	; in pt_reg since the "C" ABI (kernel code) will automatically
625	; save/restore callee-saved regs.
626	;
627	; However, here we need to explicitly save callee regs because
628	; (i)  If this signal causes coredump - full regfile needed
629	; (ii) If signal is SIGTRAP/SIGSTOP, task is being traced thus
630	;      tracer might call PEEKUSR(CALLEE reg)
631	;
632	; NOTE: SP will grow up by size of CALLEE Reg-File
633	SAVE_CALLEE_SAVED_USER		; clobbers r12
634
635	; save location of saved Callee Regs @ thread_struct->callee
636	GET_CURR_TASK_FIELD_PTR   TASK_THREAD, r10
637	st  sp, [r10, THREAD_CALLEE_REG]
638
639	bl  @do_signal
640
641	; Ideally we want to discard the Callee reg above, however if this was
642	; a tracing signal, tracer could have done a POKEUSR(CALLEE reg)
643	RESTORE_CALLEE_SAVED_USER
644
645	b      resume_user_mode_begin	; loop back to start of U mode ret
646
647	; --- (Slow Path #3) notify_resume ---
648.Lchk_notify_resume:
649	btst   r9, TIF_NOTIFY_RESUME
650	blnz   @do_notify_resume
651	b      resume_user_mode_begin	; unconditionally back to U mode ret chks
652					; for single exit point from this block
653
654#ifdef CONFIG_PREEMPT
655
656resume_kernel_mode:
657
658	; Can't preempt if preemption disabled
659	GET_CURR_THR_INFO_FROM_SP   r10
660	ld  r8, [r10, THREAD_INFO_PREEMPT_COUNT]
661	brne  r8, 0, restore_regs
662
663	; check if this task's NEED_RESCHED flag set
664	ld  r9, [r10, THREAD_INFO_FLAGS]
665	bbit0  r9, TIF_NEED_RESCHED, restore_regs
666
667	IRQ_DISABLE	r9
668
669	; Invoke PREEMPTION
670	bl      preempt_schedule_irq
671
672	; preempt_schedule_irq() always returns with IRQ disabled
673#endif
674
675	; fall through
676
677;############# Return from Intr/Excp/Trap (ARC Specifics) ##############
678;
679; Restore the saved sys context (common exit-path for EXCPN/IRQ/Trap)
680; IRQ shd definitely not happen between now and rtie
681
682restore_regs :
683
684	; Disable Interrupts while restoring reg-file back
685	; XXX can this be optimised out
686	IRQ_DISABLE_SAVE    r9, r10	;@r10 has prisitine (pre-disable) copy
687
688#ifdef CONFIG_ARC_CURR_IN_REG
689	; Restore User R25
690	; Earlier this used to be only for returning to user mode
691	; However with 2 levels of IRQ this can also happen even if
692	; in kernel mode
693	ld r9, [sp, PT_sp]
694	brhs r9, VMALLOC_START, 8f
695	RESTORE_USER_R25
6968:
697#endif
698
699	; Restore REG File. In case multiple Events outstanding,
700	; use the same priorty as rtie: EXCPN, L2 IRQ, L1 IRQ, None
701	; Note that we use realtime STATUS32 (not pt_regs->status32) to
702	; decide that.
703
704	; if Returning from Exception
705	bbit0  r10, STATUS_AE_BIT, not_exception
706	RESTORE_ALL_SYS
707	rtie
708
709	; Not Exception so maybe Interrupts (Level 1 or 2)
710
711not_exception:
712
713#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
714
715	bbit0  r10, STATUS_A2_BIT, not_level2_interrupt
716
717	;------------------------------------------------------------------
718	; if L2 IRQ interrupted a L1 ISR,  we'd disbaled preemption earlier
719	; so that sched doesnt move to new task, causing L1 to be delayed
720	; undeterministically. Now that we've achieved that, lets reset
721	; things to what they were, before returning from L2 context
722	;----------------------------------------------------------------
723
724	ldw  r9, [sp, PT_orig_r8]      ; get orig_r8 to make sure it is
725	brne r9, orig_r8_IS_IRQ2, 149f ; infact a L2 ISR ret path
726
727	ld r9, [sp, PT_status32]       ; get statu32_l2 (saved in pt_regs)
728	bbit0 r9, STATUS_A1_BIT, 149f  ; L1 not active when L2 IRQ, so normal
729
730	; A1 is set in status32_l2
731	; decrement thread_info->preempt_count (re-enable preemption)
732	GET_CURR_THR_INFO_FROM_SP   r10
733	ld      r9, [r10, THREAD_INFO_PREEMPT_COUNT]
734
735	; paranoid check, given A1 was active when A2 happened, preempt count
736	; must not be 0 beccause we would have incremented it.
737	; If this does happen we simply HALT as it means a BUG !!!
738	cmp     r9, 0
739	bnz     2f
740	flag 1
741
7422:
743	sub     r9, r9, 1
744	st      r9, [r10, THREAD_INFO_PREEMPT_COUNT]
745
746149:
747	;return from level 2
748	RESTORE_ALL_INT2
749debug_marker_l2:
750	rtie
751
752not_level2_interrupt:
753
754#endif
755
756	bbit0  r10, STATUS_A1_BIT, not_level1_interrupt
757
758	;return from level 1
759
760	RESTORE_ALL_INT1
761debug_marker_l1:
762	rtie
763
764not_level1_interrupt:
765
766	;this case is for syscalls or Exceptions (with fake rtie)
767
768	RESTORE_ALL_SYS
769debug_marker_syscall:
770	rtie
771
772ARC_EXIT ret_from_exception
773
774ARC_ENTRY ret_from_fork
775	; when the forked child comes here from the __switch_to function
776	; r0 has the last task pointer.
777	; put last task in scheduler queue
778	bl   @schedule_tail
779
780	; If kernel thread, jump to it's entry-point
781	ld   r9, [sp, PT_status32]
782	brne r9, 0, 1f
783
784	jl.d [r14]
785	mov  r0, r13		; arg to payload
786
7871:
788	; special case of kernel_thread entry point returning back due to
789	; kernel_execve() - pretend return from syscall to ret to userland
790	b    ret_from_exception
791ARC_EXIT ret_from_fork
792
793;################### Special Sys Call Wrappers ##########################
794
795; TBD: call do_fork directly from here
796ARC_ENTRY sys_fork_wrapper
797	SAVE_CALLEE_SAVED_USER
798	bl  @sys_fork
799	DISCARD_CALLEE_SAVED_USER
800
801	GET_CURR_THR_INFO_FLAGS   r10
802	btst r10, TIF_SYSCALL_TRACE
803	bnz  tracesys_exit
804
805	b ret_from_system_call
806ARC_EXIT sys_fork_wrapper
807
808ARC_ENTRY sys_vfork_wrapper
809	SAVE_CALLEE_SAVED_USER
810	bl  @sys_vfork
811	DISCARD_CALLEE_SAVED_USER
812
813	GET_CURR_THR_INFO_FLAGS   r10
814	btst r10, TIF_SYSCALL_TRACE
815	bnz  tracesys_exit
816
817	b ret_from_system_call
818ARC_EXIT sys_vfork_wrapper
819
820ARC_ENTRY sys_clone_wrapper
821	SAVE_CALLEE_SAVED_USER
822	bl  @sys_clone
823	DISCARD_CALLEE_SAVED_USER
824
825	GET_CURR_THR_INFO_FLAGS   r10
826	btst r10, TIF_SYSCALL_TRACE
827	bnz  tracesys_exit
828
829	b ret_from_system_call
830ARC_EXIT sys_clone_wrapper
831
832#ifdef CONFIG_ARC_DW2_UNWIND
833; Workaround for bug 94179 (STAR ):
834; Despite -fasynchronous-unwind-tables, linker is not making dwarf2 unwinder
835; section (.debug_frame) as loadable. So we force it here.
836; This also fixes STAR 9000487933 where the prev-workaround (objcopy --setflag)
837; would not work after a clean build due to kernel build system dependencies.
838.section .debug_frame, "wa",@progbits
839#endif
840