1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
4  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
5  */
6 
7 #ifndef __ASM_IRQFLAGS_ARCOMPACT_H
8 #define __ASM_IRQFLAGS_ARCOMPACT_H
9 
10 /* vineetg: March 2010 : local_irq_save( ) optimisation
11  *  -Remove explicit mov of current status32 into reg, that is not needed
12  *  -Use BIC  insn instead of INVERTED + AND
13  *  -Conditionally disable interrupts (if they are not enabled, don't disable)
14 */
15 
16 #include <asm/arcregs.h>
17 
18 /* status32 Reg bits related to Interrupt Handling */
19 #define STATUS_E1_BIT		1	/* Int 1 enable */
20 #define STATUS_E2_BIT		2	/* Int 2 enable */
21 #define STATUS_A1_BIT		3	/* Int 1 active */
22 #define STATUS_A2_BIT		4	/* Int 2 active */
23 #define STATUS_AE_BIT		5	/* Exception active */
24 
25 #define STATUS_E1_MASK		(1<<STATUS_E1_BIT)
26 #define STATUS_E2_MASK		(1<<STATUS_E2_BIT)
27 #define STATUS_A1_MASK		(1<<STATUS_A1_BIT)
28 #define STATUS_A2_MASK		(1<<STATUS_A2_BIT)
29 #define STATUS_AE_MASK		(1<<STATUS_AE_BIT)
30 #define STATUS_IE_MASK		(STATUS_E1_MASK | STATUS_E2_MASK)
31 
32 /* Other Interrupt Handling related Aux regs */
33 #define AUX_IRQ_LEV		0x200	/* IRQ Priority: L1 or L2 */
34 #define AUX_IRQ_HINT		0x201	/* For generating Soft Interrupts */
35 #define AUX_IRQ_LV12		0x43	/* interrupt level register */
36 
37 #define AUX_IENABLE		0x40c
38 #define AUX_ITRIGGER		0x40d
39 #define AUX_IPULSE		0x415
40 
41 #define ISA_INIT_STATUS_BITS	STATUS_IE_MASK
42 
43 #ifndef __ASSEMBLY__
44 
45 /******************************************************************
46  * IRQ Control Macros
47  *
48  * All of them have "memory" clobber (compiler barrier) which is needed to
49  * ensure that LD/ST requiring irq safetly (R-M-W when LLSC is not available)
50  * are redone after IRQs are re-enabled (and gcc doesn't reuse stale register)
51  *
52  * Noted at the time of Abilis Timer List corruption
53  *	Orig Bug + Rejected solution	: https://lkml.org/lkml/2013/3/29/67
54  *	Reasoning			: https://lkml.org/lkml/2013/4/8/15
55  *
56  ******************************************************************/
57 
58 /*
59  * Save IRQ state and disable IRQs
60  */
61 static inline long arch_local_irq_save(void)
62 {
63 	unsigned long temp, flags;
64 
65 	__asm__ __volatile__(
66 	"	lr  %1, [status32]	\n"
67 	"	bic %0, %1, %2		\n"
68 	"	and.f 0, %1, %2	\n"
69 	"	flag.nz %0		\n"
70 	: "=r"(temp), "=r"(flags)
71 	: "n"((STATUS_E1_MASK | STATUS_E2_MASK))
72 	: "memory", "cc");
73 
74 	return flags;
75 }
76 
77 /*
78  * restore saved IRQ state
79  */
80 static inline void arch_local_irq_restore(unsigned long flags)
81 {
82 
83 	__asm__ __volatile__(
84 	"	flag %0			\n"
85 	:
86 	: "r"(flags)
87 	: "memory");
88 }
89 
90 /*
91  * Unconditionally Enable IRQs
92  */
93 static inline void arch_local_irq_enable(void)
94 {
95 	unsigned long temp;
96 
97 	__asm__ __volatile__(
98 	"	lr   %0, [status32]	\n"
99 	"	or   %0, %0, %1		\n"
100 	"	flag %0			\n"
101 	: "=&r"(temp)
102 	: "n"((STATUS_E1_MASK | STATUS_E2_MASK))
103 	: "cc", "memory");
104 }
105 
106 
107 /*
108  * Unconditionally Disable IRQs
109  */
110 static inline void arch_local_irq_disable(void)
111 {
112 	unsigned long temp;
113 
114 	__asm__ __volatile__(
115 	"	lr  %0, [status32]	\n"
116 	"	and %0, %0, %1		\n"
117 	"	flag %0			\n"
118 	: "=&r"(temp)
119 	: "n"(~(STATUS_E1_MASK | STATUS_E2_MASK))
120 	: "memory");
121 }
122 
123 /*
124  * save IRQ state
125  */
126 static inline long arch_local_save_flags(void)
127 {
128 	unsigned long temp;
129 
130 	__asm__ __volatile__(
131 	"	lr  %0, [status32]	\n"
132 	: "=&r"(temp)
133 	:
134 	: "memory");
135 
136 	return temp;
137 }
138 
139 /*
140  * Query IRQ state
141  */
142 static inline int arch_irqs_disabled_flags(unsigned long flags)
143 {
144 	return !(flags & (STATUS_E1_MASK
145 #ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
146 			| STATUS_E2_MASK
147 #endif
148 		));
149 }
150 
151 static inline int arch_irqs_disabled(void)
152 {
153 	return arch_irqs_disabled_flags(arch_local_save_flags());
154 }
155 
156 #else
157 
158 #ifdef CONFIG_TRACE_IRQFLAGS
159 
160 .macro TRACE_ASM_IRQ_DISABLE
161 	bl	trace_hardirqs_off
162 .endm
163 
164 .macro TRACE_ASM_IRQ_ENABLE
165 	bl	trace_hardirqs_on
166 .endm
167 
168 #else
169 
170 .macro TRACE_ASM_IRQ_DISABLE
171 .endm
172 
173 .macro TRACE_ASM_IRQ_ENABLE
174 .endm
175 
176 #endif
177 
178 .macro IRQ_DISABLE  scratch
179 	lr	\scratch, [status32]
180 	bic	\scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
181 	flag	\scratch
182 	TRACE_ASM_IRQ_DISABLE
183 .endm
184 
185 .macro IRQ_ENABLE  scratch
186 	TRACE_ASM_IRQ_ENABLE
187 	lr	\scratch, [status32]
188 	or	\scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
189 	flag	\scratch
190 .endm
191 
192 #endif	/* __ASSEMBLY__ */
193 
194 #endif
195