1 /*
2  * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
3  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * Vineetg: March 2009 (Supporting 2 levels of Interrupts)
10  *  Stack switching code can no longer reliably rely on the fact that
11  *  if we are NOT in user mode, stack is switched to kernel mode.
12  *  e.g. L2 IRQ interrupted a L1 ISR which had not yet completed
13  *  it's prologue including stack switching from user mode
14  *
15  * Vineetg: Aug 28th 2008: Bug #94984
16  *  -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap
17  *   Normally CPU does this automatically, however when doing FAKE rtie,
18  *   we also need to explicitly do this. The problem in macros
19  *   FAKE_RET_FROM_EXCPN and FAKE_RET_FROM_EXCPN_LOCK_IRQ was that this bit
20  *   was being "CLEARED" rather then "SET". Actually "SET" clears ZOL context
21  *
22  * Vineetg: May 5th 2008
23  *  -Modified CALLEE_REG save/restore macros to handle the fact that
24  *      r25 contains the kernel current task ptr
25  *  - Defined Stack Switching Macro to be reused in all intr/excp hdlrs
26  *  - Shaved off 11 instructions from RESTORE_ALL_INT1 by using the
27  *      address Write back load ld.ab instead of seperate ld/add instn
28  *
29  * Amit Bhor, Sameer Dhavale: Codito Technologies 2004
30  */
31 
32 #ifndef __ASM_ARC_ENTRY_COMPACT_H
33 #define __ASM_ARC_ENTRY_COMPACT_H
34 
35 #include <asm/asm-offsets.h>
36 #include <asm/irqflags-compact.h>
37 #include <asm/thread_info.h>	/* For THREAD_SIZE */
38 
39 #ifdef CONFIG_ARC_PLAT_EZNPS
40 #include <plat/ctop.h>
41 #endif
42 
43 /*--------------------------------------------------------------
44  * Switch to Kernel Mode stack if SP points to User Mode stack
45  *
46  * Entry   : r9 contains pre-IRQ/exception/trap status32
47  * Exit    : SP set to K mode stack
48  *           SP at the time of entry (K/U) saved @ pt_regs->sp
49  * Clobbers: r9
50  *-------------------------------------------------------------*/
51 
52 .macro SWITCH_TO_KERNEL_STK
53 
54 	/* User Mode when this happened ? Yes: Proceed to switch stack */
55 	bbit1   r9, STATUS_U_BIT, 88f
56 
57 	/* OK we were already in kernel mode when this event happened, thus can
58 	 * assume SP is kernel mode SP. _NO_ need to do any stack switching
59 	 */
60 
61 #ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
62 	/* However....
63 	 * If Level 2 Interrupts enabled, we may end up with a corner case:
64 	 * 1. User Task executing
65 	 * 2. L1 IRQ taken, ISR starts (CPU auto-switched to KERNEL mode)
66 	 * 3. But before it could switch SP from USER to KERNEL stack
67 	 *      a L2 IRQ "Interrupts" L1
68 	 * Thay way although L2 IRQ happened in Kernel mode, stack is still
69 	 * not switched.
70 	 * To handle this, we may need to switch stack even if in kernel mode
71 	 * provided SP has values in range of USER mode stack ( < 0x7000_0000 )
72 	 */
73 	brlo sp, VMALLOC_START, 88f
74 
75 	/* TODO: vineetg:
76 	 * We need to be a bit more cautious here. What if a kernel bug in
77 	 * L1 ISR, caused SP to go whaco (some small value which looks like
78 	 * USER stk) and then we take L2 ISR.
79 	 * Above brlo alone would treat it as a valid L1-L2 scenario
80 	 * instead of shouting around
81 	 * The only feasible way is to make sure this L2 happened in
82 	 * L1 prelogue ONLY i.e. ilink2 is less than a pre-set marker in
83 	 * L1 ISR before it switches stack
84 	 */
85 
86 #endif
87 
88     /*------Intr/Ecxp happened in kernel mode, SP already setup ------ */
89 	/* save it nevertheless @ pt_regs->sp for uniformity */
90 
91 	b.d	66f
92 	st	sp, [sp, PT_sp - SZ_PT_REGS]
93 
94 88: /*------Intr/Ecxp happened in user mode, "switch" stack ------ */
95 
96 	GET_CURR_TASK_ON_CPU   r9
97 
98 	/* With current tsk in r9, get it's kernel mode stack base */
99 	GET_TSK_STACK_BASE  r9, r9
100 
101 	/* save U mode SP @ pt_regs->sp */
102 	st	sp, [r9, PT_sp - SZ_PT_REGS]
103 
104 	/* final SP switch */
105 	mov	sp, r9
106 66:
107 .endm
108 
109 /*------------------------------------------------------------
110  * "FAKE" a rtie to return from CPU Exception context
111  * This is to re-enable Exceptions within exception
112  * Look at EV_ProtV to see how this is actually used
113  *-------------------------------------------------------------*/
114 
115 .macro FAKE_RET_FROM_EXCPN
116 
117 	lr	r9, [status32]
118 	bclr	r9, r9, STATUS_AE_BIT
119 	or	r9, r9, (STATUS_E1_MASK|STATUS_E2_MASK)
120 	sr	r9, [erstatus]
121 	mov	r9, 55f
122 	sr	r9, [eret]
123 	rtie
124 55:
125 .endm
126 
127 /*--------------------------------------------------------------
128  * For early Exception/ISR Prologue, a core reg is temporarily needed to
129  * code the rest of prolog (stack switching). This is done by stashing
130  * it to memory (non-SMP case) or SCRATCH0 Aux Reg (SMP).
131  *
132  * Before saving the full regfile - this reg is restored back, only
133  * to be saved again on kernel mode stack, as part of pt_regs.
134  *-------------------------------------------------------------*/
135 .macro PROLOG_FREEUP_REG	reg, mem
136 #ifdef CONFIG_SMP
137 	sr  \reg, [ARC_REG_SCRATCH_DATA0]
138 #else
139 	st  \reg, [\mem]
140 #endif
141 .endm
142 
143 .macro PROLOG_RESTORE_REG	reg, mem
144 #ifdef CONFIG_SMP
145 	lr  \reg, [ARC_REG_SCRATCH_DATA0]
146 #else
147 	ld  \reg, [\mem]
148 #endif
149 .endm
150 
151 /*--------------------------------------------------------------
152  * Exception Entry prologue
153  * -Switches stack to K mode (if not already)
154  * -Saves the register file
155  *
156  * After this it is safe to call the "C" handlers
157  *-------------------------------------------------------------*/
158 .macro EXCEPTION_PROLOGUE
159 
160 	/* Need at least 1 reg to code the early exception prologue */
161 	PROLOG_FREEUP_REG r9, @ex_saved_reg1
162 
163 	/* U/K mode at time of exception (stack not switched if already K) */
164 	lr  r9, [erstatus]
165 
166 	/* ARC700 doesn't provide auto-stack switching */
167 	SWITCH_TO_KERNEL_STK
168 
169 #ifdef CONFIG_ARC_CURR_IN_REG
170 	/* Treat r25 as scratch reg (save on stack) and load with "current" */
171 	PUSH    r25
172 	GET_CURR_TASK_ON_CPU   r25
173 #else
174 	sub     sp, sp, 4
175 #endif
176 
177 	st.a	r0, [sp, -8]    /* orig_r0 needed for syscall (skip ECR slot) */
178 	sub	sp, sp, 4	/* skip pt_regs->sp, already saved above */
179 
180 	/* Restore r9 used to code the early prologue */
181 	PROLOG_RESTORE_REG  r9, @ex_saved_reg1
182 
183 	/* now we are ready to save the regfile */
184 	SAVE_R0_TO_R12
185 	PUSH	gp
186 	PUSH	fp
187 	PUSH	blink
188 	PUSHAX	eret
189 	PUSHAX	erstatus
190 	PUSH	lp_count
191 	PUSHAX	lp_end
192 	PUSHAX	lp_start
193 	PUSHAX	erbta
194 
195 #ifdef CONFIG_ARC_PLAT_EZNPS
196 	.word CTOP_INST_SCHD_RW
197 	PUSHAX  CTOP_AUX_GPA1
198 	PUSHAX  CTOP_AUX_EFLAGS
199 #endif
200 
201 	lr	r9, [ecr]
202 	st      r9, [sp, PT_event]    /* EV_Trap expects r9 to have ECR */
203 .endm
204 
205 /*--------------------------------------------------------------
206  * Restore all registers used by system call or Exceptions
207  * SP should always be pointing to the next free stack element
208  * when entering this macro.
209  *
210  * NOTE:
211  *
212  * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
213  * for memory load operations. If used in that way interrupts are deffered
214  * by hardware and that is not good.
215  *-------------------------------------------------------------*/
216 .macro EXCEPTION_EPILOGUE
217 #ifdef CONFIG_ARC_PLAT_EZNPS
218 	.word CTOP_INST_SCHD_RW
219 	POPAX   CTOP_AUX_EFLAGS
220 	POPAX   CTOP_AUX_GPA1
221 #endif
222 
223 	POPAX	erbta
224 	POPAX	lp_start
225 	POPAX	lp_end
226 
227 	POP	r9
228 	mov	lp_count, r9	;LD to lp_count is not allowed
229 
230 	POPAX	erstatus
231 	POPAX	eret
232 	POP	blink
233 	POP	fp
234 	POP	gp
235 	RESTORE_R12_TO_R0
236 
237 #ifdef CONFIG_ARC_CURR_IN_REG
238 	ld	r25, [sp, 12]
239 #endif
240 	ld  sp, [sp] /* restore original sp */
241 	/* orig_r0, ECR, user_r25 skipped automatically */
242 .endm
243 
244 /* Dummy ECR values for Interrupts */
245 #define event_IRQ1		0x0031abcd
246 #define event_IRQ2		0x0032abcd
247 
248 .macro INTERRUPT_PROLOGUE  LVL
249 
250 	/* free up r9 as scratchpad */
251 	PROLOG_FREEUP_REG r9, @int\LVL\()_saved_reg
252 
253 	/* Which mode (user/kernel) was the system in when intr occurred */
254 	lr  r9, [status32_l\LVL\()]
255 
256 	SWITCH_TO_KERNEL_STK
257 
258 #ifdef CONFIG_ARC_CURR_IN_REG
259 	/* Treat r25 as scratch reg (save on stack) and load with "current" */
260 	PUSH    r25
261 	GET_CURR_TASK_ON_CPU   r25
262 #else
263 	sub     sp, sp, 4
264 #endif
265 
266 	PUSH	0x003\LVL\()abcd    /* Dummy ECR */
267 	sub	sp, sp, 8	    /* skip orig_r0 (not needed)
268 				       skip pt_regs->sp, already saved above */
269 
270 	/* Restore r9 used to code the early prologue */
271 	PROLOG_RESTORE_REG  r9, @int\LVL\()_saved_reg
272 
273 	SAVE_R0_TO_R12
274 	PUSH	gp
275 	PUSH	fp
276 	PUSH	blink
277 	PUSH	ilink\LVL\()
278 	PUSHAX	status32_l\LVL\()
279 	PUSH	lp_count
280 	PUSHAX	lp_end
281 	PUSHAX	lp_start
282 	PUSHAX	bta_l\LVL\()
283 
284 #ifdef CONFIG_ARC_PLAT_EZNPS
285 	.word CTOP_INST_SCHD_RW
286 	PUSHAX  CTOP_AUX_GPA1
287 	PUSHAX  CTOP_AUX_EFLAGS
288 #endif
289 .endm
290 
291 /*--------------------------------------------------------------
292  * Restore all registers used by interrupt handlers.
293  *
294  * NOTE:
295  *
296  * It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
297  * for memory load operations. If used in that way interrupts are deffered
298  * by hardware and that is not good.
299  *-------------------------------------------------------------*/
300 .macro INTERRUPT_EPILOGUE  LVL
301 #ifdef CONFIG_ARC_PLAT_EZNPS
302 	.word CTOP_INST_SCHD_RW
303 	POPAX   CTOP_AUX_EFLAGS
304 	POPAX   CTOP_AUX_GPA1
305 #endif
306 
307 	POPAX	bta_l\LVL\()
308 	POPAX	lp_start
309 	POPAX	lp_end
310 
311 	POP	r9
312 	mov	lp_count, r9	;LD to lp_count is not allowed
313 
314 	POPAX	status32_l\LVL\()
315 	POP	ilink\LVL\()
316 	POP	blink
317 	POP	fp
318 	POP	gp
319 	RESTORE_R12_TO_R0
320 
321 #ifdef CONFIG_ARC_CURR_IN_REG
322 	ld	r25, [sp, 12]
323 #endif
324 	ld  sp, [sp] /* restore original sp */
325 	/* orig_r0, ECR, user_r25 skipped automatically */
326 .endm
327 
328 /* Get thread_info of "current" tsk */
329 .macro GET_CURR_THR_INFO_FROM_SP  reg
330 	bic \reg, sp, (THREAD_SIZE - 1)
331 .endm
332 
333 #ifndef CONFIG_ARC_PLAT_EZNPS
334 /* Get CPU-ID of this core */
335 .macro  GET_CPU_ID  reg
336 	lr  \reg, [identity]
337 	lsr \reg, \reg, 8
338 	bmsk \reg, \reg, 7
339 .endm
340 #endif
341 
342 #endif  /* __ASM_ARC_ENTRY_COMPACT_H */
343