17321e2eaSEugeniy Paltsev /* SPDX-License-Identifier: GPL-2.0-only */ 27321e2eaSEugeniy Paltsev /* 37321e2eaSEugeniy Paltsev * Copyright (C) 2020 Synopsys, Inc. (www.synopsys.com) 47321e2eaSEugeniy Paltsev * 57321e2eaSEugeniy Paltsev * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> 67321e2eaSEugeniy Paltsev */ 77321e2eaSEugeniy Paltsev #ifndef __ASM_ARC_DSP_H 87321e2eaSEugeniy Paltsev #define __ASM_ARC_DSP_H 97321e2eaSEugeniy Paltsev 107321e2eaSEugeniy Paltsev #ifndef __ASSEMBLY__ 117321e2eaSEugeniy Paltsev 127321e2eaSEugeniy Paltsev /* 137321e2eaSEugeniy Paltsev * DSP-related saved registers - need to be saved only when you are 147321e2eaSEugeniy Paltsev * scheduled out. 157321e2eaSEugeniy Paltsev * structure fields name must correspond to aux register defenitions for 167321e2eaSEugeniy Paltsev * automatic offset calculation in DSP_AUX_SAVE_RESTORE macros 177321e2eaSEugeniy Paltsev */ 187321e2eaSEugeniy Paltsev struct dsp_callee_regs { 197321e2eaSEugeniy Paltsev unsigned long ACC0_GLO, ACC0_GHI, DSP_BFLY0, DSP_FFT_CTRL; 20f09d3174SEugeniy Paltsev #ifdef CONFIG_ARC_DSP_AGU_USERSPACE 21f09d3174SEugeniy Paltsev unsigned long AGU_AP0, AGU_AP1, AGU_AP2, AGU_AP3; 22f09d3174SEugeniy Paltsev unsigned long AGU_OS0, AGU_OS1; 23f09d3174SEugeniy Paltsev unsigned long AGU_MOD0, AGU_MOD1, AGU_MOD2, AGU_MOD3; 24f09d3174SEugeniy Paltsev #endif 257321e2eaSEugeniy Paltsev }; 267321e2eaSEugeniy Paltsev 277321e2eaSEugeniy Paltsev #endif /* !__ASSEMBLY__ */ 287321e2eaSEugeniy Paltsev 297321e2eaSEugeniy Paltsev #endif /* __ASM_ARC_DSP_H */ 30