1 /* 2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9 #ifndef __ARC_ASM_CACHE_H 10 #define __ARC_ASM_CACHE_H 11 12 /* In case $$ not config, setup a dummy number for rest of kernel */ 13 #ifndef CONFIG_ARC_CACHE_LINE_SHIFT 14 #define L1_CACHE_SHIFT 6 15 #else 16 #define L1_CACHE_SHIFT CONFIG_ARC_CACHE_LINE_SHIFT 17 #endif 18 19 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 20 21 #define ARC_ICACHE_WAYS 2 22 #define ARC_DCACHE_WAYS 4 23 24 /* Helpers */ 25 #define ARC_ICACHE_LINE_LEN L1_CACHE_BYTES 26 #define ARC_DCACHE_LINE_LEN L1_CACHE_BYTES 27 28 #define ICACHE_LINE_MASK (~(ARC_ICACHE_LINE_LEN - 1)) 29 #define DCACHE_LINE_MASK (~(ARC_DCACHE_LINE_LEN - 1)) 30 31 #if ARC_ICACHE_LINE_LEN != ARC_DCACHE_LINE_LEN 32 #error "Need to fix some code as I/D cache lines not same" 33 #else 34 #define is_not_cache_aligned(p) ((unsigned long)p & (~DCACHE_LINE_MASK)) 35 #endif 36 37 #ifndef __ASSEMBLY__ 38 39 /* Uncached access macros */ 40 #define arc_read_uncached_32(ptr) \ 41 ({ \ 42 unsigned int __ret; \ 43 __asm__ __volatile__( \ 44 " ld.di %0, [%1] \n" \ 45 : "=r"(__ret) \ 46 : "r"(ptr)); \ 47 __ret; \ 48 }) 49 50 #define arc_write_uncached_32(ptr, data)\ 51 ({ \ 52 __asm__ __volatile__( \ 53 " st.di %0, [%1] \n" \ 54 : \ 55 : "r"(data), "r"(ptr)); \ 56 }) 57 58 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES 59 60 /* 61 * ARC700 doesn't cache any access in top 256M. 62 * Ideal for wiring memory mapped peripherals as we don't need to do 63 * explicit uncached accesses (LD.di/ST.di) hence more portable drivers 64 */ 65 #define ARC_UNCACHED_ADDR_SPACE 0xc0000000 66 67 extern void arc_cache_init(void); 68 extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len); 69 extern void __init read_decode_cache_bcr(void); 70 #endif 71 72 #endif /* _ASM_CACHE_H */ 73