1/* 2 * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com) 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8/dts-v1/; 9 10/include/ "skeleton.dtsi" 11 12/ { 13 compatible = "snps,nsim"; 14 #address-cells = <1>; 15 #size-cells = <1>; 16 interrupt-parent = <&core_intc>; 17 18 chosen { 19 bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8"; 20 }; 21 22 aliases { 23 serial0 = &arcuart0; 24 }; 25 26 fpga { 27 compatible = "simple-bus"; 28 #address-cells = <1>; 29 #size-cells = <1>; 30 31 /* child and parent address space 1:1 mapped */ 32 ranges; 33 34 core_clk: core_clk { 35 #clock-cells = <0>; 36 compatible = "fixed-clock"; 37 clock-frequency = <80000000>; 38 }; 39 40 core_intc: interrupt-controller { 41 compatible = "snps,arc700-intc"; 42 interrupt-controller; 43 #interrupt-cells = <1>; 44 }; 45 46 arcuart0: serial@c0fc1000 { 47 compatible = "snps,arc-uart"; 48 reg = <0xc0fc1000 0x100>; 49 interrupts = <5>; 50 clock-frequency = <80000000>; 51 current-speed = <115200>; 52 status = "okay"; 53 }; 54 55 ethernet@c0fc2000 { 56 compatible = "snps,arc-emac"; 57 reg = <0xc0fc2000 0x3c>; 58 interrupts = <6>; 59 mac-address = [ 00 11 22 33 44 55 ]; 60 clock-frequency = <80000000>; 61 max-speed = <100>; 62 phy = <&phy0>; 63 64 #address-cells = <1>; 65 #size-cells = <0>; 66 phy0: ethernet-phy@0 { 67 reg = <1>; 68 }; 69 }; 70 71 arcpmu0: pmu { 72 compatible = "snps,arc700-pct"; 73 }; 74 }; 75}; 76