1/* 2 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com) 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9/* 10 * Device tree for AXC001 770D/EM6/AS221 CPU card 11 * Note that this file only supports the 770D CPU 12 */ 13 14/ { 15 compatible = "snps,arc"; 16 clock-frequency = <750000000>; /* 750 MHZ */ 17 #address-cells = <1>; 18 #size-cells = <1>; 19 20 cpu_card { 21 compatible = "simple-bus"; 22 #address-cells = <1>; 23 #size-cells = <1>; 24 25 ranges = <0x00000000 0xf0000000 0x10000000>; 26 27 cpu_intc: arc700-intc@cpu { 28 compatible = "snps,arc700-intc"; 29 interrupt-controller; 30 #interrupt-cells = <1>; 31 }; 32 33 /* 34 * this GPIO block ORs all interrupts on CPU card (creg,..) 35 * to uplink only 1 IRQ to ARC core intc 36 */ 37 dw-apb-gpio@0x2000 { 38 compatible = "snps,dw-apb-gpio"; 39 reg = < 0x2000 0x80 >; 40 #address-cells = <1>; 41 #size-cells = <0>; 42 43 ictl_intc: gpio-controller@0 { 44 compatible = "snps,dw-apb-gpio-port"; 45 gpio-controller; 46 #gpio-cells = <2>; 47 snps,nr-gpios = <30>; 48 reg = <0>; 49 interrupt-controller; 50 #interrupt-cells = <2>; 51 interrupt-parent = <&cpu_intc>; 52 interrupts = <15>; 53 }; 54 }; 55 56 debug_uart: dw-apb-uart@0x5000 { 57 compatible = "snps,dw-apb-uart"; 58 reg = <0x5000 0x100>; 59 clock-frequency = <33333000>; 60 interrupt-parent = <&ictl_intc>; 61 interrupts = <19 4>; 62 baud = <115200>; 63 reg-shift = <2>; 64 reg-io-width = <4>; 65 }; 66 67 arcpmu0: pmu { 68 compatible = "snps,arc700-pct"; 69 }; 70 }; 71 72 /* 73 * This INTC is actually connected to DW APB GPIO 74 * which acts as a wire between MB INTC and CPU INTC. 75 * GPIO INTC is configured in platform init code 76 * and here we mimic direct connection from MB INTC to 77 * CPU INTC, thus we set "interrupts = <7>" instead of 78 * "interrupts = <12>" 79 * 80 * This intc actually resides on MB, but we move it here to 81 * avoid duplicating the MB dtsi file given that IRQ from 82 * this intc to cpu intc are different for axs101 and axs103 83 */ 84 mb_intc: dw-apb-ictl@0xe0012000 { 85 #interrupt-cells = <1>; 86 compatible = "snps,dw-apb-ictl"; 87 reg = < 0xe0012000 0x200 >; 88 interrupt-controller; 89 interrupt-parent = <&cpu_intc>; 90 interrupts = < 7 >; 91 }; 92 93 memory { 94 #address-cells = <1>; 95 #size-cells = <1>; 96 ranges = <0x00000000 0x80000000 0x20000000>; 97 device_type = "memory"; 98 reg = <0x80000000 0x1b000000>; /* (512 - 32) MiB */ 99 }; 100 101 reserved-memory { 102 #address-cells = <1>; 103 #size-cells = <1>; 104 ranges; 105 /* 106 * We just move frame buffer area to the very end of 107 * available DDR. And even though in case of ARC770 there's 108 * no strict requirement for a frame-buffer to be in any 109 * particular location it allows us to use the same 110 * base board's DT node for ARC PGU as for ARc HS38. 111 */ 112 frame_buffer: frame_buffer@9e000000 { 113 compatible = "shared-dma-pool"; 114 reg = <0x9e000000 0x2000000>; 115 no-map; 116 }; 117 }; 118}; 119