xref: /openbmc/linux/arch/arc/Kconfig (revision cd5d5810) 
1#
2# Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License version 2 as
6# published by the Free Software Foundation.
7#
8
9config ARC
10	def_bool y
11	select CLONE_BACKWARDS
12	# ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
13	select DEVTMPFS if !INITRAMFS_SOURCE=""
14	select GENERIC_ATOMIC64
15	select GENERIC_CLOCKEVENTS
16	select GENERIC_FIND_FIRST_BIT
17	# for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
18	select GENERIC_IRQ_SHOW
19	select GENERIC_PENDING_IRQ if SMP
20	select GENERIC_SMP_IDLE_THREAD
21	select HAVE_ARCH_KGDB
22	select HAVE_ARCH_TRACEHOOK
23	select HAVE_IOREMAP_PROT
24	select HAVE_KPROBES
25	select HAVE_KRETPROBES
26	select HAVE_MEMBLOCK
27	select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
28	select HAVE_OPROFILE
29	select HAVE_PERF_EVENTS
30	select IRQ_DOMAIN
31	select MODULES_USE_ELF_RELA
32	select NO_BOOTMEM
33	select OF
34	select OF_EARLY_FLATTREE
35	select PERF_USE_VMALLOC
36	select HAVE_DEBUG_STACKOVERFLOW
37
38config SCHED_OMIT_FRAME_POINTER
39	def_bool y
40
41config GENERIC_CSUM
42	def_bool y
43
44config RWSEM_GENERIC_SPINLOCK
45	def_bool y
46
47config ARCH_FLATMEM_ENABLE
48	def_bool y
49
50config MMU
51	def_bool y
52
53config NO_IOPORT
54	def_bool y
55
56config GENERIC_CALIBRATE_DELAY
57	def_bool y
58
59config GENERIC_HWEIGHT
60	def_bool y
61
62config STACKTRACE_SUPPORT
63	def_bool y
64	select STACKTRACE
65
66config HAVE_LATENCYTOP_SUPPORT
67	def_bool y
68
69config NO_DMA
70	def_bool n
71
72source "init/Kconfig"
73source "kernel/Kconfig.freezer"
74
75menu "ARC Architecture Configuration"
76
77menu "ARC Platform/SoC/Board"
78
79source "arch/arc/plat-arcfpga/Kconfig"
80source "arch/arc/plat-tb10x/Kconfig"
81#New platform adds here
82
83endmenu
84
85menu "ARC CPU Configuration"
86
87choice
88	prompt "ARC Core"
89	default ARC_CPU_770
90
91config ARC_CPU_750D
92	bool "ARC750D"
93	help
94	  Support for ARC750 core
95
96config ARC_CPU_770
97	bool "ARC770"
98	select ARC_CPU_REL_4_10
99	help
100	  Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
101	  This core has a bunch of cool new features:
102	  -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
103                   Shared Address Spaces (for sharing TLB entires in MMU)
104	  -Caches: New Prog Model, Region Flush
105	  -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
106
107endchoice
108
109config CPU_BIG_ENDIAN
110	bool "Enable Big Endian Mode"
111	default n
112	help
113	  Build kernel for Big Endian Mode of ARC CPU
114
115# If a platform can't work with 0x8000_0000 based dma_addr_t
116config ARC_PLAT_NEEDS_CPU_TO_DMA
117	bool
118
119config SMP
120	bool "Symmetric Multi-Processing (Incomplete)"
121	default n
122	select USE_GENERIC_SMP_HELPERS
123	help
124	  This enables support for systems with more than one CPU. If you have
125	  a system with only one CPU, like most personal computers, say N. If
126	  you have a system with more than one CPU, say Y.
127
128if SMP
129
130config ARC_HAS_COH_CACHES
131	def_bool n
132
133config ARC_HAS_COH_RTSC
134	def_bool n
135
136config ARC_HAS_REENTRANT_IRQ_LV2
137	def_bool n
138
139endif
140
141config NR_CPUS
142	int "Maximum number of CPUs (2-32)"
143	range 2 32
144	depends on SMP
145	default "2"
146
147menuconfig ARC_CACHE
148	bool "Enable Cache Support"
149	default y
150	# if SMP, cache enabled ONLY if ARC implementation has cache coherency
151	depends on !SMP || ARC_HAS_COH_CACHES
152
153if ARC_CACHE
154
155config ARC_CACHE_LINE_SHIFT
156	int "Cache Line Length (as power of 2)"
157	range 5 7
158	default "6"
159	help
160	  Starting with ARC700 4.9, Cache line length is configurable,
161	  This option specifies "N", with Line-len = 2 power N
162	  So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
163	  Linux only supports same line lengths for I and D caches.
164
165config ARC_HAS_ICACHE
166	bool "Use Instruction Cache"
167	default y
168
169config ARC_HAS_DCACHE
170	bool "Use Data Cache"
171	default y
172
173config ARC_CACHE_PAGES
174	bool "Per Page Cache Control"
175	default y
176	depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
177	help
178	  This can be used to over-ride the global I/D Cache Enable on a
179	  per-page basis (but only for pages accessed via MMU such as
180	  Kernel Virtual address or User Virtual Address)
181	  TLB entries have a per-page Cache Enable Bit.
182	  Note that Global I/D ENABLE + Per Page DISABLE works but corollary
183	  Global DISABLE + Per Page ENABLE won't work
184
185config ARC_CACHE_VIPT_ALIASING
186	bool "Support VIPT Aliasing D$"
187	depends on ARC_HAS_DCACHE
188	default n
189
190endif	#ARC_CACHE
191
192config ARC_HAS_ICCM
193	bool "Use ICCM"
194	help
195	  Single Cycle RAMS to store Fast Path Code
196	default n
197
198config ARC_ICCM_SZ
199	int "ICCM Size in KB"
200	default "64"
201	depends on ARC_HAS_ICCM
202
203config ARC_HAS_DCCM
204	bool "Use DCCM"
205	help
206	  Single Cycle RAMS to store Fast Path Data
207	default n
208
209config ARC_DCCM_SZ
210	int "DCCM Size in KB"
211	default "64"
212	depends on ARC_HAS_DCCM
213
214config ARC_DCCM_BASE
215	hex "DCCM map address"
216	default "0xA0000000"
217	depends on ARC_HAS_DCCM
218
219config ARC_HAS_HW_MPY
220	bool "Use Hardware Multiplier (Normal or Faster XMAC)"
221	default y
222	help
223	  Influences how gcc generates code for MPY operations.
224	  If enabled, MPYxx insns are generated, provided by Standard/XMAC
225	  Multipler. Otherwise software multipy lib is used
226
227choice
228	prompt "ARC700 MMU Version"
229	default ARC_MMU_V3 if ARC_CPU_770
230	default ARC_MMU_V2 if ARC_CPU_750D
231
232config ARC_MMU_V1
233	bool "MMU v1"
234	help
235	  Orig ARC700 MMU
236
237config ARC_MMU_V2
238	bool "MMU v2"
239	help
240	  Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
241	  when 2 D-TLB and 1 I-TLB entries index into same 2way set.
242
243config ARC_MMU_V3
244	bool "MMU v3"
245	depends on ARC_CPU_770
246	help
247	  Introduced with ARC700 4.10: New Features
248	  Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
249	  Shared Address Spaces (SASID)
250
251endchoice
252
253
254choice
255	prompt "MMU Page Size"
256	default ARC_PAGE_SIZE_8K
257
258config ARC_PAGE_SIZE_8K
259	bool "8KB"
260	help
261	  Choose between 8k vs 16k
262
263config ARC_PAGE_SIZE_16K
264	bool "16KB"
265	depends on ARC_MMU_V3
266
267config ARC_PAGE_SIZE_4K
268	bool "4KB"
269	depends on ARC_MMU_V3
270
271endchoice
272
273config ARC_COMPACT_IRQ_LEVELS
274	bool "ARCompact IRQ Priorities: High(2)/Low(1)"
275	default n
276	# Timer HAS to be high priority, for any other high priority config
277	select ARC_IRQ3_LV2
278	# if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
279	depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
280
281if ARC_COMPACT_IRQ_LEVELS
282
283config ARC_IRQ3_LV2
284	bool
285
286config ARC_IRQ5_LV2
287	bool
288
289config ARC_IRQ6_LV2
290	bool
291
292endif
293
294config ARC_FPU_SAVE_RESTORE
295	bool "Enable FPU state persistence across context switch"
296	default n
297	help
298	  Double Precision Floating Point unit had dedictaed regs which
299	  need to be saved/restored across context-switch.
300	  Note that ARC FPU is overly simplistic, unlike say x86, which has
301	  hardware pieces to allow software to conditionally save/restore,
302	  based on actual usage of FPU by a task. Thus our implemn does
303	  this for all tasks in system.
304
305config ARC_CANT_LLSC
306	def_bool n
307
308menuconfig ARC_CPU_REL_4_10
309	bool "Enable support for Rel 4.10 features"
310	default n
311	help
312	  -ARC770 (and dependent features) enabled
313	  -ARC750 also shares some of the new features with 770
314
315config ARC_HAS_LLSC
316	bool "Insn: LLOCK/SCOND (efficient atomic ops)"
317	default y
318	depends on ARC_CPU_770 && !ARC_CANT_LLSC
319
320config ARC_HAS_SWAPE
321	bool "Insn: SWAPE (endian-swap)"
322	default y
323	depends on ARC_CPU_REL_4_10
324
325config ARC_HAS_RTSC
326	bool "Insn: RTSC (64-bit r/o cycle counter)"
327	default y
328	depends on ARC_CPU_REL_4_10
329	# if SMP, enable RTSC only if counter is coherent across cores
330	depends on !SMP || ARC_HAS_COH_RTSC
331
332endmenu   # "ARC CPU Configuration"
333
334config LINUX_LINK_BASE
335	hex "Linux Link Address"
336	default "0x80000000"
337	help
338	  ARC700 divides the 32 bit phy address space into two equal halves
339	  -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
340	  -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
341	  Typically Linux kernel is linked at the start of untransalted addr,
342	  hence the default value of 0x8zs.
343	  However some customers have peripherals mapped at this addr, so
344	  Linux needs to be scooted a bit.
345	  If you don't know what the above means, leave this setting alone.
346
347config ARC_CURR_IN_REG
348	bool "Dedicate Register r25 for current_task pointer"
349	default y
350	help
351	  This reserved Register R25 to point to Current Task in
352	  kernel mode. This saves memory access for each such access
353
354
355config ARC_MISALIGN_ACCESS
356	bool "Emulate unaligned memory access (userspace only)"
357	default N
358	select SYSCTL_ARCH_UNALIGN_NO_WARN
359	select SYSCTL_ARCH_UNALIGN_ALLOW
360	help
361	  This enables misaligned 16 & 32 bit memory access from user space.
362	  Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
363	  potential bugs in code
364
365config HZ
366	int "Timer Frequency"
367	default 100
368
369config ARC_METAWARE_HLINK
370	bool "Support for Metaware debugger assisted Host access"
371	default n
372	help
373	  This options allows a Linux userland apps to directly access
374	  host file system (open/creat/read/write etc) with help from
375	  Metaware Debugger. This can come in handy for Linux-host communication
376	  when there is no real usable peripheral such as EMAC.
377
378menuconfig ARC_DBG
379	bool "ARC debugging"
380	default y
381
382config ARC_DW2_UNWIND
383	bool "Enable DWARF specific kernel stack unwind"
384	depends on ARC_DBG
385	default y
386	select KALLSYMS
387	help
388	  Compiles the kernel with DWARF unwind information and can be used
389	  to get stack backtraces.
390
391	  If you say Y here the resulting kernel image will be slightly larger
392	  but not slower, and it will give very useful debugging information.
393	  If you don't debug the kernel, you can say N, but we may not be able
394	  to solve problems without frame unwind information
395
396config ARC_DBG_TLB_PARANOIA
397	bool "Paranoia Checks in Low Level TLB Handlers"
398	depends on ARC_DBG
399	default n
400
401config ARC_DBG_TLB_MISS_COUNT
402	bool "Profile TLB Misses"
403	default n
404	select DEBUG_FS
405	depends on ARC_DBG
406	help
407	  Counts number of I and D TLB Misses and exports them via Debugfs
408	  The counters can be cleared via Debugfs as well
409
410config CMDLINE_UBOOT
411	bool "Support U-boot kernel command line passing"
412	default n
413	help
414	  If you are using U-boot (www.denx.de) and wish to pass the kernel
415	  command line from the U-boot environment to the Linux kernel then
416	  switch this option on.
417	  ARC U-boot will setup the cmdline in RAM/flash and set r2 to point
418	  to it. kernel startup code will append this to DeviceTree
419	  /bootargs provided cmdline args.
420
421config ARC_BUILTIN_DTB_NAME
422	string "Built in DTB"
423	help
424	  Set the name of the DTB to embed in the vmlinux binary
425	  Leaving it blank selects the minimal "skeleton" dtb
426
427source "kernel/Kconfig.preempt"
428
429menu "Executable file formats"
430source "fs/Kconfig.binfmt"
431endmenu
432
433endmenu	 # "ARC Architecture Configuration"
434
435source "mm/Kconfig"
436source "net/Kconfig"
437source "drivers/Kconfig"
438source "fs/Kconfig"
439source "arch/arc/Kconfig.debug"
440source "security/Kconfig"
441source "crypto/Kconfig"
442source "lib/Kconfig"
443