1# 2# Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 3# 4# This program is free software; you can redistribute it and/or modify 5# it under the terms of the GNU General Public License version 2 as 6# published by the Free Software Foundation. 7# 8 9config ARC 10 def_bool y 11 select CLONE_BACKWARDS 12 # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev 13 select DEVTMPFS if !INITRAMFS_SOURCE="" 14 select GENERIC_ATOMIC64 15 select GENERIC_CLOCKEVENTS 16 select GENERIC_FIND_FIRST_BIT 17 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP 18 select GENERIC_IRQ_SHOW 19 select GENERIC_KERNEL_EXECVE 20 select GENERIC_KERNEL_THREAD 21 select GENERIC_PENDING_IRQ if SMP 22 select GENERIC_SMP_IDLE_THREAD 23 select HAVE_ARCH_KGDB 24 select HAVE_ARCH_TRACEHOOK 25 select HAVE_GENERIC_HARDIRQS 26 select HAVE_IOREMAP_PROT 27 select HAVE_KPROBES 28 select HAVE_KRETPROBES 29 select HAVE_MEMBLOCK 30 select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND 31 select HAVE_OPROFILE 32 select HAVE_PERF_EVENTS 33 select IRQ_DOMAIN 34 select MODULES_USE_ELF_RELA 35 select NO_BOOTMEM 36 select OF 37 select OF_EARLY_FLATTREE 38 select PERF_USE_VMALLOC 39 40config SCHED_OMIT_FRAME_POINTER 41 def_bool y 42 43config GENERIC_CSUM 44 def_bool y 45 46config RWSEM_GENERIC_SPINLOCK 47 def_bool y 48 49config ARCH_FLATMEM_ENABLE 50 def_bool y 51 52config MMU 53 def_bool y 54 55config NO_IOPORT 56 def_bool y 57 58config GENERIC_CALIBRATE_DELAY 59 def_bool y 60 61config GENERIC_HWEIGHT 62 def_bool y 63 64config BINFMT_ELF 65 def_bool y 66 67config STACKTRACE_SUPPORT 68 def_bool y 69 select STACKTRACE 70 71config HAVE_LATENCYTOP_SUPPORT 72 def_bool y 73 74config NO_DMA 75 def_bool n 76 77source "init/Kconfig" 78source "kernel/Kconfig.freezer" 79 80menu "ARC Architecture Configuration" 81 82menu "ARC Platform/SoC/Board" 83 84source "arch/arc/plat-arcfpga/Kconfig" 85#New platform adds here 86 87endmenu 88 89menu "ARC CPU Configuration" 90 91choice 92 prompt "ARC Core" 93 default ARC_CPU_770 94 95config ARC_CPU_750D 96 bool "ARC750D" 97 help 98 Support for ARC750 core 99 100config ARC_CPU_770 101 bool "ARC770" 102 select ARC_CPU_REL_4_10 103 help 104 Support for ARC770 core introduced with Rel 4.10 (Summer 2011) 105 This core has a bunch of cool new features: 106 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4) 107 Shared Address Spaces (for sharing TLB entires in MMU) 108 -Caches: New Prog Model, Region Flush 109 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr 110 111endchoice 112 113config CPU_BIG_ENDIAN 114 bool "Enable Big Endian Mode" 115 default n 116 help 117 Build kernel for Big Endian Mode of ARC CPU 118 119# If a platform can't work with 0x8000_0000 based dma_addr_t 120config ARC_PLAT_NEEDS_CPU_TO_DMA 121 bool 122 123config SMP 124 bool "Symmetric Multi-Processing (Incomplete)" 125 default n 126 select USE_GENERIC_SMP_HELPERS 127 help 128 This enables support for systems with more than one CPU. If you have 129 a system with only one CPU, like most personal computers, say N. If 130 you have a system with more than one CPU, say Y. 131 132if SMP 133 134config ARC_HAS_COH_CACHES 135 def_bool n 136 137config ARC_HAS_COH_LLSC 138 def_bool n 139 140config ARC_HAS_COH_RTSC 141 def_bool n 142 143config ARC_HAS_REENTRANT_IRQ_LV2 144 def_bool n 145 146endif 147 148config NR_CPUS 149 int "Maximum number of CPUs (2-32)" 150 range 2 32 151 depends on SMP 152 default "2" 153 154menuconfig ARC_CACHE 155 bool "Enable Cache Support" 156 default y 157 # if SMP, cache enabled ONLY if ARC implementation has cache coherency 158 depends on !SMP || ARC_HAS_COH_CACHES 159 160if ARC_CACHE 161 162config ARC_CACHE_LINE_SHIFT 163 int "Cache Line Length (as power of 2)" 164 range 5 7 165 default "6" 166 help 167 Starting with ARC700 4.9, Cache line length is configurable, 168 This option specifies "N", with Line-len = 2 power N 169 So line lengths of 32, 64, 128 are specified by 5,6,7, respectively 170 Linux only supports same line lengths for I and D caches. 171 172config ARC_HAS_ICACHE 173 bool "Use Instruction Cache" 174 default y 175 176config ARC_HAS_DCACHE 177 bool "Use Data Cache" 178 default y 179 180config ARC_CACHE_PAGES 181 bool "Per Page Cache Control" 182 default y 183 depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE 184 help 185 This can be used to over-ride the global I/D Cache Enable on a 186 per-page basis (but only for pages accessed via MMU such as 187 Kernel Virtual address or User Virtual Address) 188 TLB entries have a per-page Cache Enable Bit. 189 Note that Global I/D ENABLE + Per Page DISABLE works but corollary 190 Global DISABLE + Per Page ENABLE won't work 191 192endif #ARC_CACHE 193 194config ARC_HAS_ICCM 195 bool "Use ICCM" 196 help 197 Single Cycle RAMS to store Fast Path Code 198 default n 199 200config ARC_ICCM_SZ 201 int "ICCM Size in KB" 202 default "64" 203 depends on ARC_HAS_ICCM 204 205config ARC_HAS_DCCM 206 bool "Use DCCM" 207 help 208 Single Cycle RAMS to store Fast Path Data 209 default n 210 211config ARC_DCCM_SZ 212 int "DCCM Size in KB" 213 default "64" 214 depends on ARC_HAS_DCCM 215 216config ARC_DCCM_BASE 217 hex "DCCM map address" 218 default "0xA0000000" 219 depends on ARC_HAS_DCCM 220 221config ARC_HAS_HW_MPY 222 bool "Use Hardware Multiplier (Normal or Faster XMAC)" 223 default y 224 help 225 Influences how gcc generates code for MPY operations. 226 If enabled, MPYxx insns are generated, provided by Standard/XMAC 227 Multipler. Otherwise software multipy lib is used 228 229choice 230 prompt "ARC700 MMU Version" 231 default ARC_MMU_V3 if ARC_CPU_770 232 default ARC_MMU_V2 if ARC_CPU_750D 233 234config ARC_MMU_V1 235 bool "MMU v1" 236 help 237 Orig ARC700 MMU 238 239config ARC_MMU_V2 240 bool "MMU v2" 241 help 242 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio 243 when 2 D-TLB and 1 I-TLB entries index into same 2way set. 244 245config ARC_MMU_V3 246 bool "MMU v3" 247 depends on ARC_CPU_770 248 help 249 Introduced with ARC700 4.10: New Features 250 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4) 251 Shared Address Spaces (SASID) 252 253endchoice 254 255 256choice 257 prompt "MMU Page Size" 258 default ARC_PAGE_SIZE_8K 259 260config ARC_PAGE_SIZE_8K 261 bool "8KB" 262 help 263 Choose between 8k vs 16k 264 265config ARC_PAGE_SIZE_16K 266 bool "16KB" 267 depends on ARC_MMU_V3 268 269config ARC_PAGE_SIZE_4K 270 bool "4KB" 271 depends on ARC_MMU_V3 272 273endchoice 274 275config ARC_COMPACT_IRQ_LEVELS 276 bool "ARCompact IRQ Priorities: High(2)/Low(1)" 277 default n 278 # Timer HAS to be high priority, for any other high priority config 279 select ARC_IRQ3_LV2 280 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy 281 depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2 282 283if ARC_COMPACT_IRQ_LEVELS 284 285config ARC_IRQ3_LV2 286 bool 287 288config ARC_IRQ5_LV2 289 bool 290 291config ARC_IRQ6_LV2 292 bool 293 294endif 295 296config ARC_FPU_SAVE_RESTORE 297 bool "Enable FPU state persistence across context switch" 298 default n 299 help 300 Double Precision Floating Point unit had dedictaed regs which 301 need to be saved/restored across context-switch. 302 Note that ARC FPU is overly simplistic, unlike say x86, which has 303 hardware pieces to allow software to conditionally save/restore, 304 based on actual usage of FPU by a task. Thus our implemn does 305 this for all tasks in system. 306 307menuconfig ARC_CPU_REL_4_10 308 bool "Enable support for Rel 4.10 features" 309 default n 310 help 311 -ARC770 (and dependent features) enabled 312 -ARC750 also shares some of the new features with 770 313 314config ARC_HAS_LLSC 315 bool "Insn: LLOCK/SCOND (efficient atomic ops)" 316 default y 317 depends on ARC_CPU_770 318 # if SMP, enable LLSC ONLY if ARC implementation has coherent atomics 319 depends on !SMP || ARC_HAS_COH_LLSC 320 321config ARC_HAS_SWAPE 322 bool "Insn: SWAPE (endian-swap)" 323 default y 324 depends on ARC_CPU_REL_4_10 325 326config ARC_HAS_RTSC 327 bool "Insn: RTSC (64-bit r/o cycle counter)" 328 default y 329 depends on ARC_CPU_REL_4_10 330 # if SMP, enable RTSC only if counter is coherent across cores 331 depends on !SMP || ARC_HAS_COH_RTSC 332 333endmenu # "ARC CPU Configuration" 334 335config LINUX_LINK_BASE 336 hex "Linux Link Address" 337 default "0x80000000" 338 help 339 ARC700 divides the 32 bit phy address space into two equal halves 340 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU 341 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel 342 Typically Linux kernel is linked at the start of untransalted addr, 343 hence the default value of 0x8zs. 344 However some customers have peripherals mapped at this addr, so 345 Linux needs to be scooted a bit. 346 If you don't know what the above means, leave this setting alone. 347 348config ARC_CURR_IN_REG 349 bool "Dedicate Register r25 for current_task pointer" 350 default y 351 help 352 This reserved Register R25 to point to Current Task in 353 kernel mode. This saves memory access for each such access 354 355 356config ARC_MISALIGN_ACCESS 357 bool "Emulate unaligned memory access (userspace only)" 358 default N 359 select SYSCTL_ARCH_UNALIGN_NO_WARN 360 select SYSCTL_ARCH_UNALIGN_ALLOW 361 help 362 This enables misaligned 16 & 32 bit memory access from user space. 363 Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide 364 potential bugs in code 365 366config ARC_STACK_NONEXEC 367 bool "Make stack non-executable" 368 default n 369 help 370 To disable the execute permissions of stack/heap of processes 371 which are enabled by default. 372 373config HZ 374 int "Timer Frequency" 375 default 100 376 377config ARC_METAWARE_HLINK 378 bool "Support for Metaware debugger assisted Host access" 379 default n 380 help 381 This options allows a Linux userland apps to directly access 382 host file system (open/creat/read/write etc) with help from 383 Metaware Debugger. This can come in handy for Linux-host communication 384 when there is no real usable peripheral such as EMAC. 385 386menuconfig ARC_DBG 387 bool "ARC debugging" 388 default y 389 390config ARC_DW2_UNWIND 391 bool "Enable DWARF specific kernel stack unwind" 392 depends on ARC_DBG 393 default y 394 select KALLSYMS 395 help 396 Compiles the kernel with DWARF unwind information and can be used 397 to get stack backtraces. 398 399 If you say Y here the resulting kernel image will be slightly larger 400 but not slower, and it will give very useful debugging information. 401 If you don't debug the kernel, you can say N, but we may not be able 402 to solve problems without frame unwind information 403 404config ARC_DBG_TLB_PARANOIA 405 bool "Paranoia Checks in Low Level TLB Handlers" 406 depends on ARC_DBG 407 default n 408 409config ARC_DBG_TLB_MISS_COUNT 410 bool "Profile TLB Misses" 411 default n 412 select DEBUG_FS 413 depends on ARC_DBG 414 help 415 Counts number of I and D TLB Misses and exports them via Debugfs 416 The counters can be cleared via Debugfs as well 417 418config CMDLINE 419 string "Kernel command line to built-in" 420 default "print-fatal-signals=1" 421 help 422 The default command line which will be appended to the optional 423 u-boot provided command line (see below) 424 425config CMDLINE_UBOOT 426 bool "Support U-boot kernel command line passing" 427 default n 428 help 429 If you are using U-boot (www.denx.de) and wish to pass the kernel 430 command line from the U-boot environment to the Linux kernel then 431 switch this option on. 432 ARC U-boot will setup the cmdline in RAM/flash and set r2 to point 433 to it. kernel startup code will copy the string into cmdline buffer 434 and also append CONFIG_CMDLINE. 435 436config ARC_BUILTIN_DTB_NAME 437 string "Built in DTB" 438 help 439 Set the name of the DTB to embed in the vmlinux binary 440 Leaving it blank selects the minimal "skeleton" dtb 441 442source "kernel/Kconfig.preempt" 443 444endmenu # "ARC Architecture Configuration" 445 446source "mm/Kconfig" 447source "net/Kconfig" 448source "drivers/Kconfig" 449source "fs/Kconfig" 450source "arch/arc/Kconfig.debug" 451source "security/Kconfig" 452source "crypto/Kconfig" 453source "lib/Kconfig" 454