xref: /openbmc/linux/arch/arc/Kconfig (revision 84d517f3)
1#
2# Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License version 2 as
6# published by the Free Software Foundation.
7#
8
9config ARC
10	def_bool y
11	select BUILDTIME_EXTABLE_SORT
12	select CLONE_BACKWARDS
13	# ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
14	select DEVTMPFS if !INITRAMFS_SOURCE=""
15	select GENERIC_ATOMIC64
16	select GENERIC_CLOCKEVENTS
17	select GENERIC_FIND_FIRST_BIT
18	# for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
19	select GENERIC_IRQ_SHOW
20	select GENERIC_PENDING_IRQ if SMP
21	select GENERIC_SMP_IDLE_THREAD
22	select HAVE_ARCH_KGDB
23	select HAVE_ARCH_TRACEHOOK
24	select HAVE_IOREMAP_PROT
25	select HAVE_KPROBES
26	select HAVE_KRETPROBES
27	select HAVE_MEMBLOCK
28	select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
29	select HAVE_OPROFILE
30	select HAVE_PERF_EVENTS
31	select IRQ_DOMAIN
32	select MODULES_USE_ELF_RELA
33	select NO_BOOTMEM
34	select OF
35	select OF_EARLY_FLATTREE
36	select PERF_USE_VMALLOC
37	select HAVE_DEBUG_STACKOVERFLOW
38
39config TRACE_IRQFLAGS_SUPPORT
40	def_bool y
41
42config LOCKDEP_SUPPORT
43	def_bool y
44
45config SCHED_OMIT_FRAME_POINTER
46	def_bool y
47
48config GENERIC_CSUM
49	def_bool y
50
51config RWSEM_GENERIC_SPINLOCK
52	def_bool y
53
54config ARCH_FLATMEM_ENABLE
55	def_bool y
56
57config MMU
58	def_bool y
59
60config NO_IOPORT_MAP
61	def_bool y
62
63config GENERIC_CALIBRATE_DELAY
64	def_bool y
65
66config GENERIC_HWEIGHT
67	def_bool y
68
69config STACKTRACE_SUPPORT
70	def_bool y
71	select STACKTRACE
72
73config HAVE_LATENCYTOP_SUPPORT
74	def_bool y
75
76config NO_DMA
77	def_bool n
78
79source "init/Kconfig"
80source "kernel/Kconfig.freezer"
81
82menu "ARC Architecture Configuration"
83
84menu "ARC Platform/SoC/Board"
85
86source "arch/arc/plat-arcfpga/Kconfig"
87source "arch/arc/plat-tb10x/Kconfig"
88#New platform adds here
89
90endmenu
91
92menu "ARC CPU Configuration"
93
94choice
95	prompt "ARC Core"
96	default ARC_CPU_770
97
98config ARC_CPU_750D
99	bool "ARC750D"
100	help
101	  Support for ARC750 core
102
103config ARC_CPU_770
104	bool "ARC770"
105	select ARC_CPU_REL_4_10
106	help
107	  Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
108	  This core has a bunch of cool new features:
109	  -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
110                   Shared Address Spaces (for sharing TLB entires in MMU)
111	  -Caches: New Prog Model, Region Flush
112	  -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
113
114endchoice
115
116config CPU_BIG_ENDIAN
117	bool "Enable Big Endian Mode"
118	default n
119	help
120	  Build kernel for Big Endian Mode of ARC CPU
121
122# If a platform can't work with 0x8000_0000 based dma_addr_t
123config ARC_PLAT_NEEDS_CPU_TO_DMA
124	bool
125
126config SMP
127	bool "Symmetric Multi-Processing (Incomplete)"
128	default n
129	help
130	  This enables support for systems with more than one CPU. If you have
131	  a system with only one CPU, say N. If you have a system with more
132	  than one CPU, say Y.
133
134if SMP
135
136config ARC_HAS_COH_CACHES
137	def_bool n
138
139config ARC_HAS_REENTRANT_IRQ_LV2
140	def_bool n
141
142endif
143
144config NR_CPUS
145	int "Maximum number of CPUs (2-4096)"
146	range 2 4096
147	depends on SMP
148	default "2"
149
150menuconfig ARC_CACHE
151	bool "Enable Cache Support"
152	default y
153	# if SMP, cache enabled ONLY if ARC implementation has cache coherency
154	depends on !SMP || ARC_HAS_COH_CACHES
155
156if ARC_CACHE
157
158config ARC_CACHE_LINE_SHIFT
159	int "Cache Line Length (as power of 2)"
160	range 5 7
161	default "6"
162	help
163	  Starting with ARC700 4.9, Cache line length is configurable,
164	  This option specifies "N", with Line-len = 2 power N
165	  So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
166	  Linux only supports same line lengths for I and D caches.
167
168config ARC_HAS_ICACHE
169	bool "Use Instruction Cache"
170	default y
171
172config ARC_HAS_DCACHE
173	bool "Use Data Cache"
174	default y
175
176config ARC_CACHE_PAGES
177	bool "Per Page Cache Control"
178	default y
179	depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
180	help
181	  This can be used to over-ride the global I/D Cache Enable on a
182	  per-page basis (but only for pages accessed via MMU such as
183	  Kernel Virtual address or User Virtual Address)
184	  TLB entries have a per-page Cache Enable Bit.
185	  Note that Global I/D ENABLE + Per Page DISABLE works but corollary
186	  Global DISABLE + Per Page ENABLE won't work
187
188config ARC_CACHE_VIPT_ALIASING
189	bool "Support VIPT Aliasing D$"
190	depends on ARC_HAS_DCACHE
191	default n
192
193endif	#ARC_CACHE
194
195config ARC_HAS_ICCM
196	bool "Use ICCM"
197	help
198	  Single Cycle RAMS to store Fast Path Code
199	default n
200
201config ARC_ICCM_SZ
202	int "ICCM Size in KB"
203	default "64"
204	depends on ARC_HAS_ICCM
205
206config ARC_HAS_DCCM
207	bool "Use DCCM"
208	help
209	  Single Cycle RAMS to store Fast Path Data
210	default n
211
212config ARC_DCCM_SZ
213	int "DCCM Size in KB"
214	default "64"
215	depends on ARC_HAS_DCCM
216
217config ARC_DCCM_BASE
218	hex "DCCM map address"
219	default "0xA0000000"
220	depends on ARC_HAS_DCCM
221
222config ARC_HAS_HW_MPY
223	bool "Use Hardware Multiplier (Normal or Faster XMAC)"
224	default y
225	help
226	  Influences how gcc generates code for MPY operations.
227	  If enabled, MPYxx insns are generated, provided by Standard/XMAC
228	  Multipler. Otherwise software multipy lib is used
229
230choice
231	prompt "ARC700 MMU Version"
232	default ARC_MMU_V3 if ARC_CPU_770
233	default ARC_MMU_V2 if ARC_CPU_750D
234
235config ARC_MMU_V1
236	bool "MMU v1"
237	help
238	  Orig ARC700 MMU
239
240config ARC_MMU_V2
241	bool "MMU v2"
242	help
243	  Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
244	  when 2 D-TLB and 1 I-TLB entries index into same 2way set.
245
246config ARC_MMU_V3
247	bool "MMU v3"
248	depends on ARC_CPU_770
249	help
250	  Introduced with ARC700 4.10: New Features
251	  Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
252	  Shared Address Spaces (SASID)
253
254endchoice
255
256
257choice
258	prompt "MMU Page Size"
259	default ARC_PAGE_SIZE_8K
260
261config ARC_PAGE_SIZE_8K
262	bool "8KB"
263	help
264	  Choose between 8k vs 16k
265
266config ARC_PAGE_SIZE_16K
267	bool "16KB"
268	depends on ARC_MMU_V3
269
270config ARC_PAGE_SIZE_4K
271	bool "4KB"
272	depends on ARC_MMU_V3
273
274endchoice
275
276config ARC_COMPACT_IRQ_LEVELS
277	bool "ARCompact IRQ Priorities: High(2)/Low(1)"
278	default n
279	# Timer HAS to be high priority, for any other high priority config
280	select ARC_IRQ3_LV2
281	# if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
282	depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
283
284if ARC_COMPACT_IRQ_LEVELS
285
286config ARC_IRQ3_LV2
287	bool
288
289config ARC_IRQ5_LV2
290	bool
291
292config ARC_IRQ6_LV2
293	bool
294
295endif
296
297config ARC_FPU_SAVE_RESTORE
298	bool "Enable FPU state persistence across context switch"
299	default n
300	help
301	  Double Precision Floating Point unit had dedictaed regs which
302	  need to be saved/restored across context-switch.
303	  Note that ARC FPU is overly simplistic, unlike say x86, which has
304	  hardware pieces to allow software to conditionally save/restore,
305	  based on actual usage of FPU by a task. Thus our implemn does
306	  this for all tasks in system.
307
308config ARC_CANT_LLSC
309	def_bool n
310
311menuconfig ARC_CPU_REL_4_10
312	bool "Enable support for Rel 4.10 features"
313	default n
314	help
315	  -ARC770 (and dependent features) enabled
316	  -ARC750 also shares some of the new features with 770
317
318config ARC_HAS_LLSC
319	bool "Insn: LLOCK/SCOND (efficient atomic ops)"
320	default y
321	depends on ARC_CPU_770 && !ARC_CANT_LLSC
322
323config ARC_HAS_SWAPE
324	bool "Insn: SWAPE (endian-swap)"
325	default y
326	depends on ARC_CPU_REL_4_10
327
328config ARC_HAS_RTSC
329	bool "Insn: RTSC (64-bit r/o cycle counter)"
330	default y
331	depends on ARC_CPU_REL_4_10
332	depends on !SMP
333
334endmenu   # "ARC CPU Configuration"
335
336config LINUX_LINK_BASE
337	hex "Linux Link Address"
338	default "0x80000000"
339	help
340	  ARC700 divides the 32 bit phy address space into two equal halves
341	  -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
342	  -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
343	  Typically Linux kernel is linked at the start of untransalted addr,
344	  hence the default value of 0x8zs.
345	  However some customers have peripherals mapped at this addr, so
346	  Linux needs to be scooted a bit.
347	  If you don't know what the above means, leave this setting alone.
348
349config ARC_CURR_IN_REG
350	bool "Dedicate Register r25 for current_task pointer"
351	default y
352	help
353	  This reserved Register R25 to point to Current Task in
354	  kernel mode. This saves memory access for each such access
355
356
357config ARC_MISALIGN_ACCESS
358	bool "Emulate unaligned memory access (userspace only)"
359	select SYSCTL_ARCH_UNALIGN_NO_WARN
360	select SYSCTL_ARCH_UNALIGN_ALLOW
361	help
362	  This enables misaligned 16 & 32 bit memory access from user space.
363	  Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
364	  potential bugs in code
365
366config HZ
367	int "Timer Frequency"
368	default 100
369
370config ARC_METAWARE_HLINK
371	bool "Support for Metaware debugger assisted Host access"
372	default n
373	help
374	  This options allows a Linux userland apps to directly access
375	  host file system (open/creat/read/write etc) with help from
376	  Metaware Debugger. This can come in handy for Linux-host communication
377	  when there is no real usable peripheral such as EMAC.
378
379menuconfig ARC_DBG
380	bool "ARC debugging"
381	default y
382
383config ARC_DW2_UNWIND
384	bool "Enable DWARF specific kernel stack unwind"
385	depends on ARC_DBG
386	default y
387	select KALLSYMS
388	help
389	  Compiles the kernel with DWARF unwind information and can be used
390	  to get stack backtraces.
391
392	  If you say Y here the resulting kernel image will be slightly larger
393	  but not slower, and it will give very useful debugging information.
394	  If you don't debug the kernel, you can say N, but we may not be able
395	  to solve problems without frame unwind information
396
397config ARC_DBG_TLB_PARANOIA
398	bool "Paranoia Checks in Low Level TLB Handlers"
399	depends on ARC_DBG
400	default n
401
402config ARC_DBG_TLB_MISS_COUNT
403	bool "Profile TLB Misses"
404	default n
405	select DEBUG_FS
406	depends on ARC_DBG
407	help
408	  Counts number of I and D TLB Misses and exports them via Debugfs
409	  The counters can be cleared via Debugfs as well
410
411config ARC_BUILTIN_DTB_NAME
412	string "Built in DTB"
413	help
414	  Set the name of the DTB to embed in the vmlinux binary
415	  Leaving it blank selects the minimal "skeleton" dtb
416
417source "kernel/Kconfig.preempt"
418
419menu "Executable file formats"
420source "fs/Kconfig.binfmt"
421endmenu
422
423endmenu	 # "ARC Architecture Configuration"
424
425source "mm/Kconfig"
426source "net/Kconfig"
427source "drivers/Kconfig"
428source "fs/Kconfig"
429source "arch/arc/Kconfig.debug"
430source "security/Kconfig"
431source "crypto/Kconfig"
432source "lib/Kconfig"
433