xref: /openbmc/linux/arch/arc/Kconfig (revision 39b6f3aa) 
1#
2# Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License version 2 as
6# published by the Free Software Foundation.
7#
8
9config ARC
10	def_bool y
11	select CLONE_BACKWARDS
12	# ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
13	select DEVTMPFS if !INITRAMFS_SOURCE=""
14	select GENERIC_ATOMIC64
15	select GENERIC_CLOCKEVENTS
16	select GENERIC_FIND_FIRST_BIT
17	# for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
18	select GENERIC_IRQ_SHOW
19	select GENERIC_PENDING_IRQ if SMP
20	select GENERIC_SMP_IDLE_THREAD
21	select HAVE_ARCH_KGDB
22	select HAVE_ARCH_TRACEHOOK
23	select HAVE_GENERIC_HARDIRQS
24	select HAVE_IOREMAP_PROT
25	select HAVE_KPROBES
26	select HAVE_KRETPROBES
27	select HAVE_MEMBLOCK
28	select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
29	select HAVE_OPROFILE
30	select HAVE_PERF_EVENTS
31	select IRQ_DOMAIN
32	select MODULES_USE_ELF_RELA
33	select NO_BOOTMEM
34	select OF
35	select OF_EARLY_FLATTREE
36	select PERF_USE_VMALLOC
37
38config SCHED_OMIT_FRAME_POINTER
39	def_bool y
40
41config GENERIC_CSUM
42	def_bool y
43
44config RWSEM_GENERIC_SPINLOCK
45	def_bool y
46
47config ARCH_FLATMEM_ENABLE
48	def_bool y
49
50config MMU
51	def_bool y
52
53config NO_IOPORT
54	def_bool y
55
56config GENERIC_CALIBRATE_DELAY
57	def_bool y
58
59config GENERIC_HWEIGHT
60	def_bool y
61
62config STACKTRACE_SUPPORT
63	def_bool y
64	select STACKTRACE
65
66config HAVE_LATENCYTOP_SUPPORT
67	def_bool y
68
69config NO_DMA
70	def_bool n
71
72source "init/Kconfig"
73source "kernel/Kconfig.freezer"
74
75menu "ARC Architecture Configuration"
76
77menu "ARC Platform/SoC/Board"
78
79source "arch/arc/plat-arcfpga/Kconfig"
80source "arch/arc/plat-tb10x/Kconfig"
81#New platform adds here
82
83endmenu
84
85menu "ARC CPU Configuration"
86
87choice
88	prompt "ARC Core"
89	default ARC_CPU_770
90
91config ARC_CPU_750D
92	bool "ARC750D"
93	help
94	  Support for ARC750 core
95
96config ARC_CPU_770
97	bool "ARC770"
98	select ARC_CPU_REL_4_10
99	help
100	  Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
101	  This core has a bunch of cool new features:
102	  -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
103                   Shared Address Spaces (for sharing TLB entires in MMU)
104	  -Caches: New Prog Model, Region Flush
105	  -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
106
107endchoice
108
109config CPU_BIG_ENDIAN
110	bool "Enable Big Endian Mode"
111	default n
112	help
113	  Build kernel for Big Endian Mode of ARC CPU
114
115# If a platform can't work with 0x8000_0000 based dma_addr_t
116config ARC_PLAT_NEEDS_CPU_TO_DMA
117	bool
118
119config SMP
120	bool "Symmetric Multi-Processing (Incomplete)"
121	default n
122	select USE_GENERIC_SMP_HELPERS
123	help
124	  This enables support for systems with more than one CPU. If you have
125	  a system with only one CPU, like most personal computers, say N. If
126	  you have a system with more than one CPU, say Y.
127
128if SMP
129
130config ARC_HAS_COH_CACHES
131	def_bool n
132
133config ARC_HAS_COH_RTSC
134	def_bool n
135
136config ARC_HAS_REENTRANT_IRQ_LV2
137	def_bool n
138
139endif
140
141config NR_CPUS
142	int "Maximum number of CPUs (2-32)"
143	range 2 32
144	depends on SMP
145	default "2"
146
147menuconfig ARC_CACHE
148	bool "Enable Cache Support"
149	default y
150	# if SMP, cache enabled ONLY if ARC implementation has cache coherency
151	depends on !SMP || ARC_HAS_COH_CACHES
152
153if ARC_CACHE
154
155config ARC_CACHE_LINE_SHIFT
156	int "Cache Line Length (as power of 2)"
157	range 5 7
158	default "6"
159	help
160	  Starting with ARC700 4.9, Cache line length is configurable,
161	  This option specifies "N", with Line-len = 2 power N
162	  So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
163	  Linux only supports same line lengths for I and D caches.
164
165config ARC_HAS_ICACHE
166	bool "Use Instruction Cache"
167	default y
168
169config ARC_HAS_DCACHE
170	bool "Use Data Cache"
171	default y
172
173config ARC_CACHE_PAGES
174	bool "Per Page Cache Control"
175	default y
176	depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
177	help
178	  This can be used to over-ride the global I/D Cache Enable on a
179	  per-page basis (but only for pages accessed via MMU such as
180	  Kernel Virtual address or User Virtual Address)
181	  TLB entries have a per-page Cache Enable Bit.
182	  Note that Global I/D ENABLE + Per Page DISABLE works but corollary
183	  Global DISABLE + Per Page ENABLE won't work
184
185config ARC_CACHE_VIPT_ALIASING
186	bool "Support VIPT Aliasing D$"
187	default n
188
189endif	#ARC_CACHE
190
191config ARC_HAS_ICCM
192	bool "Use ICCM"
193	help
194	  Single Cycle RAMS to store Fast Path Code
195	default n
196
197config ARC_ICCM_SZ
198	int "ICCM Size in KB"
199	default "64"
200	depends on ARC_HAS_ICCM
201
202config ARC_HAS_DCCM
203	bool "Use DCCM"
204	help
205	  Single Cycle RAMS to store Fast Path Data
206	default n
207
208config ARC_DCCM_SZ
209	int "DCCM Size in KB"
210	default "64"
211	depends on ARC_HAS_DCCM
212
213config ARC_DCCM_BASE
214	hex "DCCM map address"
215	default "0xA0000000"
216	depends on ARC_HAS_DCCM
217
218config ARC_HAS_HW_MPY
219	bool "Use Hardware Multiplier (Normal or Faster XMAC)"
220	default y
221	help
222	  Influences how gcc generates code for MPY operations.
223	  If enabled, MPYxx insns are generated, provided by Standard/XMAC
224	  Multipler. Otherwise software multipy lib is used
225
226choice
227	prompt "ARC700 MMU Version"
228	default ARC_MMU_V3 if ARC_CPU_770
229	default ARC_MMU_V2 if ARC_CPU_750D
230
231config ARC_MMU_V1
232	bool "MMU v1"
233	help
234	  Orig ARC700 MMU
235
236config ARC_MMU_V2
237	bool "MMU v2"
238	help
239	  Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
240	  when 2 D-TLB and 1 I-TLB entries index into same 2way set.
241
242config ARC_MMU_V3
243	bool "MMU v3"
244	depends on ARC_CPU_770
245	help
246	  Introduced with ARC700 4.10: New Features
247	  Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
248	  Shared Address Spaces (SASID)
249
250endchoice
251
252
253choice
254	prompt "MMU Page Size"
255	default ARC_PAGE_SIZE_8K
256
257config ARC_PAGE_SIZE_8K
258	bool "8KB"
259	help
260	  Choose between 8k vs 16k
261
262config ARC_PAGE_SIZE_16K
263	bool "16KB"
264	depends on ARC_MMU_V3
265
266config ARC_PAGE_SIZE_4K
267	bool "4KB"
268	depends on ARC_MMU_V3
269
270endchoice
271
272config ARC_COMPACT_IRQ_LEVELS
273	bool "ARCompact IRQ Priorities: High(2)/Low(1)"
274	default n
275	# Timer HAS to be high priority, for any other high priority config
276	select ARC_IRQ3_LV2
277	# if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
278	depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
279
280if ARC_COMPACT_IRQ_LEVELS
281
282config ARC_IRQ3_LV2
283	bool
284
285config ARC_IRQ5_LV2
286	bool
287
288config ARC_IRQ6_LV2
289	bool
290
291endif
292
293config ARC_FPU_SAVE_RESTORE
294	bool "Enable FPU state persistence across context switch"
295	default n
296	help
297	  Double Precision Floating Point unit had dedictaed regs which
298	  need to be saved/restored across context-switch.
299	  Note that ARC FPU is overly simplistic, unlike say x86, which has
300	  hardware pieces to allow software to conditionally save/restore,
301	  based on actual usage of FPU by a task. Thus our implemn does
302	  this for all tasks in system.
303
304config ARC_CANT_LLSC
305	def_bool n
306
307menuconfig ARC_CPU_REL_4_10
308	bool "Enable support for Rel 4.10 features"
309	default n
310	help
311	  -ARC770 (and dependent features) enabled
312	  -ARC750 also shares some of the new features with 770
313
314config ARC_HAS_LLSC
315	bool "Insn: LLOCK/SCOND (efficient atomic ops)"
316	default y
317	depends on ARC_CPU_770 && !ARC_CANT_LLSC
318
319config ARC_HAS_SWAPE
320	bool "Insn: SWAPE (endian-swap)"
321	default y
322	depends on ARC_CPU_REL_4_10
323
324config ARC_HAS_RTSC
325	bool "Insn: RTSC (64-bit r/o cycle counter)"
326	default y
327	depends on ARC_CPU_REL_4_10
328	# if SMP, enable RTSC only if counter is coherent across cores
329	depends on !SMP || ARC_HAS_COH_RTSC
330
331endmenu   # "ARC CPU Configuration"
332
333config LINUX_LINK_BASE
334	hex "Linux Link Address"
335	default "0x80000000"
336	help
337	  ARC700 divides the 32 bit phy address space into two equal halves
338	  -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
339	  -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
340	  Typically Linux kernel is linked at the start of untransalted addr,
341	  hence the default value of 0x8zs.
342	  However some customers have peripherals mapped at this addr, so
343	  Linux needs to be scooted a bit.
344	  If you don't know what the above means, leave this setting alone.
345
346config ARC_CURR_IN_REG
347	bool "Dedicate Register r25 for current_task pointer"
348	default y
349	help
350	  This reserved Register R25 to point to Current Task in
351	  kernel mode. This saves memory access for each such access
352
353
354config ARC_MISALIGN_ACCESS
355	bool "Emulate unaligned memory access (userspace only)"
356	default N
357	select SYSCTL_ARCH_UNALIGN_NO_WARN
358	select SYSCTL_ARCH_UNALIGN_ALLOW
359	help
360	  This enables misaligned 16 & 32 bit memory access from user space.
361	  Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
362	  potential bugs in code
363
364config ARC_STACK_NONEXEC
365	bool "Make stack non-executable"
366	default n
367	help
368	  To disable the execute permissions of stack/heap of processes
369	  which are enabled by default.
370
371config HZ
372	int "Timer Frequency"
373	default 100
374
375config ARC_METAWARE_HLINK
376	bool "Support for Metaware debugger assisted Host access"
377	default n
378	help
379	  This options allows a Linux userland apps to directly access
380	  host file system (open/creat/read/write etc) with help from
381	  Metaware Debugger. This can come in handy for Linux-host communication
382	  when there is no real usable peripheral such as EMAC.
383
384menuconfig ARC_DBG
385	bool "ARC debugging"
386	default y
387
388config ARC_DW2_UNWIND
389	bool "Enable DWARF specific kernel stack unwind"
390	depends on ARC_DBG
391	default y
392	select KALLSYMS
393	help
394	  Compiles the kernel with DWARF unwind information and can be used
395	  to get stack backtraces.
396
397	  If you say Y here the resulting kernel image will be slightly larger
398	  but not slower, and it will give very useful debugging information.
399	  If you don't debug the kernel, you can say N, but we may not be able
400	  to solve problems without frame unwind information
401
402config ARC_DBG_TLB_PARANOIA
403	bool "Paranoia Checks in Low Level TLB Handlers"
404	depends on ARC_DBG
405	default n
406
407config ARC_DBG_TLB_MISS_COUNT
408	bool "Profile TLB Misses"
409	default n
410	select DEBUG_FS
411	depends on ARC_DBG
412	help
413	  Counts number of I and D TLB Misses and exports them via Debugfs
414	  The counters can be cleared via Debugfs as well
415
416config CMDLINE_UBOOT
417	bool "Support U-boot kernel command line passing"
418	default n
419	help
420	  If you are using U-boot (www.denx.de) and wish to pass the kernel
421	  command line from the U-boot environment to the Linux kernel then
422	  switch this option on.
423	  ARC U-boot will setup the cmdline in RAM/flash and set r2 to point
424	  to it. kernel startup code will append this to DeviceTree
425	  /bootargs provided cmdline args.
426
427config ARC_BUILTIN_DTB_NAME
428	string "Built in DTB"
429	help
430	  Set the name of the DTB to embed in the vmlinux binary
431	  Leaving it blank selects the minimal "skeleton" dtb
432
433source "kernel/Kconfig.preempt"
434
435menu "Executable file formats"
436source "fs/Kconfig.binfmt"
437endmenu
438
439endmenu	 # "ARC Architecture Configuration"
440
441source "mm/Kconfig"
442source "net/Kconfig"
443source "drivers/Kconfig"
444source "fs/Kconfig"
445source "arch/arc/Kconfig.debug"
446source "security/Kconfig"
447source "crypto/Kconfig"
448source "lib/Kconfig"
449