1 /* 2 * arch/alpha/kernel/traps.c 3 * 4 * (C) Copyright 1994 Linus Torvalds 5 */ 6 7 /* 8 * This file initializes the trap entry points 9 */ 10 11 #include <linux/jiffies.h> 12 #include <linux/mm.h> 13 #include <linux/sched.h> 14 #include <linux/tty.h> 15 #include <linux/delay.h> 16 #include <linux/smp_lock.h> 17 #include <linux/module.h> 18 #include <linux/init.h> 19 #include <linux/kallsyms.h> 20 21 #include <asm/gentrap.h> 22 #include <asm/uaccess.h> 23 #include <asm/unaligned.h> 24 #include <asm/sysinfo.h> 25 #include <asm/hwrpb.h> 26 #include <asm/mmu_context.h> 27 28 #include "proto.h" 29 30 /* Work-around for some SRMs which mishandle opDEC faults. */ 31 32 static int opDEC_fix; 33 34 static void __cpuinit 35 opDEC_check(void) 36 { 37 __asm__ __volatile__ ( 38 /* Load the address of... */ 39 " br $16, 1f\n" 40 /* A stub instruction fault handler. Just add 4 to the 41 pc and continue. */ 42 " ldq $16, 8($sp)\n" 43 " addq $16, 4, $16\n" 44 " stq $16, 8($sp)\n" 45 " call_pal %[rti]\n" 46 /* Install the instruction fault handler. */ 47 "1: lda $17, 3\n" 48 " call_pal %[wrent]\n" 49 /* With that in place, the fault from the round-to-minf fp 50 insn will arrive either at the "lda 4" insn (bad) or one 51 past that (good). This places the correct fixup in %0. */ 52 " lda %[fix], 0\n" 53 " cvttq/svm $f31,$f31\n" 54 " lda %[fix], 4" 55 : [fix] "=r" (opDEC_fix) 56 : [rti] "n" (PAL_rti), [wrent] "n" (PAL_wrent) 57 : "$0", "$1", "$16", "$17", "$22", "$23", "$24", "$25"); 58 59 if (opDEC_fix) 60 printk("opDEC fixup enabled.\n"); 61 } 62 63 void 64 dik_show_regs(struct pt_regs *regs, unsigned long *r9_15) 65 { 66 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx %s\n", 67 regs->pc, regs->r26, regs->ps, print_tainted()); 68 print_symbol("pc is at %s\n", regs->pc); 69 print_symbol("ra is at %s\n", regs->r26 ); 70 printk("v0 = %016lx t0 = %016lx t1 = %016lx\n", 71 regs->r0, regs->r1, regs->r2); 72 printk("t2 = %016lx t3 = %016lx t4 = %016lx\n", 73 regs->r3, regs->r4, regs->r5); 74 printk("t5 = %016lx t6 = %016lx t7 = %016lx\n", 75 regs->r6, regs->r7, regs->r8); 76 77 if (r9_15) { 78 printk("s0 = %016lx s1 = %016lx s2 = %016lx\n", 79 r9_15[9], r9_15[10], r9_15[11]); 80 printk("s3 = %016lx s4 = %016lx s5 = %016lx\n", 81 r9_15[12], r9_15[13], r9_15[14]); 82 printk("s6 = %016lx\n", r9_15[15]); 83 } 84 85 printk("a0 = %016lx a1 = %016lx a2 = %016lx\n", 86 regs->r16, regs->r17, regs->r18); 87 printk("a3 = %016lx a4 = %016lx a5 = %016lx\n", 88 regs->r19, regs->r20, regs->r21); 89 printk("t8 = %016lx t9 = %016lx t10= %016lx\n", 90 regs->r22, regs->r23, regs->r24); 91 printk("t11= %016lx pv = %016lx at = %016lx\n", 92 regs->r25, regs->r27, regs->r28); 93 printk("gp = %016lx sp = %p\n", regs->gp, regs+1); 94 #if 0 95 __halt(); 96 #endif 97 } 98 99 #if 0 100 static char * ireg_name[] = {"v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", 101 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "s6", 102 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", 103 "t10", "t11", "ra", "pv", "at", "gp", "sp", "zero"}; 104 #endif 105 106 static void 107 dik_show_code(unsigned int *pc) 108 { 109 long i; 110 111 printk("Code:"); 112 for (i = -6; i < 2; i++) { 113 unsigned int insn; 114 if (__get_user(insn, (unsigned int __user *)pc + i)) 115 break; 116 printk("%c%08x%c", i ? ' ' : '<', insn, i ? ' ' : '>'); 117 } 118 printk("\n"); 119 } 120 121 static void 122 dik_show_trace(unsigned long *sp) 123 { 124 long i = 0; 125 printk("Trace:\n"); 126 while (0x1ff8 & (unsigned long) sp) { 127 extern char _stext[], _etext[]; 128 unsigned long tmp = *sp; 129 sp++; 130 if (tmp < (unsigned long) &_stext) 131 continue; 132 if (tmp >= (unsigned long) &_etext) 133 continue; 134 printk("[<%lx>]", tmp); 135 print_symbol(" %s", tmp); 136 printk("\n"); 137 if (i > 40) { 138 printk(" ..."); 139 break; 140 } 141 } 142 printk("\n"); 143 } 144 145 static int kstack_depth_to_print = 24; 146 147 void show_stack(struct task_struct *task, unsigned long *sp) 148 { 149 unsigned long *stack; 150 int i; 151 152 /* 153 * debugging aid: "show_stack(NULL);" prints the 154 * back trace for this cpu. 155 */ 156 if(sp==NULL) 157 sp=(unsigned long*)&sp; 158 159 stack = sp; 160 for(i=0; i < kstack_depth_to_print; i++) { 161 if (((long) stack & (THREAD_SIZE-1)) == 0) 162 break; 163 if (i && ((i % 4) == 0)) 164 printk("\n "); 165 printk("%016lx ", *stack++); 166 } 167 printk("\n"); 168 dik_show_trace(sp); 169 } 170 171 void dump_stack(void) 172 { 173 show_stack(NULL, NULL); 174 } 175 176 EXPORT_SYMBOL(dump_stack); 177 178 void 179 die_if_kernel(char * str, struct pt_regs *regs, long err, unsigned long *r9_15) 180 { 181 if (regs->ps & 8) 182 return; 183 #ifdef CONFIG_SMP 184 printk("CPU %d ", hard_smp_processor_id()); 185 #endif 186 printk("%s(%d): %s %ld\n", current->comm, task_pid_nr(current), str, err); 187 dik_show_regs(regs, r9_15); 188 add_taint(TAINT_DIE); 189 dik_show_trace((unsigned long *)(regs+1)); 190 dik_show_code((unsigned int *)regs->pc); 191 192 if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) { 193 printk("die_if_kernel recursion detected.\n"); 194 local_irq_enable(); 195 while (1); 196 } 197 do_exit(SIGSEGV); 198 } 199 200 #ifndef CONFIG_MATHEMU 201 static long dummy_emul(void) { return 0; } 202 long (*alpha_fp_emul_imprecise)(struct pt_regs *regs, unsigned long writemask) 203 = (void *)dummy_emul; 204 long (*alpha_fp_emul) (unsigned long pc) 205 = (void *)dummy_emul; 206 #else 207 long alpha_fp_emul_imprecise(struct pt_regs *regs, unsigned long writemask); 208 long alpha_fp_emul (unsigned long pc); 209 #endif 210 211 asmlinkage void 212 do_entArith(unsigned long summary, unsigned long write_mask, 213 struct pt_regs *regs) 214 { 215 long si_code = FPE_FLTINV; 216 siginfo_t info; 217 218 if (summary & 1) { 219 /* Software-completion summary bit is set, so try to 220 emulate the instruction. If the processor supports 221 precise exceptions, we don't have to search. */ 222 if (!amask(AMASK_PRECISE_TRAP)) 223 si_code = alpha_fp_emul(regs->pc - 4); 224 else 225 si_code = alpha_fp_emul_imprecise(regs, write_mask); 226 if (si_code == 0) 227 return; 228 } 229 die_if_kernel("Arithmetic fault", regs, 0, NULL); 230 231 info.si_signo = SIGFPE; 232 info.si_errno = 0; 233 info.si_code = si_code; 234 info.si_addr = (void __user *) regs->pc; 235 send_sig_info(SIGFPE, &info, current); 236 } 237 238 asmlinkage void 239 do_entIF(unsigned long type, struct pt_regs *regs) 240 { 241 siginfo_t info; 242 int signo, code; 243 244 if ((regs->ps & ~IPL_MAX) == 0) { 245 if (type == 1) { 246 const unsigned int *data 247 = (const unsigned int *) regs->pc; 248 printk("Kernel bug at %s:%d\n", 249 (const char *)(data[1] | (long)data[2] << 32), 250 data[0]); 251 } 252 die_if_kernel((type == 1 ? "Kernel Bug" : "Instruction fault"), 253 regs, type, NULL); 254 } 255 256 switch (type) { 257 case 0: /* breakpoint */ 258 info.si_signo = SIGTRAP; 259 info.si_errno = 0; 260 info.si_code = TRAP_BRKPT; 261 info.si_trapno = 0; 262 info.si_addr = (void __user *) regs->pc; 263 264 if (ptrace_cancel_bpt(current)) { 265 regs->pc -= 4; /* make pc point to former bpt */ 266 } 267 268 send_sig_info(SIGTRAP, &info, current); 269 return; 270 271 case 1: /* bugcheck */ 272 info.si_signo = SIGTRAP; 273 info.si_errno = 0; 274 info.si_code = __SI_FAULT; 275 info.si_addr = (void __user *) regs->pc; 276 info.si_trapno = 0; 277 send_sig_info(SIGTRAP, &info, current); 278 return; 279 280 case 2: /* gentrap */ 281 info.si_addr = (void __user *) regs->pc; 282 info.si_trapno = regs->r16; 283 switch ((long) regs->r16) { 284 case GEN_INTOVF: 285 signo = SIGFPE; 286 code = FPE_INTOVF; 287 break; 288 case GEN_INTDIV: 289 signo = SIGFPE; 290 code = FPE_INTDIV; 291 break; 292 case GEN_FLTOVF: 293 signo = SIGFPE; 294 code = FPE_FLTOVF; 295 break; 296 case GEN_FLTDIV: 297 signo = SIGFPE; 298 code = FPE_FLTDIV; 299 break; 300 case GEN_FLTUND: 301 signo = SIGFPE; 302 code = FPE_FLTUND; 303 break; 304 case GEN_FLTINV: 305 signo = SIGFPE; 306 code = FPE_FLTINV; 307 break; 308 case GEN_FLTINE: 309 signo = SIGFPE; 310 code = FPE_FLTRES; 311 break; 312 case GEN_ROPRAND: 313 signo = SIGFPE; 314 code = __SI_FAULT; 315 break; 316 317 case GEN_DECOVF: 318 case GEN_DECDIV: 319 case GEN_DECINV: 320 case GEN_ASSERTERR: 321 case GEN_NULPTRERR: 322 case GEN_STKOVF: 323 case GEN_STRLENERR: 324 case GEN_SUBSTRERR: 325 case GEN_RANGERR: 326 case GEN_SUBRNG: 327 case GEN_SUBRNG1: 328 case GEN_SUBRNG2: 329 case GEN_SUBRNG3: 330 case GEN_SUBRNG4: 331 case GEN_SUBRNG5: 332 case GEN_SUBRNG6: 333 case GEN_SUBRNG7: 334 default: 335 signo = SIGTRAP; 336 code = __SI_FAULT; 337 break; 338 } 339 340 info.si_signo = signo; 341 info.si_errno = 0; 342 info.si_code = code; 343 info.si_addr = (void __user *) regs->pc; 344 send_sig_info(signo, &info, current); 345 return; 346 347 case 4: /* opDEC */ 348 if (implver() == IMPLVER_EV4) { 349 long si_code; 350 351 /* The some versions of SRM do not handle 352 the opDEC properly - they return the PC of the 353 opDEC fault, not the instruction after as the 354 Alpha architecture requires. Here we fix it up. 355 We do this by intentionally causing an opDEC 356 fault during the boot sequence and testing if 357 we get the correct PC. If not, we set a flag 358 to correct it every time through. */ 359 regs->pc += opDEC_fix; 360 361 /* EV4 does not implement anything except normal 362 rounding. Everything else will come here as 363 an illegal instruction. Emulate them. */ 364 si_code = alpha_fp_emul(regs->pc - 4); 365 if (si_code == 0) 366 return; 367 if (si_code > 0) { 368 info.si_signo = SIGFPE; 369 info.si_errno = 0; 370 info.si_code = si_code; 371 info.si_addr = (void __user *) regs->pc; 372 send_sig_info(SIGFPE, &info, current); 373 return; 374 } 375 } 376 break; 377 378 case 3: /* FEN fault */ 379 /* Irritating users can call PAL_clrfen to disable the 380 FPU for the process. The kernel will then trap in 381 do_switch_stack and undo_switch_stack when we try 382 to save and restore the FP registers. 383 384 Given that GCC by default generates code that uses the 385 FP registers, PAL_clrfen is not useful except for DoS 386 attacks. So turn the bleeding FPU back on and be done 387 with it. */ 388 current_thread_info()->pcb.flags |= 1; 389 __reload_thread(¤t_thread_info()->pcb); 390 return; 391 392 case 5: /* illoc */ 393 default: /* unexpected instruction-fault type */ 394 ; 395 } 396 397 info.si_signo = SIGILL; 398 info.si_errno = 0; 399 info.si_code = ILL_ILLOPC; 400 info.si_addr = (void __user *) regs->pc; 401 send_sig_info(SIGILL, &info, current); 402 } 403 404 /* There is an ifdef in the PALcode in MILO that enables a 405 "kernel debugging entry point" as an unprivileged call_pal. 406 407 We don't want to have anything to do with it, but unfortunately 408 several versions of MILO included in distributions have it enabled, 409 and if we don't put something on the entry point we'll oops. */ 410 411 asmlinkage void 412 do_entDbg(struct pt_regs *regs) 413 { 414 siginfo_t info; 415 416 die_if_kernel("Instruction fault", regs, 0, NULL); 417 418 info.si_signo = SIGILL; 419 info.si_errno = 0; 420 info.si_code = ILL_ILLOPC; 421 info.si_addr = (void __user *) regs->pc; 422 force_sig_info(SIGILL, &info, current); 423 } 424 425 426 /* 427 * entUna has a different register layout to be reasonably simple. It 428 * needs access to all the integer registers (the kernel doesn't use 429 * fp-regs), and it needs to have them in order for simpler access. 430 * 431 * Due to the non-standard register layout (and because we don't want 432 * to handle floating-point regs), user-mode unaligned accesses are 433 * handled separately by do_entUnaUser below. 434 * 435 * Oh, btw, we don't handle the "gp" register correctly, but if we fault 436 * on a gp-register unaligned load/store, something is _very_ wrong 437 * in the kernel anyway.. 438 */ 439 struct allregs { 440 unsigned long regs[32]; 441 unsigned long ps, pc, gp, a0, a1, a2; 442 }; 443 444 struct unaligned_stat { 445 unsigned long count, va, pc; 446 } unaligned[2]; 447 448 449 /* Macro for exception fixup code to access integer registers. */ 450 #define una_reg(r) (_regs[(r) >= 16 && (r) <= 18 ? (r)+19 : (r)]) 451 452 453 asmlinkage void 454 do_entUna(void * va, unsigned long opcode, unsigned long reg, 455 struct allregs *regs) 456 { 457 long error, tmp1, tmp2, tmp3, tmp4; 458 unsigned long pc = regs->pc - 4; 459 unsigned long *_regs = regs->regs; 460 const struct exception_table_entry *fixup; 461 462 unaligned[0].count++; 463 unaligned[0].va = (unsigned long) va; 464 unaligned[0].pc = pc; 465 466 /* We don't want to use the generic get/put unaligned macros as 467 we want to trap exceptions. Only if we actually get an 468 exception will we decide whether we should have caught it. */ 469 470 switch (opcode) { 471 case 0x0c: /* ldwu */ 472 __asm__ __volatile__( 473 "1: ldq_u %1,0(%3)\n" 474 "2: ldq_u %2,1(%3)\n" 475 " extwl %1,%3,%1\n" 476 " extwh %2,%3,%2\n" 477 "3:\n" 478 ".section __ex_table,\"a\"\n" 479 " .long 1b - .\n" 480 " lda %1,3b-1b(%0)\n" 481 " .long 2b - .\n" 482 " lda %2,3b-2b(%0)\n" 483 ".previous" 484 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 485 : "r"(va), "0"(0)); 486 if (error) 487 goto got_exception; 488 una_reg(reg) = tmp1|tmp2; 489 return; 490 491 case 0x28: /* ldl */ 492 __asm__ __volatile__( 493 "1: ldq_u %1,0(%3)\n" 494 "2: ldq_u %2,3(%3)\n" 495 " extll %1,%3,%1\n" 496 " extlh %2,%3,%2\n" 497 "3:\n" 498 ".section __ex_table,\"a\"\n" 499 " .long 1b - .\n" 500 " lda %1,3b-1b(%0)\n" 501 " .long 2b - .\n" 502 " lda %2,3b-2b(%0)\n" 503 ".previous" 504 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 505 : "r"(va), "0"(0)); 506 if (error) 507 goto got_exception; 508 una_reg(reg) = (int)(tmp1|tmp2); 509 return; 510 511 case 0x29: /* ldq */ 512 __asm__ __volatile__( 513 "1: ldq_u %1,0(%3)\n" 514 "2: ldq_u %2,7(%3)\n" 515 " extql %1,%3,%1\n" 516 " extqh %2,%3,%2\n" 517 "3:\n" 518 ".section __ex_table,\"a\"\n" 519 " .long 1b - .\n" 520 " lda %1,3b-1b(%0)\n" 521 " .long 2b - .\n" 522 " lda %2,3b-2b(%0)\n" 523 ".previous" 524 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 525 : "r"(va), "0"(0)); 526 if (error) 527 goto got_exception; 528 una_reg(reg) = tmp1|tmp2; 529 return; 530 531 /* Note that the store sequences do not indicate that they change 532 memory because it _should_ be affecting nothing in this context. 533 (Otherwise we have other, much larger, problems.) */ 534 case 0x0d: /* stw */ 535 __asm__ __volatile__( 536 "1: ldq_u %2,1(%5)\n" 537 "2: ldq_u %1,0(%5)\n" 538 " inswh %6,%5,%4\n" 539 " inswl %6,%5,%3\n" 540 " mskwh %2,%5,%2\n" 541 " mskwl %1,%5,%1\n" 542 " or %2,%4,%2\n" 543 " or %1,%3,%1\n" 544 "3: stq_u %2,1(%5)\n" 545 "4: stq_u %1,0(%5)\n" 546 "5:\n" 547 ".section __ex_table,\"a\"\n" 548 " .long 1b - .\n" 549 " lda %2,5b-1b(%0)\n" 550 " .long 2b - .\n" 551 " lda %1,5b-2b(%0)\n" 552 " .long 3b - .\n" 553 " lda $31,5b-3b(%0)\n" 554 " .long 4b - .\n" 555 " lda $31,5b-4b(%0)\n" 556 ".previous" 557 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 558 "=&r"(tmp3), "=&r"(tmp4) 559 : "r"(va), "r"(una_reg(reg)), "0"(0)); 560 if (error) 561 goto got_exception; 562 return; 563 564 case 0x2c: /* stl */ 565 __asm__ __volatile__( 566 "1: ldq_u %2,3(%5)\n" 567 "2: ldq_u %1,0(%5)\n" 568 " inslh %6,%5,%4\n" 569 " insll %6,%5,%3\n" 570 " msklh %2,%5,%2\n" 571 " mskll %1,%5,%1\n" 572 " or %2,%4,%2\n" 573 " or %1,%3,%1\n" 574 "3: stq_u %2,3(%5)\n" 575 "4: stq_u %1,0(%5)\n" 576 "5:\n" 577 ".section __ex_table,\"a\"\n" 578 " .long 1b - .\n" 579 " lda %2,5b-1b(%0)\n" 580 " .long 2b - .\n" 581 " lda %1,5b-2b(%0)\n" 582 " .long 3b - .\n" 583 " lda $31,5b-3b(%0)\n" 584 " .long 4b - .\n" 585 " lda $31,5b-4b(%0)\n" 586 ".previous" 587 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 588 "=&r"(tmp3), "=&r"(tmp4) 589 : "r"(va), "r"(una_reg(reg)), "0"(0)); 590 if (error) 591 goto got_exception; 592 return; 593 594 case 0x2d: /* stq */ 595 __asm__ __volatile__( 596 "1: ldq_u %2,7(%5)\n" 597 "2: ldq_u %1,0(%5)\n" 598 " insqh %6,%5,%4\n" 599 " insql %6,%5,%3\n" 600 " mskqh %2,%5,%2\n" 601 " mskql %1,%5,%1\n" 602 " or %2,%4,%2\n" 603 " or %1,%3,%1\n" 604 "3: stq_u %2,7(%5)\n" 605 "4: stq_u %1,0(%5)\n" 606 "5:\n" 607 ".section __ex_table,\"a\"\n\t" 608 " .long 1b - .\n" 609 " lda %2,5b-1b(%0)\n" 610 " .long 2b - .\n" 611 " lda %1,5b-2b(%0)\n" 612 " .long 3b - .\n" 613 " lda $31,5b-3b(%0)\n" 614 " .long 4b - .\n" 615 " lda $31,5b-4b(%0)\n" 616 ".previous" 617 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 618 "=&r"(tmp3), "=&r"(tmp4) 619 : "r"(va), "r"(una_reg(reg)), "0"(0)); 620 if (error) 621 goto got_exception; 622 return; 623 } 624 625 lock_kernel(); 626 printk("Bad unaligned kernel access at %016lx: %p %lx %lu\n", 627 pc, va, opcode, reg); 628 do_exit(SIGSEGV); 629 630 got_exception: 631 /* Ok, we caught the exception, but we don't want it. Is there 632 someone to pass it along to? */ 633 if ((fixup = search_exception_tables(pc)) != 0) { 634 unsigned long newpc; 635 newpc = fixup_exception(una_reg, fixup, pc); 636 637 printk("Forwarding unaligned exception at %lx (%lx)\n", 638 pc, newpc); 639 640 regs->pc = newpc; 641 return; 642 } 643 644 /* 645 * Yikes! No one to forward the exception to. 646 * Since the registers are in a weird format, dump them ourselves. 647 */ 648 lock_kernel(); 649 650 printk("%s(%d): unhandled unaligned exception\n", 651 current->comm, task_pid_nr(current)); 652 653 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx\n", 654 pc, una_reg(26), regs->ps); 655 printk("r0 = %016lx r1 = %016lx r2 = %016lx\n", 656 una_reg(0), una_reg(1), una_reg(2)); 657 printk("r3 = %016lx r4 = %016lx r5 = %016lx\n", 658 una_reg(3), una_reg(4), una_reg(5)); 659 printk("r6 = %016lx r7 = %016lx r8 = %016lx\n", 660 una_reg(6), una_reg(7), una_reg(8)); 661 printk("r9 = %016lx r10= %016lx r11= %016lx\n", 662 una_reg(9), una_reg(10), una_reg(11)); 663 printk("r12= %016lx r13= %016lx r14= %016lx\n", 664 una_reg(12), una_reg(13), una_reg(14)); 665 printk("r15= %016lx\n", una_reg(15)); 666 printk("r16= %016lx r17= %016lx r18= %016lx\n", 667 una_reg(16), una_reg(17), una_reg(18)); 668 printk("r19= %016lx r20= %016lx r21= %016lx\n", 669 una_reg(19), una_reg(20), una_reg(21)); 670 printk("r22= %016lx r23= %016lx r24= %016lx\n", 671 una_reg(22), una_reg(23), una_reg(24)); 672 printk("r25= %016lx r27= %016lx r28= %016lx\n", 673 una_reg(25), una_reg(27), una_reg(28)); 674 printk("gp = %016lx sp = %p\n", regs->gp, regs+1); 675 676 dik_show_code((unsigned int *)pc); 677 dik_show_trace((unsigned long *)(regs+1)); 678 679 if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) { 680 printk("die_if_kernel recursion detected.\n"); 681 local_irq_enable(); 682 while (1); 683 } 684 do_exit(SIGSEGV); 685 } 686 687 /* 688 * Convert an s-floating point value in memory format to the 689 * corresponding value in register format. The exponent 690 * needs to be remapped to preserve non-finite values 691 * (infinities, not-a-numbers, denormals). 692 */ 693 static inline unsigned long 694 s_mem_to_reg (unsigned long s_mem) 695 { 696 unsigned long frac = (s_mem >> 0) & 0x7fffff; 697 unsigned long sign = (s_mem >> 31) & 0x1; 698 unsigned long exp_msb = (s_mem >> 30) & 0x1; 699 unsigned long exp_low = (s_mem >> 23) & 0x7f; 700 unsigned long exp; 701 702 exp = (exp_msb << 10) | exp_low; /* common case */ 703 if (exp_msb) { 704 if (exp_low == 0x7f) { 705 exp = 0x7ff; 706 } 707 } else { 708 if (exp_low == 0x00) { 709 exp = 0x000; 710 } else { 711 exp |= (0x7 << 7); 712 } 713 } 714 return (sign << 63) | (exp << 52) | (frac << 29); 715 } 716 717 /* 718 * Convert an s-floating point value in register format to the 719 * corresponding value in memory format. 720 */ 721 static inline unsigned long 722 s_reg_to_mem (unsigned long s_reg) 723 { 724 return ((s_reg >> 62) << 30) | ((s_reg << 5) >> 34); 725 } 726 727 /* 728 * Handle user-level unaligned fault. Handling user-level unaligned 729 * faults is *extremely* slow and produces nasty messages. A user 730 * program *should* fix unaligned faults ASAP. 731 * 732 * Notice that we have (almost) the regular kernel stack layout here, 733 * so finding the appropriate registers is a little more difficult 734 * than in the kernel case. 735 * 736 * Finally, we handle regular integer load/stores only. In 737 * particular, load-linked/store-conditionally and floating point 738 * load/stores are not supported. The former make no sense with 739 * unaligned faults (they are guaranteed to fail) and I don't think 740 * the latter will occur in any decent program. 741 * 742 * Sigh. We *do* have to handle some FP operations, because GCC will 743 * uses them as temporary storage for integer memory to memory copies. 744 * However, we need to deal with stt/ldt and sts/lds only. 745 */ 746 747 #define OP_INT_MASK ( 1L << 0x28 | 1L << 0x2c /* ldl stl */ \ 748 | 1L << 0x29 | 1L << 0x2d /* ldq stq */ \ 749 | 1L << 0x0c | 1L << 0x0d /* ldwu stw */ \ 750 | 1L << 0x0a | 1L << 0x0e ) /* ldbu stb */ 751 752 #define OP_WRITE_MASK ( 1L << 0x26 | 1L << 0x27 /* sts stt */ \ 753 | 1L << 0x2c | 1L << 0x2d /* stl stq */ \ 754 | 1L << 0x0d | 1L << 0x0e ) /* stw stb */ 755 756 #define R(x) ((size_t) &((struct pt_regs *)0)->x) 757 758 static int unauser_reg_offsets[32] = { 759 R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), R(r8), 760 /* r9 ... r15 are stored in front of regs. */ 761 -56, -48, -40, -32, -24, -16, -8, 762 R(r16), R(r17), R(r18), 763 R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26), 764 R(r27), R(r28), R(gp), 765 0, 0 766 }; 767 768 #undef R 769 770 asmlinkage void 771 do_entUnaUser(void __user * va, unsigned long opcode, 772 unsigned long reg, struct pt_regs *regs) 773 { 774 static int cnt = 0; 775 static unsigned long last_time; 776 777 unsigned long tmp1, tmp2, tmp3, tmp4; 778 unsigned long fake_reg, *reg_addr = &fake_reg; 779 siginfo_t info; 780 long error; 781 782 /* Check the UAC bits to decide what the user wants us to do 783 with the unaliged access. */ 784 785 if (!test_thread_flag (TIF_UAC_NOPRINT)) { 786 if (cnt >= 5 && time_after(jiffies, last_time + 5 * HZ)) { 787 cnt = 0; 788 } 789 if (++cnt < 5) { 790 printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n", 791 current->comm, task_pid_nr(current), 792 regs->pc - 4, va, opcode, reg); 793 } 794 last_time = jiffies; 795 } 796 if (test_thread_flag (TIF_UAC_SIGBUS)) 797 goto give_sigbus; 798 /* Not sure why you'd want to use this, but... */ 799 if (test_thread_flag (TIF_UAC_NOFIX)) 800 return; 801 802 /* Don't bother reading ds in the access check since we already 803 know that this came from the user. Also rely on the fact that 804 the page at TASK_SIZE is unmapped and so can't be touched anyway. */ 805 if (!__access_ok((unsigned long)va, 0, USER_DS)) 806 goto give_sigsegv; 807 808 ++unaligned[1].count; 809 unaligned[1].va = (unsigned long)va; 810 unaligned[1].pc = regs->pc - 4; 811 812 if ((1L << opcode) & OP_INT_MASK) { 813 /* it's an integer load/store */ 814 if (reg < 30) { 815 reg_addr = (unsigned long *) 816 ((char *)regs + unauser_reg_offsets[reg]); 817 } else if (reg == 30) { 818 /* usp in PAL regs */ 819 fake_reg = rdusp(); 820 } else { 821 /* zero "register" */ 822 fake_reg = 0; 823 } 824 } 825 826 /* We don't want to use the generic get/put unaligned macros as 827 we want to trap exceptions. Only if we actually get an 828 exception will we decide whether we should have caught it. */ 829 830 switch (opcode) { 831 case 0x0c: /* ldwu */ 832 __asm__ __volatile__( 833 "1: ldq_u %1,0(%3)\n" 834 "2: ldq_u %2,1(%3)\n" 835 " extwl %1,%3,%1\n" 836 " extwh %2,%3,%2\n" 837 "3:\n" 838 ".section __ex_table,\"a\"\n" 839 " .long 1b - .\n" 840 " lda %1,3b-1b(%0)\n" 841 " .long 2b - .\n" 842 " lda %2,3b-2b(%0)\n" 843 ".previous" 844 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 845 : "r"(va), "0"(0)); 846 if (error) 847 goto give_sigsegv; 848 *reg_addr = tmp1|tmp2; 849 break; 850 851 case 0x22: /* lds */ 852 __asm__ __volatile__( 853 "1: ldq_u %1,0(%3)\n" 854 "2: ldq_u %2,3(%3)\n" 855 " extll %1,%3,%1\n" 856 " extlh %2,%3,%2\n" 857 "3:\n" 858 ".section __ex_table,\"a\"\n" 859 " .long 1b - .\n" 860 " lda %1,3b-1b(%0)\n" 861 " .long 2b - .\n" 862 " lda %2,3b-2b(%0)\n" 863 ".previous" 864 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 865 : "r"(va), "0"(0)); 866 if (error) 867 goto give_sigsegv; 868 alpha_write_fp_reg(reg, s_mem_to_reg((int)(tmp1|tmp2))); 869 return; 870 871 case 0x23: /* ldt */ 872 __asm__ __volatile__( 873 "1: ldq_u %1,0(%3)\n" 874 "2: ldq_u %2,7(%3)\n" 875 " extql %1,%3,%1\n" 876 " extqh %2,%3,%2\n" 877 "3:\n" 878 ".section __ex_table,\"a\"\n" 879 " .long 1b - .\n" 880 " lda %1,3b-1b(%0)\n" 881 " .long 2b - .\n" 882 " lda %2,3b-2b(%0)\n" 883 ".previous" 884 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 885 : "r"(va), "0"(0)); 886 if (error) 887 goto give_sigsegv; 888 alpha_write_fp_reg(reg, tmp1|tmp2); 889 return; 890 891 case 0x28: /* ldl */ 892 __asm__ __volatile__( 893 "1: ldq_u %1,0(%3)\n" 894 "2: ldq_u %2,3(%3)\n" 895 " extll %1,%3,%1\n" 896 " extlh %2,%3,%2\n" 897 "3:\n" 898 ".section __ex_table,\"a\"\n" 899 " .long 1b - .\n" 900 " lda %1,3b-1b(%0)\n" 901 " .long 2b - .\n" 902 " lda %2,3b-2b(%0)\n" 903 ".previous" 904 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 905 : "r"(va), "0"(0)); 906 if (error) 907 goto give_sigsegv; 908 *reg_addr = (int)(tmp1|tmp2); 909 break; 910 911 case 0x29: /* ldq */ 912 __asm__ __volatile__( 913 "1: ldq_u %1,0(%3)\n" 914 "2: ldq_u %2,7(%3)\n" 915 " extql %1,%3,%1\n" 916 " extqh %2,%3,%2\n" 917 "3:\n" 918 ".section __ex_table,\"a\"\n" 919 " .long 1b - .\n" 920 " lda %1,3b-1b(%0)\n" 921 " .long 2b - .\n" 922 " lda %2,3b-2b(%0)\n" 923 ".previous" 924 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 925 : "r"(va), "0"(0)); 926 if (error) 927 goto give_sigsegv; 928 *reg_addr = tmp1|tmp2; 929 break; 930 931 /* Note that the store sequences do not indicate that they change 932 memory because it _should_ be affecting nothing in this context. 933 (Otherwise we have other, much larger, problems.) */ 934 case 0x0d: /* stw */ 935 __asm__ __volatile__( 936 "1: ldq_u %2,1(%5)\n" 937 "2: ldq_u %1,0(%5)\n" 938 " inswh %6,%5,%4\n" 939 " inswl %6,%5,%3\n" 940 " mskwh %2,%5,%2\n" 941 " mskwl %1,%5,%1\n" 942 " or %2,%4,%2\n" 943 " or %1,%3,%1\n" 944 "3: stq_u %2,1(%5)\n" 945 "4: stq_u %1,0(%5)\n" 946 "5:\n" 947 ".section __ex_table,\"a\"\n" 948 " .long 1b - .\n" 949 " lda %2,5b-1b(%0)\n" 950 " .long 2b - .\n" 951 " lda %1,5b-2b(%0)\n" 952 " .long 3b - .\n" 953 " lda $31,5b-3b(%0)\n" 954 " .long 4b - .\n" 955 " lda $31,5b-4b(%0)\n" 956 ".previous" 957 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 958 "=&r"(tmp3), "=&r"(tmp4) 959 : "r"(va), "r"(*reg_addr), "0"(0)); 960 if (error) 961 goto give_sigsegv; 962 return; 963 964 case 0x26: /* sts */ 965 fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg)); 966 /* FALLTHRU */ 967 968 case 0x2c: /* stl */ 969 __asm__ __volatile__( 970 "1: ldq_u %2,3(%5)\n" 971 "2: ldq_u %1,0(%5)\n" 972 " inslh %6,%5,%4\n" 973 " insll %6,%5,%3\n" 974 " msklh %2,%5,%2\n" 975 " mskll %1,%5,%1\n" 976 " or %2,%4,%2\n" 977 " or %1,%3,%1\n" 978 "3: stq_u %2,3(%5)\n" 979 "4: stq_u %1,0(%5)\n" 980 "5:\n" 981 ".section __ex_table,\"a\"\n" 982 " .long 1b - .\n" 983 " lda %2,5b-1b(%0)\n" 984 " .long 2b - .\n" 985 " lda %1,5b-2b(%0)\n" 986 " .long 3b - .\n" 987 " lda $31,5b-3b(%0)\n" 988 " .long 4b - .\n" 989 " lda $31,5b-4b(%0)\n" 990 ".previous" 991 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 992 "=&r"(tmp3), "=&r"(tmp4) 993 : "r"(va), "r"(*reg_addr), "0"(0)); 994 if (error) 995 goto give_sigsegv; 996 return; 997 998 case 0x27: /* stt */ 999 fake_reg = alpha_read_fp_reg(reg); 1000 /* FALLTHRU */ 1001 1002 case 0x2d: /* stq */ 1003 __asm__ __volatile__( 1004 "1: ldq_u %2,7(%5)\n" 1005 "2: ldq_u %1,0(%5)\n" 1006 " insqh %6,%5,%4\n" 1007 " insql %6,%5,%3\n" 1008 " mskqh %2,%5,%2\n" 1009 " mskql %1,%5,%1\n" 1010 " or %2,%4,%2\n" 1011 " or %1,%3,%1\n" 1012 "3: stq_u %2,7(%5)\n" 1013 "4: stq_u %1,0(%5)\n" 1014 "5:\n" 1015 ".section __ex_table,\"a\"\n\t" 1016 " .long 1b - .\n" 1017 " lda %2,5b-1b(%0)\n" 1018 " .long 2b - .\n" 1019 " lda %1,5b-2b(%0)\n" 1020 " .long 3b - .\n" 1021 " lda $31,5b-3b(%0)\n" 1022 " .long 4b - .\n" 1023 " lda $31,5b-4b(%0)\n" 1024 ".previous" 1025 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 1026 "=&r"(tmp3), "=&r"(tmp4) 1027 : "r"(va), "r"(*reg_addr), "0"(0)); 1028 if (error) 1029 goto give_sigsegv; 1030 return; 1031 1032 default: 1033 /* What instruction were you trying to use, exactly? */ 1034 goto give_sigbus; 1035 } 1036 1037 /* Only integer loads should get here; everyone else returns early. */ 1038 if (reg == 30) 1039 wrusp(fake_reg); 1040 return; 1041 1042 give_sigsegv: 1043 regs->pc -= 4; /* make pc point to faulting insn */ 1044 info.si_signo = SIGSEGV; 1045 info.si_errno = 0; 1046 1047 /* We need to replicate some of the logic in mm/fault.c, 1048 since we don't have access to the fault code in the 1049 exception handling return path. */ 1050 if (!__access_ok((unsigned long)va, 0, USER_DS)) 1051 info.si_code = SEGV_ACCERR; 1052 else { 1053 struct mm_struct *mm = current->mm; 1054 down_read(&mm->mmap_sem); 1055 if (find_vma(mm, (unsigned long)va)) 1056 info.si_code = SEGV_ACCERR; 1057 else 1058 info.si_code = SEGV_MAPERR; 1059 up_read(&mm->mmap_sem); 1060 } 1061 info.si_addr = va; 1062 send_sig_info(SIGSEGV, &info, current); 1063 return; 1064 1065 give_sigbus: 1066 regs->pc -= 4; 1067 info.si_signo = SIGBUS; 1068 info.si_errno = 0; 1069 info.si_code = BUS_ADRALN; 1070 info.si_addr = va; 1071 send_sig_info(SIGBUS, &info, current); 1072 return; 1073 } 1074 1075 void __cpuinit 1076 trap_init(void) 1077 { 1078 /* Tell PAL-code what global pointer we want in the kernel. */ 1079 register unsigned long gptr __asm__("$29"); 1080 wrkgp(gptr); 1081 1082 /* Hack for Multia (UDB) and JENSEN: some of their SRMs have 1083 a bug in the handling of the opDEC fault. Fix it up if so. */ 1084 if (implver() == IMPLVER_EV4) 1085 opDEC_check(); 1086 1087 wrent(entArith, 1); 1088 wrent(entMM, 2); 1089 wrent(entIF, 3); 1090 wrent(entUna, 4); 1091 wrent(entSys, 5); 1092 wrent(entDbg, 6); 1093 } 1094