xref: /openbmc/linux/arch/alpha/kernel/sys_sx164.c (revision 15e3ae36)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  *	linux/arch/alpha/kernel/sys_sx164.c
4  *
5  *	Copyright (C) 1995 David A Rusling
6  *	Copyright (C) 1996 Jay A Estabrook
7  *	Copyright (C) 1998, 1999, 2000 Richard Henderson
8  *
9  * Code supporting the SX164 (PCA56+PYXIS).
10  */
11 
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/mm.h>
15 #include <linux/sched.h>
16 #include <linux/pci.h>
17 #include <linux/init.h>
18 #include <linux/bitops.h>
19 
20 #include <asm/ptrace.h>
21 #include <asm/dma.h>
22 #include <asm/irq.h>
23 #include <asm/mmu_context.h>
24 #include <asm/io.h>
25 #include <asm/pgtable.h>
26 #include <asm/core_cia.h>
27 #include <asm/hwrpb.h>
28 #include <asm/tlbflush.h>
29 #include <asm/special_insns.h>
30 
31 #include "proto.h"
32 #include "irq_impl.h"
33 #include "pci_impl.h"
34 #include "machvec_impl.h"
35 
36 
37 static void __init
38 sx164_init_irq(void)
39 {
40 	outb(0, DMA1_RESET_REG);
41 	outb(0, DMA2_RESET_REG);
42 	outb(DMA_MODE_CASCADE, DMA2_MODE_REG);
43 	outb(0, DMA2_MASK_REG);
44 
45 	if (alpha_using_srm)
46 		alpha_mv.device_interrupt = srm_device_interrupt;
47 
48 	init_i8259a_irqs();
49 
50 	/* Not interested in the bogus interrupts (0,3,4,5,40-47),
51 	   NMI (1), or HALT (2).  */
52 	if (alpha_using_srm)
53 		init_srm_irqs(40, 0x3f0000);
54 	else
55 		init_pyxis_irqs(0xff00003f0000UL);
56 
57 	if (request_irq(16 + 6, no_action, 0, "timer-cascade", NULL))
58 		pr_err("Failed to register timer-cascade interrupt\n");
59 }
60 
61 /*
62  * PCI Fixup configuration.
63  *
64  * Summary @ PYXIS_INT_REQ:
65  * Bit      Meaning
66  * 0        RSVD
67  * 1        NMI
68  * 2        Halt/Reset switch
69  * 3        MBZ
70  * 4        RAZ
71  * 5        RAZ
72  * 6        Interval timer (RTC)
73  * 7        PCI-ISA Bridge
74  * 8        Interrupt Line A from slot 3
75  * 9        Interrupt Line A from slot 2
76  *10        Interrupt Line A from slot 1
77  *11        Interrupt Line A from slot 0
78  *12        Interrupt Line B from slot 3
79  *13        Interrupt Line B from slot 2
80  *14        Interrupt Line B from slot 1
81  *15        Interrupt line B from slot 0
82  *16        Interrupt Line C from slot 3
83  *17        Interrupt Line C from slot 2
84  *18        Interrupt Line C from slot 1
85  *19        Interrupt Line C from slot 0
86  *20        Interrupt Line D from slot 3
87  *21        Interrupt Line D from slot 2
88  *22        Interrupt Line D from slot 1
89  *23        Interrupt Line D from slot 0
90  *
91  * IdSel
92  *   5  32 bit PCI option slot 2
93  *   6  64 bit PCI option slot 0
94  *   7  64 bit PCI option slot 1
95  *   8  Cypress I/O
96  *   9  32 bit PCI option slot 3
97  */
98 
99 static int
100 sx164_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
101 {
102 	static char irq_tab[5][5] = {
103 		/*INT    INTA   INTB   INTC   INTD */
104 		{ 16+ 9, 16+ 9, 16+13, 16+17, 16+21}, /* IdSel 5 slot 2 J17 */
105 		{ 16+11, 16+11, 16+15, 16+19, 16+23}, /* IdSel 6 slot 0 J19 */
106 		{ 16+10, 16+10, 16+14, 16+18, 16+22}, /* IdSel 7 slot 1 J18 */
107 		{    -1,    -1,    -1,	  -1,    -1}, /* IdSel 8 SIO        */
108 		{ 16+ 8, 16+ 8, 16+12, 16+16, 16+20}  /* IdSel 9 slot 3 J15 */
109 	};
110 	const long min_idsel = 5, max_idsel = 9, irqs_per_slot = 5;
111 	return COMMON_TABLE_LOOKUP;
112 }
113 
114 static void __init
115 sx164_init_pci(void)
116 {
117 	cia_init_pci();
118 	SMC669_Init(0);
119 }
120 
121 static void __init
122 sx164_init_arch(void)
123 {
124 	/*
125 	 * OSF palcode v1.23 forgets to enable PCA56 Motion Video
126 	 * Instructions. Let's enable it.
127 	 * We have to check palcode revision because CSERVE interface
128 	 * is subject to change without notice. For example, it
129 	 * has been changed completely since v1.16 (found in MILO
130 	 * distribution). -ink
131 	 */
132 	struct percpu_struct *cpu = (struct percpu_struct*)
133 		((char*)hwrpb + hwrpb->processor_offset);
134 
135 	if (amask(AMASK_MAX) != 0
136 	    && alpha_using_srm
137 	    && (cpu->pal_revision & 0xffff) <= 0x117) {
138 		__asm__ __volatile__(
139 		"lda	$16,8($31)\n"
140 		"call_pal 9\n"		/* Allow PALRES insns in kernel mode */
141 		".long  0x64000118\n\n"	/* hw_mfpr $0,icsr */
142 		"ldah	$16,(1<<(19-16))($31)\n"
143 		"or	$0,$16,$0\n"	/* set MVE bit */
144 		".long  0x74000118\n"	/* hw_mtpr $0,icsr */
145 		"lda	$16,9($31)\n"
146 		"call_pal 9"		/* Disable PALRES insns */
147 		: : : "$0", "$16");
148 		printk("PCA56 MVI set enabled\n");
149 	}
150 
151 	pyxis_init_arch();
152 }
153 
154 /*
155  * The System Vector
156  */
157 
158 struct alpha_machine_vector sx164_mv __initmv = {
159 	.vector_name		= "SX164",
160 	DO_EV5_MMU,
161 	DO_DEFAULT_RTC,
162 	DO_PYXIS_IO,
163 	.machine_check		= cia_machine_check,
164 	.max_isa_dma_address	= ALPHA_MAX_ISA_DMA_ADDRESS,
165 	.min_io_address		= DEFAULT_IO_BASE,
166 	.min_mem_address	= DEFAULT_MEM_BASE,
167 	.pci_dac_offset		= PYXIS_DAC_OFFSET,
168 
169 	.nr_irqs		= 48,
170 	.device_interrupt	= pyxis_device_interrupt,
171 
172 	.init_arch		= sx164_init_arch,
173 	.init_irq		= sx164_init_irq,
174 	.init_rtc		= common_init_rtc,
175 	.init_pci		= sx164_init_pci,
176 	.kill_arch		= cia_kill_arch,
177 	.pci_map_irq		= sx164_map_irq,
178 	.pci_swizzle		= common_swizzle,
179 };
180 ALIAS_MV(sx164)
181