1b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0
21da177e4SLinus Torvalds /*
31da177e4SLinus Torvalds * linux/arch/alpha/kernel/sys_sx164.c
41da177e4SLinus Torvalds *
51da177e4SLinus Torvalds * Copyright (C) 1995 David A Rusling
61da177e4SLinus Torvalds * Copyright (C) 1996 Jay A Estabrook
71da177e4SLinus Torvalds * Copyright (C) 1998, 1999, 2000 Richard Henderson
81da177e4SLinus Torvalds *
91da177e4SLinus Torvalds * Code supporting the SX164 (PCA56+PYXIS).
101da177e4SLinus Torvalds */
111da177e4SLinus Torvalds
121da177e4SLinus Torvalds #include <linux/kernel.h>
131da177e4SLinus Torvalds #include <linux/types.h>
141da177e4SLinus Torvalds #include <linux/mm.h>
151da177e4SLinus Torvalds #include <linux/sched.h>
161da177e4SLinus Torvalds #include <linux/pci.h>
171da177e4SLinus Torvalds #include <linux/init.h>
181da177e4SLinus Torvalds #include <linux/bitops.h>
191da177e4SLinus Torvalds
201da177e4SLinus Torvalds #include <asm/ptrace.h>
211da177e4SLinus Torvalds #include <asm/dma.h>
221da177e4SLinus Torvalds #include <asm/irq.h>
231da177e4SLinus Torvalds #include <asm/mmu_context.h>
241da177e4SLinus Torvalds #include <asm/io.h>
251da177e4SLinus Torvalds #include <asm/core_cia.h>
261da177e4SLinus Torvalds #include <asm/hwrpb.h>
271da177e4SLinus Torvalds #include <asm/tlbflush.h>
28ec221208SDavid Howells #include <asm/special_insns.h>
291da177e4SLinus Torvalds
301da177e4SLinus Torvalds #include "proto.h"
311da177e4SLinus Torvalds #include "irq_impl.h"
321da177e4SLinus Torvalds #include "pci_impl.h"
331da177e4SLinus Torvalds #include "machvec_impl.h"
341da177e4SLinus Torvalds
351da177e4SLinus Torvalds
361da177e4SLinus Torvalds static void __init
sx164_init_irq(void)371da177e4SLinus Torvalds sx164_init_irq(void)
381da177e4SLinus Torvalds {
391da177e4SLinus Torvalds outb(0, DMA1_RESET_REG);
401da177e4SLinus Torvalds outb(0, DMA2_RESET_REG);
411da177e4SLinus Torvalds outb(DMA_MODE_CASCADE, DMA2_MODE_REG);
421da177e4SLinus Torvalds outb(0, DMA2_MASK_REG);
431da177e4SLinus Torvalds
441da177e4SLinus Torvalds if (alpha_using_srm)
451da177e4SLinus Torvalds alpha_mv.device_interrupt = srm_device_interrupt;
461da177e4SLinus Torvalds
471da177e4SLinus Torvalds init_i8259a_irqs();
481da177e4SLinus Torvalds
491da177e4SLinus Torvalds /* Not interested in the bogus interrupts (0,3,4,5,40-47),
501da177e4SLinus Torvalds NMI (1), or HALT (2). */
511da177e4SLinus Torvalds if (alpha_using_srm)
521da177e4SLinus Torvalds init_srm_irqs(40, 0x3f0000);
531da177e4SLinus Torvalds else
541da177e4SLinus Torvalds init_pyxis_irqs(0xff00003f0000UL);
551da177e4SLinus Torvalds
5682c849ebSafzal mohammed if (request_irq(16 + 6, no_action, 0, "timer-cascade", NULL))
5782c849ebSafzal mohammed pr_err("Failed to register timer-cascade interrupt\n");
581da177e4SLinus Torvalds }
591da177e4SLinus Torvalds
601da177e4SLinus Torvalds /*
611da177e4SLinus Torvalds * PCI Fixup configuration.
621da177e4SLinus Torvalds *
631da177e4SLinus Torvalds * Summary @ PYXIS_INT_REQ:
641da177e4SLinus Torvalds * Bit Meaning
651da177e4SLinus Torvalds * 0 RSVD
661da177e4SLinus Torvalds * 1 NMI
671da177e4SLinus Torvalds * 2 Halt/Reset switch
681da177e4SLinus Torvalds * 3 MBZ
691da177e4SLinus Torvalds * 4 RAZ
701da177e4SLinus Torvalds * 5 RAZ
711da177e4SLinus Torvalds * 6 Interval timer (RTC)
721da177e4SLinus Torvalds * 7 PCI-ISA Bridge
731da177e4SLinus Torvalds * 8 Interrupt Line A from slot 3
741da177e4SLinus Torvalds * 9 Interrupt Line A from slot 2
751da177e4SLinus Torvalds *10 Interrupt Line A from slot 1
761da177e4SLinus Torvalds *11 Interrupt Line A from slot 0
771da177e4SLinus Torvalds *12 Interrupt Line B from slot 3
781da177e4SLinus Torvalds *13 Interrupt Line B from slot 2
791da177e4SLinus Torvalds *14 Interrupt Line B from slot 1
801da177e4SLinus Torvalds *15 Interrupt line B from slot 0
811da177e4SLinus Torvalds *16 Interrupt Line C from slot 3
821da177e4SLinus Torvalds *17 Interrupt Line C from slot 2
831da177e4SLinus Torvalds *18 Interrupt Line C from slot 1
841da177e4SLinus Torvalds *19 Interrupt Line C from slot 0
851da177e4SLinus Torvalds *20 Interrupt Line D from slot 3
861da177e4SLinus Torvalds *21 Interrupt Line D from slot 2
871da177e4SLinus Torvalds *22 Interrupt Line D from slot 1
881da177e4SLinus Torvalds *23 Interrupt Line D from slot 0
891da177e4SLinus Torvalds *
901da177e4SLinus Torvalds * IdSel
911da177e4SLinus Torvalds * 5 32 bit PCI option slot 2
921da177e4SLinus Torvalds * 6 64 bit PCI option slot 0
931da177e4SLinus Torvalds * 7 64 bit PCI option slot 1
941da177e4SLinus Torvalds * 8 Cypress I/O
951da177e4SLinus Torvalds * 9 32 bit PCI option slot 3
961da177e4SLinus Torvalds */
971da177e4SLinus Torvalds
98814eae59SLorenzo Pieralisi static int
sx164_map_irq(const struct pci_dev * dev,u8 slot,u8 pin)99d5341942SRalf Baechle sx164_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
1001da177e4SLinus Torvalds {
101814eae59SLorenzo Pieralisi static char irq_tab[5][5] = {
1021da177e4SLinus Torvalds /*INT INTA INTB INTC INTD */
1031da177e4SLinus Torvalds { 16+ 9, 16+ 9, 16+13, 16+17, 16+21}, /* IdSel 5 slot 2 J17 */
1041da177e4SLinus Torvalds { 16+11, 16+11, 16+15, 16+19, 16+23}, /* IdSel 6 slot 0 J19 */
1051da177e4SLinus Torvalds { 16+10, 16+10, 16+14, 16+18, 16+22}, /* IdSel 7 slot 1 J18 */
1061da177e4SLinus Torvalds { -1, -1, -1, -1, -1}, /* IdSel 8 SIO */
1071da177e4SLinus Torvalds { 16+ 8, 16+ 8, 16+12, 16+16, 16+20} /* IdSel 9 slot 3 J15 */
1081da177e4SLinus Torvalds };
1091da177e4SLinus Torvalds const long min_idsel = 5, max_idsel = 9, irqs_per_slot = 5;
1101da177e4SLinus Torvalds return COMMON_TABLE_LOOKUP;
1111da177e4SLinus Torvalds }
1121da177e4SLinus Torvalds
1131da177e4SLinus Torvalds static void __init
sx164_init_pci(void)1141da177e4SLinus Torvalds sx164_init_pci(void)
1151da177e4SLinus Torvalds {
1161da177e4SLinus Torvalds cia_init_pci();
1171da177e4SLinus Torvalds SMC669_Init(0);
1181da177e4SLinus Torvalds }
1191da177e4SLinus Torvalds
1201da177e4SLinus Torvalds static void __init
sx164_init_arch(void)1211da177e4SLinus Torvalds sx164_init_arch(void)
1221da177e4SLinus Torvalds {
1231da177e4SLinus Torvalds /*
1241da177e4SLinus Torvalds * OSF palcode v1.23 forgets to enable PCA56 Motion Video
1251da177e4SLinus Torvalds * Instructions. Let's enable it.
1261da177e4SLinus Torvalds * We have to check palcode revision because CSERVE interface
1271da177e4SLinus Torvalds * is subject to change without notice. For example, it
1281da177e4SLinus Torvalds * has been changed completely since v1.16 (found in MILO
1291da177e4SLinus Torvalds * distribution). -ink
1301da177e4SLinus Torvalds */
1311da177e4SLinus Torvalds struct percpu_struct *cpu = (struct percpu_struct*)
1321da177e4SLinus Torvalds ((char*)hwrpb + hwrpb->processor_offset);
1331da177e4SLinus Torvalds
1341da177e4SLinus Torvalds if (amask(AMASK_MAX) != 0
1351da177e4SLinus Torvalds && alpha_using_srm
1367fc1a1abSIvan Kokshaysky && (cpu->pal_revision & 0xffff) <= 0x117) {
1371da177e4SLinus Torvalds __asm__ __volatile__(
1381da177e4SLinus Torvalds "lda $16,8($31)\n"
1391da177e4SLinus Torvalds "call_pal 9\n" /* Allow PALRES insns in kernel mode */
1401da177e4SLinus Torvalds ".long 0x64000118\n\n" /* hw_mfpr $0,icsr */
1411da177e4SLinus Torvalds "ldah $16,(1<<(19-16))($31)\n"
1421da177e4SLinus Torvalds "or $0,$16,$0\n" /* set MVE bit */
1431da177e4SLinus Torvalds ".long 0x74000118\n" /* hw_mtpr $0,icsr */
1441da177e4SLinus Torvalds "lda $16,9($31)\n"
1451da177e4SLinus Torvalds "call_pal 9" /* Disable PALRES insns */
1461da177e4SLinus Torvalds : : : "$0", "$16");
1471da177e4SLinus Torvalds printk("PCA56 MVI set enabled\n");
1481da177e4SLinus Torvalds }
1491da177e4SLinus Torvalds
1501da177e4SLinus Torvalds pyxis_init_arch();
1511da177e4SLinus Torvalds }
1521da177e4SLinus Torvalds
1531da177e4SLinus Torvalds /*
1541da177e4SLinus Torvalds * The System Vector
1551da177e4SLinus Torvalds */
1561da177e4SLinus Torvalds
1571da177e4SLinus Torvalds struct alpha_machine_vector sx164_mv __initmv = {
1581da177e4SLinus Torvalds .vector_name = "SX164",
1591da177e4SLinus Torvalds DO_EV5_MMU,
1601da177e4SLinus Torvalds DO_DEFAULT_RTC,
1611da177e4SLinus Torvalds DO_PYXIS_IO,
1621da177e4SLinus Torvalds .machine_check = cia_machine_check,
1631da177e4SLinus Torvalds .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS,
1641da177e4SLinus Torvalds .min_io_address = DEFAULT_IO_BASE,
1651da177e4SLinus Torvalds .min_mem_address = DEFAULT_MEM_BASE,
1661da177e4SLinus Torvalds .pci_dac_offset = PYXIS_DAC_OFFSET,
1671da177e4SLinus Torvalds
1681da177e4SLinus Torvalds .nr_irqs = 48,
1691da177e4SLinus Torvalds .device_interrupt = pyxis_device_interrupt,
1701da177e4SLinus Torvalds
1711da177e4SLinus Torvalds .init_arch = sx164_init_arch,
1721da177e4SLinus Torvalds .init_irq = sx164_init_irq,
1731da177e4SLinus Torvalds .init_rtc = common_init_rtc,
1741da177e4SLinus Torvalds .init_pci = sx164_init_pci,
1751da177e4SLinus Torvalds .kill_arch = cia_kill_arch,
1761da177e4SLinus Torvalds .pci_map_irq = sx164_map_irq,
1771da177e4SLinus Torvalds .pci_swizzle = common_swizzle,
1781da177e4SLinus Torvalds };
1791da177e4SLinus Torvalds ALIAS_MV(sx164)
180