1b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0 21da177e4SLinus Torvalds /* 31da177e4SLinus Torvalds * linux/arch/alpha/kernel/sys_cabriolet.c 41da177e4SLinus Torvalds * 51da177e4SLinus Torvalds * Copyright (C) 1995 David A Rusling 61da177e4SLinus Torvalds * Copyright (C) 1996 Jay A Estabrook 71da177e4SLinus Torvalds * Copyright (C) 1998, 1999, 2000 Richard Henderson 81da177e4SLinus Torvalds * 91da177e4SLinus Torvalds * Code supporting the Cabriolet (AlphaPC64), EB66+, and EB164, 101da177e4SLinus Torvalds * PC164 and LX164. 111da177e4SLinus Torvalds */ 121da177e4SLinus Torvalds 131da177e4SLinus Torvalds #include <linux/kernel.h> 141da177e4SLinus Torvalds #include <linux/types.h> 151da177e4SLinus Torvalds #include <linux/mm.h> 161da177e4SLinus Torvalds #include <linux/sched.h> 171da177e4SLinus Torvalds #include <linux/pci.h> 181da177e4SLinus Torvalds #include <linux/init.h> 191da177e4SLinus Torvalds #include <linux/bitops.h> 201da177e4SLinus Torvalds 211da177e4SLinus Torvalds #include <asm/ptrace.h> 221da177e4SLinus Torvalds #include <asm/dma.h> 231da177e4SLinus Torvalds #include <asm/irq.h> 241da177e4SLinus Torvalds #include <asm/mmu_context.h> 251da177e4SLinus Torvalds #include <asm/io.h> 261da177e4SLinus Torvalds #include <asm/pgtable.h> 271da177e4SLinus Torvalds #include <asm/core_apecs.h> 281da177e4SLinus Torvalds #include <asm/core_cia.h> 291da177e4SLinus Torvalds #include <asm/core_lca.h> 301da177e4SLinus Torvalds #include <asm/tlbflush.h> 311da177e4SLinus Torvalds 321da177e4SLinus Torvalds #include "proto.h" 331da177e4SLinus Torvalds #include "irq_impl.h" 341da177e4SLinus Torvalds #include "pci_impl.h" 351da177e4SLinus Torvalds #include "machvec_impl.h" 3659b25ed9SMorten H. Larsen #include "pc873xx.h" 371da177e4SLinus Torvalds 381da177e4SLinus Torvalds /* Note mask bit is true for DISABLED irqs. */ 391da177e4SLinus Torvalds static unsigned long cached_irq_mask = ~0UL; 401da177e4SLinus Torvalds 411da177e4SLinus Torvalds static inline void 421da177e4SLinus Torvalds cabriolet_update_irq_hw(unsigned int irq, unsigned long mask) 431da177e4SLinus Torvalds { 441da177e4SLinus Torvalds int ofs = (irq - 16) / 8; 451da177e4SLinus Torvalds outb(mask >> (16 + ofs * 8), 0x804 + ofs); 461da177e4SLinus Torvalds } 471da177e4SLinus Torvalds 481da177e4SLinus Torvalds static inline void 49118b4691SThomas Gleixner cabriolet_enable_irq(struct irq_data *d) 501da177e4SLinus Torvalds { 51118b4691SThomas Gleixner cabriolet_update_irq_hw(d->irq, cached_irq_mask &= ~(1UL << d->irq)); 521da177e4SLinus Torvalds } 531da177e4SLinus Torvalds 541da177e4SLinus Torvalds static void 55118b4691SThomas Gleixner cabriolet_disable_irq(struct irq_data *d) 561da177e4SLinus Torvalds { 57118b4691SThomas Gleixner cabriolet_update_irq_hw(d->irq, cached_irq_mask |= 1UL << d->irq); 581da177e4SLinus Torvalds } 591da177e4SLinus Torvalds 6044377f62SThomas Gleixner static struct irq_chip cabriolet_irq_type = { 618ab1221cSThomas Gleixner .name = "CABRIOLET", 62118b4691SThomas Gleixner .irq_unmask = cabriolet_enable_irq, 63118b4691SThomas Gleixner .irq_mask = cabriolet_disable_irq, 64118b4691SThomas Gleixner .irq_mask_ack = cabriolet_disable_irq, 651da177e4SLinus Torvalds }; 661da177e4SLinus Torvalds 671da177e4SLinus Torvalds static void 687ca56053SAl Viro cabriolet_device_interrupt(unsigned long v) 691da177e4SLinus Torvalds { 701da177e4SLinus Torvalds unsigned long pld; 711da177e4SLinus Torvalds unsigned int i; 721da177e4SLinus Torvalds 731da177e4SLinus Torvalds /* Read the interrupt summary registers */ 741da177e4SLinus Torvalds pld = inb(0x804) | (inb(0x805) << 8) | (inb(0x806) << 16); 751da177e4SLinus Torvalds 761da177e4SLinus Torvalds /* 771da177e4SLinus Torvalds * Now for every possible bit set, work through them and call 781da177e4SLinus Torvalds * the appropriate interrupt handler. 791da177e4SLinus Torvalds */ 801da177e4SLinus Torvalds while (pld) { 811da177e4SLinus Torvalds i = ffz(~pld); 821da177e4SLinus Torvalds pld &= pld - 1; /* clear least bit set */ 831da177e4SLinus Torvalds if (i == 4) { 847ca56053SAl Viro isa_device_interrupt(v); 851da177e4SLinus Torvalds } else { 863dbb8c62SAl Viro handle_irq(16 + i); 871da177e4SLinus Torvalds } 881da177e4SLinus Torvalds } 891da177e4SLinus Torvalds } 901da177e4SLinus Torvalds 911da177e4SLinus Torvalds static void __init 927ca56053SAl Viro common_init_irq(void (*srm_dev_int)(unsigned long v)) 931da177e4SLinus Torvalds { 941da177e4SLinus Torvalds init_i8259a_irqs(); 951da177e4SLinus Torvalds 961da177e4SLinus Torvalds if (alpha_using_srm) { 971da177e4SLinus Torvalds alpha_mv.device_interrupt = srm_dev_int; 981da177e4SLinus Torvalds init_srm_irqs(35, 0); 991da177e4SLinus Torvalds } 1001da177e4SLinus Torvalds else { 1011da177e4SLinus Torvalds long i; 1021da177e4SLinus Torvalds 1031da177e4SLinus Torvalds outb(0xff, 0x804); 1041da177e4SLinus Torvalds outb(0xff, 0x805); 1051da177e4SLinus Torvalds outb(0xff, 0x806); 1061da177e4SLinus Torvalds 1071da177e4SLinus Torvalds for (i = 16; i < 35; ++i) { 108a9eb076bSThomas Gleixner irq_set_chip_and_handler(i, &cabriolet_irq_type, 1097d209c81SKyle McMartin handle_level_irq); 110118b4691SThomas Gleixner irq_set_status_flags(i, IRQ_LEVEL); 1111da177e4SLinus Torvalds } 1121da177e4SLinus Torvalds } 1131da177e4SLinus Torvalds 1141da177e4SLinus Torvalds common_init_isa_dma(); 11582c849ebSafzal mohammed if (request_irq(16 + 4, no_action, 0, "isa-cascade", NULL)) 11682c849ebSafzal mohammed pr_err("Failed to register isa-cascade interrupt\n"); 1171da177e4SLinus Torvalds } 1181da177e4SLinus Torvalds 1191da177e4SLinus Torvalds #ifndef CONFIG_ALPHA_PC164 1201da177e4SLinus Torvalds static void __init 1211da177e4SLinus Torvalds cabriolet_init_irq(void) 1221da177e4SLinus Torvalds { 1231da177e4SLinus Torvalds common_init_irq(srm_device_interrupt); 1241da177e4SLinus Torvalds } 1251da177e4SLinus Torvalds #endif 1261da177e4SLinus Torvalds 1271da177e4SLinus Torvalds #if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_PC164) 1281da177e4SLinus Torvalds /* In theory, the PC164 has the same interrupt hardware as the other 1291da177e4SLinus Torvalds Cabriolet based systems. However, something got screwed up late 1301da177e4SLinus Torvalds in the development cycle which broke the interrupt masking hardware. 1311da177e4SLinus Torvalds Repeat, it is not possible to mask and ack interrupts. At all. 1321da177e4SLinus Torvalds 1331da177e4SLinus Torvalds In an attempt to work around this, while processing interrupts, 1341da177e4SLinus Torvalds we do not allow the IPL to drop below what it is currently. This 1351da177e4SLinus Torvalds prevents the possibility of recursion. 1361da177e4SLinus Torvalds 1371da177e4SLinus Torvalds ??? Another option might be to force all PCI devices to use edge 1381da177e4SLinus Torvalds triggered rather than level triggered interrupts. That might be 1391da177e4SLinus Torvalds too invasive though. */ 1401da177e4SLinus Torvalds 1411da177e4SLinus Torvalds static void 1427ca56053SAl Viro pc164_srm_device_interrupt(unsigned long v) 1431da177e4SLinus Torvalds { 1441da177e4SLinus Torvalds __min_ipl = getipl(); 1457ca56053SAl Viro srm_device_interrupt(v); 1461da177e4SLinus Torvalds __min_ipl = 0; 1471da177e4SLinus Torvalds } 1481da177e4SLinus Torvalds 1491da177e4SLinus Torvalds static void 1507ca56053SAl Viro pc164_device_interrupt(unsigned long v) 1511da177e4SLinus Torvalds { 1521da177e4SLinus Torvalds __min_ipl = getipl(); 1537ca56053SAl Viro cabriolet_device_interrupt(v); 1541da177e4SLinus Torvalds __min_ipl = 0; 1551da177e4SLinus Torvalds } 1561da177e4SLinus Torvalds 1571da177e4SLinus Torvalds static void __init 1581da177e4SLinus Torvalds pc164_init_irq(void) 1591da177e4SLinus Torvalds { 1601da177e4SLinus Torvalds common_init_irq(pc164_srm_device_interrupt); 1611da177e4SLinus Torvalds } 1621da177e4SLinus Torvalds #endif 1631da177e4SLinus Torvalds 1641da177e4SLinus Torvalds /* 1651da177e4SLinus Torvalds * The EB66+ is very similar to the EB66 except that it does not have 1661da177e4SLinus Torvalds * the on-board NCR and Tulip chips. In the code below, I have used 1671da177e4SLinus Torvalds * slot number to refer to the id select line and *not* the slot 1681da177e4SLinus Torvalds * number used in the EB66+ documentation. However, in the table, 1691da177e4SLinus Torvalds * I've given the slot number, the id select line and the Jxx number 1701da177e4SLinus Torvalds * that's printed on the board. The interrupt pins from the PCI slots 1711da177e4SLinus Torvalds * are wired into 3 interrupt summary registers at 0x804, 0x805 and 1721da177e4SLinus Torvalds * 0x806 ISA. 1731da177e4SLinus Torvalds * 1741da177e4SLinus Torvalds * In the table, -1 means don't assign an IRQ number. This is usually 1751da177e4SLinus Torvalds * because it is the Saturn IO (SIO) PCI/ISA Bridge Chip. 1761da177e4SLinus Torvalds */ 1771da177e4SLinus Torvalds 178814eae59SLorenzo Pieralisi static inline int 179d5341942SRalf Baechle eb66p_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 1801da177e4SLinus Torvalds { 181814eae59SLorenzo Pieralisi static char irq_tab[5][5] = { 1821da177e4SLinus Torvalds /*INT INTA INTB INTC INTD */ 1831da177e4SLinus Torvalds {16+0, 16+0, 16+5, 16+9, 16+13}, /* IdSel 6, slot 0, J25 */ 1841da177e4SLinus Torvalds {16+1, 16+1, 16+6, 16+10, 16+14}, /* IdSel 7, slot 1, J26 */ 1851da177e4SLinus Torvalds { -1, -1, -1, -1, -1}, /* IdSel 8, SIO */ 1861da177e4SLinus Torvalds {16+2, 16+2, 16+7, 16+11, 16+15}, /* IdSel 9, slot 2, J27 */ 1871da177e4SLinus Torvalds {16+3, 16+3, 16+8, 16+12, 16+6} /* IdSel 10, slot 3, J28 */ 1881da177e4SLinus Torvalds }; 1891da177e4SLinus Torvalds const long min_idsel = 6, max_idsel = 10, irqs_per_slot = 5; 1901da177e4SLinus Torvalds return COMMON_TABLE_LOOKUP; 1911da177e4SLinus Torvalds } 1921da177e4SLinus Torvalds 1931da177e4SLinus Torvalds 1941da177e4SLinus Torvalds /* 1951da177e4SLinus Torvalds * The AlphaPC64 is very similar to the EB66+ except that its slots 1961da177e4SLinus Torvalds * are numbered differently. In the code below, I have used slot 1971da177e4SLinus Torvalds * number to refer to the id select line and *not* the slot number 1981da177e4SLinus Torvalds * used in the AlphaPC64 documentation. However, in the table, I've 1991da177e4SLinus Torvalds * given the slot number, the id select line and the Jxx number that's 2001da177e4SLinus Torvalds * printed on the board. The interrupt pins from the PCI slots are 2011da177e4SLinus Torvalds * wired into 3 interrupt summary registers at 0x804, 0x805 and 0x806 2021da177e4SLinus Torvalds * ISA. 2031da177e4SLinus Torvalds * 2041da177e4SLinus Torvalds * In the table, -1 means don't assign an IRQ number. This is usually 2051da177e4SLinus Torvalds * because it is the Saturn IO (SIO) PCI/ISA Bridge Chip. 2061da177e4SLinus Torvalds */ 2071da177e4SLinus Torvalds 208814eae59SLorenzo Pieralisi static inline int 209d5341942SRalf Baechle cabriolet_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 2101da177e4SLinus Torvalds { 211814eae59SLorenzo Pieralisi static char irq_tab[5][5] = { 2121da177e4SLinus Torvalds /*INT INTA INTB INTC INTD */ 2131da177e4SLinus Torvalds { 16+2, 16+2, 16+7, 16+11, 16+15}, /* IdSel 5, slot 2, J21 */ 2141da177e4SLinus Torvalds { 16+0, 16+0, 16+5, 16+9, 16+13}, /* IdSel 6, slot 0, J19 */ 2151da177e4SLinus Torvalds { 16+1, 16+1, 16+6, 16+10, 16+14}, /* IdSel 7, slot 1, J20 */ 2161da177e4SLinus Torvalds { -1, -1, -1, -1, -1}, /* IdSel 8, SIO */ 2171da177e4SLinus Torvalds { 16+3, 16+3, 16+8, 16+12, 16+16} /* IdSel 9, slot 3, J22 */ 2181da177e4SLinus Torvalds }; 2191da177e4SLinus Torvalds const long min_idsel = 5, max_idsel = 9, irqs_per_slot = 5; 2201da177e4SLinus Torvalds return COMMON_TABLE_LOOKUP; 2211da177e4SLinus Torvalds } 2221da177e4SLinus Torvalds 2231da177e4SLinus Torvalds static inline void __init 22459b25ed9SMorten H. Larsen cabriolet_enable_ide(void) 22559b25ed9SMorten H. Larsen { 22659b25ed9SMorten H. Larsen if (pc873xx_probe() == -1) { 22759b25ed9SMorten H. Larsen printk(KERN_ERR "Probing for PC873xx Super IO chip failed.\n"); 22859b25ed9SMorten H. Larsen } else { 22959b25ed9SMorten H. Larsen printk(KERN_INFO "Found %s Super IO chip at 0x%x\n", 23059b25ed9SMorten H. Larsen pc873xx_get_model(), pc873xx_get_base()); 23159b25ed9SMorten H. Larsen 23259b25ed9SMorten H. Larsen pc873xx_enable_ide(); 23359b25ed9SMorten H. Larsen } 23459b25ed9SMorten H. Larsen } 23559b25ed9SMorten H. Larsen 23659b25ed9SMorten H. Larsen static inline void __init 2371da177e4SLinus Torvalds cabriolet_init_pci(void) 2381da177e4SLinus Torvalds { 2391da177e4SLinus Torvalds common_init_pci(); 24059b25ed9SMorten H. Larsen cabriolet_enable_ide(); 2411da177e4SLinus Torvalds } 2421da177e4SLinus Torvalds 2431da177e4SLinus Torvalds static inline void __init 2441da177e4SLinus Torvalds cia_cab_init_pci(void) 2451da177e4SLinus Torvalds { 2461da177e4SLinus Torvalds cia_init_pci(); 24759b25ed9SMorten H. Larsen cabriolet_enable_ide(); 2481da177e4SLinus Torvalds } 2491da177e4SLinus Torvalds 2501da177e4SLinus Torvalds /* 2511da177e4SLinus Torvalds * The PC164 and LX164 have 19 PCI interrupts, four from each of the four 2521da177e4SLinus Torvalds * PCI slots, the SIO, PCI/IDE, and USB. 2531da177e4SLinus Torvalds * 2541da177e4SLinus Torvalds * Each of the interrupts can be individually masked. This is 2551da177e4SLinus Torvalds * accomplished by setting the appropriate bit in the mask register. 2561da177e4SLinus Torvalds * A bit is set by writing a "1" to the desired position in the mask 2571da177e4SLinus Torvalds * register and cleared by writing a "0". There are 3 mask registers 2581da177e4SLinus Torvalds * located at ISA address 804h, 805h and 806h. 2591da177e4SLinus Torvalds * 2601da177e4SLinus Torvalds * An I/O read at ISA address 804h, 805h, 806h will return the 2611da177e4SLinus Torvalds * state of the 11 PCI interrupts and not the state of the MASKED 2621da177e4SLinus Torvalds * interrupts. 2631da177e4SLinus Torvalds * 2641da177e4SLinus Torvalds * Note: A write to I/O 804h, 805h, and 806h the mask register will be 2651da177e4SLinus Torvalds * updated. 2661da177e4SLinus Torvalds * 2671da177e4SLinus Torvalds * 2681da177e4SLinus Torvalds * ISA DATA<7:0> 2691da177e4SLinus Torvalds * ISA +--------------------------------------------------------------+ 2701da177e4SLinus Torvalds * ADDRESS | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 2711da177e4SLinus Torvalds * +==============================================================+ 2721da177e4SLinus Torvalds * 0x804 | INTB0 | USB | IDE | SIO | INTA3 |INTA2 | INTA1 | INTA0 | 2731da177e4SLinus Torvalds * +--------------------------------------------------------------+ 2741da177e4SLinus Torvalds * 0x805 | INTD0 | INTC3 | INTC2 | INTC1 | INTC0 |INTB3 | INTB2 | INTB1 | 2751da177e4SLinus Torvalds * +--------------------------------------------------------------+ 2761da177e4SLinus Torvalds * 0x806 | Rsrv | Rsrv | Rsrv | Rsrv | Rsrv |INTD3 | INTD2 | INTD1 | 2771da177e4SLinus Torvalds * +--------------------------------------------------------------+ 2781da177e4SLinus Torvalds * * Rsrv = reserved bits 2791da177e4SLinus Torvalds * Note: The mask register is write-only. 2801da177e4SLinus Torvalds * 2811da177e4SLinus Torvalds * IdSel 2821da177e4SLinus Torvalds * 5 32 bit PCI option slot 2 2831da177e4SLinus Torvalds * 6 64 bit PCI option slot 0 2841da177e4SLinus Torvalds * 7 64 bit PCI option slot 1 2851da177e4SLinus Torvalds * 8 Saturn I/O 2861da177e4SLinus Torvalds * 9 32 bit PCI option slot 3 2871da177e4SLinus Torvalds * 10 USB 2881da177e4SLinus Torvalds * 11 IDE 2891da177e4SLinus Torvalds * 2901da177e4SLinus Torvalds */ 2911da177e4SLinus Torvalds 292814eae59SLorenzo Pieralisi static inline int 293d5341942SRalf Baechle alphapc164_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 2941da177e4SLinus Torvalds { 295814eae59SLorenzo Pieralisi static char irq_tab[7][5] = { 2961da177e4SLinus Torvalds /*INT INTA INTB INTC INTD */ 2971da177e4SLinus Torvalds { 16+2, 16+2, 16+9, 16+13, 16+17}, /* IdSel 5, slot 2, J20 */ 2981da177e4SLinus Torvalds { 16+0, 16+0, 16+7, 16+11, 16+15}, /* IdSel 6, slot 0, J29 */ 2991da177e4SLinus Torvalds { 16+1, 16+1, 16+8, 16+12, 16+16}, /* IdSel 7, slot 1, J26 */ 3001da177e4SLinus Torvalds { -1, -1, -1, -1, -1}, /* IdSel 8, SIO */ 3011da177e4SLinus Torvalds { 16+3, 16+3, 16+10, 16+14, 16+18}, /* IdSel 9, slot 3, J19 */ 3021da177e4SLinus Torvalds { 16+6, 16+6, 16+6, 16+6, 16+6}, /* IdSel 10, USB */ 3031da177e4SLinus Torvalds { 16+5, 16+5, 16+5, 16+5, 16+5} /* IdSel 11, IDE */ 3041da177e4SLinus Torvalds }; 3051da177e4SLinus Torvalds const long min_idsel = 5, max_idsel = 11, irqs_per_slot = 5; 3061da177e4SLinus Torvalds return COMMON_TABLE_LOOKUP; 3071da177e4SLinus Torvalds } 3081da177e4SLinus Torvalds 3091da177e4SLinus Torvalds static inline void __init 3101da177e4SLinus Torvalds alphapc164_init_pci(void) 3111da177e4SLinus Torvalds { 3121da177e4SLinus Torvalds cia_init_pci(); 3131da177e4SLinus Torvalds SMC93x_Init(); 3141da177e4SLinus Torvalds } 3151da177e4SLinus Torvalds 3161da177e4SLinus Torvalds 3171da177e4SLinus Torvalds /* 3181da177e4SLinus Torvalds * The System Vector 3191da177e4SLinus Torvalds */ 3201da177e4SLinus Torvalds 3211da177e4SLinus Torvalds #if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_CABRIOLET) 3221da177e4SLinus Torvalds struct alpha_machine_vector cabriolet_mv __initmv = { 3231da177e4SLinus Torvalds .vector_name = "Cabriolet", 3241da177e4SLinus Torvalds DO_EV4_MMU, 3251da177e4SLinus Torvalds DO_DEFAULT_RTC, 3261da177e4SLinus Torvalds DO_APECS_IO, 3271da177e4SLinus Torvalds .machine_check = apecs_machine_check, 3281da177e4SLinus Torvalds .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS, 3291da177e4SLinus Torvalds .min_io_address = DEFAULT_IO_BASE, 3301da177e4SLinus Torvalds .min_mem_address = APECS_AND_LCA_DEFAULT_MEM_BASE, 3311da177e4SLinus Torvalds 3321da177e4SLinus Torvalds .nr_irqs = 35, 3331da177e4SLinus Torvalds .device_interrupt = cabriolet_device_interrupt, 3341da177e4SLinus Torvalds 3351da177e4SLinus Torvalds .init_arch = apecs_init_arch, 3361da177e4SLinus Torvalds .init_irq = cabriolet_init_irq, 3371da177e4SLinus Torvalds .init_rtc = common_init_rtc, 3381da177e4SLinus Torvalds .init_pci = cabriolet_init_pci, 3391da177e4SLinus Torvalds .pci_map_irq = cabriolet_map_irq, 3401da177e4SLinus Torvalds .pci_swizzle = common_swizzle, 3411da177e4SLinus Torvalds }; 3421da177e4SLinus Torvalds #ifndef CONFIG_ALPHA_EB64P 3431da177e4SLinus Torvalds ALIAS_MV(cabriolet) 3441da177e4SLinus Torvalds #endif 3451da177e4SLinus Torvalds #endif 3461da177e4SLinus Torvalds 3471da177e4SLinus Torvalds #if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EB164) 3481da177e4SLinus Torvalds struct alpha_machine_vector eb164_mv __initmv = { 3491da177e4SLinus Torvalds .vector_name = "EB164", 3501da177e4SLinus Torvalds DO_EV5_MMU, 3511da177e4SLinus Torvalds DO_DEFAULT_RTC, 3521da177e4SLinus Torvalds DO_CIA_IO, 3531da177e4SLinus Torvalds .machine_check = cia_machine_check, 3541da177e4SLinus Torvalds .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS, 3551da177e4SLinus Torvalds .min_io_address = DEFAULT_IO_BASE, 3561da177e4SLinus Torvalds .min_mem_address = CIA_DEFAULT_MEM_BASE, 3571da177e4SLinus Torvalds 3581da177e4SLinus Torvalds .nr_irqs = 35, 3591da177e4SLinus Torvalds .device_interrupt = cabriolet_device_interrupt, 3601da177e4SLinus Torvalds 3611da177e4SLinus Torvalds .init_arch = cia_init_arch, 3621da177e4SLinus Torvalds .init_irq = cabriolet_init_irq, 3631da177e4SLinus Torvalds .init_rtc = common_init_rtc, 3641da177e4SLinus Torvalds .init_pci = cia_cab_init_pci, 3651da177e4SLinus Torvalds .kill_arch = cia_kill_arch, 3661da177e4SLinus Torvalds .pci_map_irq = cabriolet_map_irq, 3671da177e4SLinus Torvalds .pci_swizzle = common_swizzle, 3681da177e4SLinus Torvalds }; 3691da177e4SLinus Torvalds ALIAS_MV(eb164) 3701da177e4SLinus Torvalds #endif 3711da177e4SLinus Torvalds 3721da177e4SLinus Torvalds #if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EB66P) 3731da177e4SLinus Torvalds struct alpha_machine_vector eb66p_mv __initmv = { 3741da177e4SLinus Torvalds .vector_name = "EB66+", 3751da177e4SLinus Torvalds DO_EV4_MMU, 3761da177e4SLinus Torvalds DO_DEFAULT_RTC, 3771da177e4SLinus Torvalds DO_LCA_IO, 3781da177e4SLinus Torvalds .machine_check = lca_machine_check, 3791da177e4SLinus Torvalds .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS, 3801da177e4SLinus Torvalds .min_io_address = DEFAULT_IO_BASE, 3811da177e4SLinus Torvalds .min_mem_address = APECS_AND_LCA_DEFAULT_MEM_BASE, 3821da177e4SLinus Torvalds 3831da177e4SLinus Torvalds .nr_irqs = 35, 3841da177e4SLinus Torvalds .device_interrupt = cabriolet_device_interrupt, 3851da177e4SLinus Torvalds 3861da177e4SLinus Torvalds .init_arch = lca_init_arch, 3871da177e4SLinus Torvalds .init_irq = cabriolet_init_irq, 3881da177e4SLinus Torvalds .init_rtc = common_init_rtc, 3891da177e4SLinus Torvalds .init_pci = cabriolet_init_pci, 3901da177e4SLinus Torvalds .pci_map_irq = eb66p_map_irq, 3911da177e4SLinus Torvalds .pci_swizzle = common_swizzle, 3921da177e4SLinus Torvalds }; 3931da177e4SLinus Torvalds ALIAS_MV(eb66p) 3941da177e4SLinus Torvalds #endif 3951da177e4SLinus Torvalds 3961da177e4SLinus Torvalds #if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_LX164) 3971da177e4SLinus Torvalds struct alpha_machine_vector lx164_mv __initmv = { 3981da177e4SLinus Torvalds .vector_name = "LX164", 3991da177e4SLinus Torvalds DO_EV5_MMU, 4001da177e4SLinus Torvalds DO_DEFAULT_RTC, 4011da177e4SLinus Torvalds DO_PYXIS_IO, 4021da177e4SLinus Torvalds .machine_check = cia_machine_check, 4031da177e4SLinus Torvalds .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS, 4041da177e4SLinus Torvalds .min_io_address = DEFAULT_IO_BASE, 4051da177e4SLinus Torvalds .min_mem_address = DEFAULT_MEM_BASE, 4061da177e4SLinus Torvalds .pci_dac_offset = PYXIS_DAC_OFFSET, 4071da177e4SLinus Torvalds 4081da177e4SLinus Torvalds .nr_irqs = 35, 4091da177e4SLinus Torvalds .device_interrupt = cabriolet_device_interrupt, 4101da177e4SLinus Torvalds 4111da177e4SLinus Torvalds .init_arch = pyxis_init_arch, 4121da177e4SLinus Torvalds .init_irq = cabriolet_init_irq, 4131da177e4SLinus Torvalds .init_rtc = common_init_rtc, 4141da177e4SLinus Torvalds .init_pci = alphapc164_init_pci, 4151da177e4SLinus Torvalds .kill_arch = cia_kill_arch, 4161da177e4SLinus Torvalds .pci_map_irq = alphapc164_map_irq, 4171da177e4SLinus Torvalds .pci_swizzle = common_swizzle, 4181da177e4SLinus Torvalds }; 4191da177e4SLinus Torvalds ALIAS_MV(lx164) 4201da177e4SLinus Torvalds #endif 4211da177e4SLinus Torvalds 4221da177e4SLinus Torvalds #if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_PC164) 4231da177e4SLinus Torvalds struct alpha_machine_vector pc164_mv __initmv = { 4241da177e4SLinus Torvalds .vector_name = "PC164", 4251da177e4SLinus Torvalds DO_EV5_MMU, 4261da177e4SLinus Torvalds DO_DEFAULT_RTC, 4271da177e4SLinus Torvalds DO_CIA_IO, 4281da177e4SLinus Torvalds .machine_check = cia_machine_check, 4291da177e4SLinus Torvalds .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS, 4301da177e4SLinus Torvalds .min_io_address = DEFAULT_IO_BASE, 4311da177e4SLinus Torvalds .min_mem_address = CIA_DEFAULT_MEM_BASE, 4321da177e4SLinus Torvalds 4331da177e4SLinus Torvalds .nr_irqs = 35, 4341da177e4SLinus Torvalds .device_interrupt = pc164_device_interrupt, 4351da177e4SLinus Torvalds 4361da177e4SLinus Torvalds .init_arch = cia_init_arch, 4371da177e4SLinus Torvalds .init_irq = pc164_init_irq, 4381da177e4SLinus Torvalds .init_rtc = common_init_rtc, 4391da177e4SLinus Torvalds .init_pci = alphapc164_init_pci, 4401da177e4SLinus Torvalds .kill_arch = cia_kill_arch, 4411da177e4SLinus Torvalds .pci_map_irq = alphapc164_map_irq, 4421da177e4SLinus Torvalds .pci_swizzle = common_swizzle, 4431da177e4SLinus Torvalds }; 4441da177e4SLinus Torvalds ALIAS_MV(pc164) 4451da177e4SLinus Torvalds #endif 446