xref: /openbmc/linux/arch/alpha/kernel/smp.c (revision c21b37f6)
1 /*
2  *	linux/arch/alpha/kernel/smp.c
3  *
4  *      2001-07-09 Phil Ezolt (Phillip.Ezolt@compaq.com)
5  *            Renamed modified smp_call_function to smp_call_function_on_cpu()
6  *            Created an function that conforms to the old calling convention
7  *            of smp_call_function().
8  *
9  *            This is helpful for DCPI.
10  *
11  */
12 
13 #include <linux/errno.h>
14 #include <linux/kernel.h>
15 #include <linux/kernel_stat.h>
16 #include <linux/module.h>
17 #include <linux/sched.h>
18 #include <linux/mm.h>
19 #include <linux/err.h>
20 #include <linux/threads.h>
21 #include <linux/smp.h>
22 #include <linux/interrupt.h>
23 #include <linux/init.h>
24 #include <linux/delay.h>
25 #include <linux/spinlock.h>
26 #include <linux/irq.h>
27 #include <linux/cache.h>
28 #include <linux/profile.h>
29 #include <linux/bitops.h>
30 
31 #include <asm/hwrpb.h>
32 #include <asm/ptrace.h>
33 #include <asm/atomic.h>
34 
35 #include <asm/io.h>
36 #include <asm/irq.h>
37 #include <asm/pgtable.h>
38 #include <asm/pgalloc.h>
39 #include <asm/mmu_context.h>
40 #include <asm/tlbflush.h>
41 
42 #include "proto.h"
43 #include "irq_impl.h"
44 
45 
46 #define DEBUG_SMP 0
47 #if DEBUG_SMP
48 #define DBGS(args)	printk args
49 #else
50 #define DBGS(args)
51 #endif
52 
53 /* A collection of per-processor data.  */
54 struct cpuinfo_alpha cpu_data[NR_CPUS];
55 EXPORT_SYMBOL(cpu_data);
56 
57 /* A collection of single bit ipi messages.  */
58 static struct {
59 	unsigned long bits ____cacheline_aligned;
60 } ipi_data[NR_CPUS] __cacheline_aligned;
61 
62 enum ipi_message_type {
63 	IPI_RESCHEDULE,
64 	IPI_CALL_FUNC,
65 	IPI_CPU_STOP,
66 };
67 
68 /* Set to a secondary's cpuid when it comes online.  */
69 static int smp_secondary_alive __devinitdata = 0;
70 
71 /* Which cpus ids came online.  */
72 cpumask_t cpu_online_map;
73 
74 EXPORT_SYMBOL(cpu_online_map);
75 
76 int smp_num_probed;		/* Internal processor count */
77 int smp_num_cpus = 1;		/* Number that came online.  */
78 EXPORT_SYMBOL(smp_num_cpus);
79 
80 extern void calibrate_delay(void);
81 
82 
83 
84 /*
85  * Called by both boot and secondaries to move global data into
86  *  per-processor storage.
87  */
88 static inline void __init
89 smp_store_cpu_info(int cpuid)
90 {
91 	cpu_data[cpuid].loops_per_jiffy = loops_per_jiffy;
92 	cpu_data[cpuid].last_asn = ASN_FIRST_VERSION;
93 	cpu_data[cpuid].need_new_asn = 0;
94 	cpu_data[cpuid].asn_lock = 0;
95 }
96 
97 /*
98  * Ideally sets up per-cpu profiling hooks.  Doesn't do much now...
99  */
100 static inline void __init
101 smp_setup_percpu_timer(int cpuid)
102 {
103 	cpu_data[cpuid].prof_counter = 1;
104 	cpu_data[cpuid].prof_multiplier = 1;
105 }
106 
107 static void __init
108 wait_boot_cpu_to_stop(int cpuid)
109 {
110 	unsigned long stop = jiffies + 10*HZ;
111 
112 	while (time_before(jiffies, stop)) {
113 	        if (!smp_secondary_alive)
114 			return;
115 		barrier();
116 	}
117 
118 	printk("wait_boot_cpu_to_stop: FAILED on CPU %d, hanging now\n", cpuid);
119 	for (;;)
120 		barrier();
121 }
122 
123 /*
124  * Where secondaries begin a life of C.
125  */
126 void __init
127 smp_callin(void)
128 {
129 	int cpuid = hard_smp_processor_id();
130 
131 	if (cpu_test_and_set(cpuid, cpu_online_map)) {
132 		printk("??, cpu 0x%x already present??\n", cpuid);
133 		BUG();
134 	}
135 
136 	/* Turn on machine checks.  */
137 	wrmces(7);
138 
139 	/* Set trap vectors.  */
140 	trap_init();
141 
142 	/* Set interrupt vector.  */
143 	wrent(entInt, 0);
144 
145 	/* Get our local ticker going. */
146 	smp_setup_percpu_timer(cpuid);
147 
148 	/* Call platform-specific callin, if specified */
149 	if (alpha_mv.smp_callin) alpha_mv.smp_callin();
150 
151 	/* All kernel threads share the same mm context.  */
152 	atomic_inc(&init_mm.mm_count);
153 	current->active_mm = &init_mm;
154 
155 	/* Must have completely accurate bogos.  */
156 	local_irq_enable();
157 
158 	/* Wait boot CPU to stop with irq enabled before running
159 	   calibrate_delay. */
160 	wait_boot_cpu_to_stop(cpuid);
161 	mb();
162 	calibrate_delay();
163 
164 	smp_store_cpu_info(cpuid);
165 	/* Allow master to continue only after we written loops_per_jiffy.  */
166 	wmb();
167 	smp_secondary_alive = 1;
168 
169 	DBGS(("smp_callin: commencing CPU %d current %p active_mm %p\n",
170 	      cpuid, current, current->active_mm));
171 
172 	/* Do nothing.  */
173 	cpu_idle();
174 }
175 
176 /* Wait until hwrpb->txrdy is clear for cpu.  Return -1 on timeout.  */
177 static int __devinit
178 wait_for_txrdy (unsigned long cpumask)
179 {
180 	unsigned long timeout;
181 
182 	if (!(hwrpb->txrdy & cpumask))
183 		return 0;
184 
185 	timeout = jiffies + 10*HZ;
186 	while (time_before(jiffies, timeout)) {
187 		if (!(hwrpb->txrdy & cpumask))
188 			return 0;
189 		udelay(10);
190 		barrier();
191 	}
192 
193 	return -1;
194 }
195 
196 /*
197  * Send a message to a secondary's console.  "START" is one such
198  * interesting message.  ;-)
199  */
200 static void __init
201 send_secondary_console_msg(char *str, int cpuid)
202 {
203 	struct percpu_struct *cpu;
204 	register char *cp1, *cp2;
205 	unsigned long cpumask;
206 	size_t len;
207 
208 	cpu = (struct percpu_struct *)
209 		((char*)hwrpb
210 		 + hwrpb->processor_offset
211 		 + cpuid * hwrpb->processor_size);
212 
213 	cpumask = (1UL << cpuid);
214 	if (wait_for_txrdy(cpumask))
215 		goto timeout;
216 
217 	cp2 = str;
218 	len = strlen(cp2);
219 	*(unsigned int *)&cpu->ipc_buffer[0] = len;
220 	cp1 = (char *) &cpu->ipc_buffer[1];
221 	memcpy(cp1, cp2, len);
222 
223 	/* atomic test and set */
224 	wmb();
225 	set_bit(cpuid, &hwrpb->rxrdy);
226 
227 	if (wait_for_txrdy(cpumask))
228 		goto timeout;
229 	return;
230 
231  timeout:
232 	printk("Processor %x not ready\n", cpuid);
233 }
234 
235 /*
236  * A secondary console wants to send a message.  Receive it.
237  */
238 static void
239 recv_secondary_console_msg(void)
240 {
241 	int mycpu, i, cnt;
242 	unsigned long txrdy = hwrpb->txrdy;
243 	char *cp1, *cp2, buf[80];
244 	struct percpu_struct *cpu;
245 
246 	DBGS(("recv_secondary_console_msg: TXRDY 0x%lx.\n", txrdy));
247 
248 	mycpu = hard_smp_processor_id();
249 
250 	for (i = 0; i < NR_CPUS; i++) {
251 		if (!(txrdy & (1UL << i)))
252 			continue;
253 
254 		DBGS(("recv_secondary_console_msg: "
255 		      "TXRDY contains CPU %d.\n", i));
256 
257 		cpu = (struct percpu_struct *)
258 		  ((char*)hwrpb
259 		   + hwrpb->processor_offset
260 		   + i * hwrpb->processor_size);
261 
262  		DBGS(("recv_secondary_console_msg: on %d from %d"
263 		      " HALT_REASON 0x%lx FLAGS 0x%lx\n",
264 		      mycpu, i, cpu->halt_reason, cpu->flags));
265 
266 		cnt = cpu->ipc_buffer[0] >> 32;
267 		if (cnt <= 0 || cnt >= 80)
268 			strcpy(buf, "<<< BOGUS MSG >>>");
269 		else {
270 			cp1 = (char *) &cpu->ipc_buffer[11];
271 			cp2 = buf;
272 			strcpy(cp2, cp1);
273 
274 			while ((cp2 = strchr(cp2, '\r')) != 0) {
275 				*cp2 = ' ';
276 				if (cp2[1] == '\n')
277 					cp2[1] = ' ';
278 			}
279 		}
280 
281 		DBGS((KERN_INFO "recv_secondary_console_msg: on %d "
282 		      "message is '%s'\n", mycpu, buf));
283 	}
284 
285 	hwrpb->txrdy = 0;
286 }
287 
288 /*
289  * Convince the console to have a secondary cpu begin execution.
290  */
291 static int __init
292 secondary_cpu_start(int cpuid, struct task_struct *idle)
293 {
294 	struct percpu_struct *cpu;
295 	struct pcb_struct *hwpcb, *ipcb;
296 	unsigned long timeout;
297 
298 	cpu = (struct percpu_struct *)
299 		((char*)hwrpb
300 		 + hwrpb->processor_offset
301 		 + cpuid * hwrpb->processor_size);
302 	hwpcb = (struct pcb_struct *) cpu->hwpcb;
303 	ipcb = &task_thread_info(idle)->pcb;
304 
305 	/* Initialize the CPU's HWPCB to something just good enough for
306 	   us to get started.  Immediately after starting, we'll swpctx
307 	   to the target idle task's pcb.  Reuse the stack in the mean
308 	   time.  Precalculate the target PCBB.  */
309 	hwpcb->ksp = (unsigned long)ipcb + sizeof(union thread_union) - 16;
310 	hwpcb->usp = 0;
311 	hwpcb->ptbr = ipcb->ptbr;
312 	hwpcb->pcc = 0;
313 	hwpcb->asn = 0;
314 	hwpcb->unique = virt_to_phys(ipcb);
315 	hwpcb->flags = ipcb->flags;
316 	hwpcb->res1 = hwpcb->res2 = 0;
317 
318 #if 0
319 	DBGS(("KSP 0x%lx PTBR 0x%lx VPTBR 0x%lx UNIQUE 0x%lx\n",
320 	      hwpcb->ksp, hwpcb->ptbr, hwrpb->vptb, hwpcb->unique));
321 #endif
322 	DBGS(("Starting secondary cpu %d: state 0x%lx pal_flags 0x%lx\n",
323 	      cpuid, idle->state, ipcb->flags));
324 
325 	/* Setup HWRPB fields that SRM uses to activate secondary CPU */
326 	hwrpb->CPU_restart = __smp_callin;
327 	hwrpb->CPU_restart_data = (unsigned long) __smp_callin;
328 
329 	/* Recalculate and update the HWRPB checksum */
330 	hwrpb_update_checksum(hwrpb);
331 
332 	/*
333 	 * Send a "start" command to the specified processor.
334 	 */
335 
336 	/* SRM III 3.4.1.3 */
337 	cpu->flags |= 0x22;	/* turn on Context Valid and Restart Capable */
338 	cpu->flags &= ~1;	/* turn off Bootstrap In Progress */
339 	wmb();
340 
341 	send_secondary_console_msg("START\r\n", cpuid);
342 
343 	/* Wait 10 seconds for an ACK from the console.  */
344 	timeout = jiffies + 10*HZ;
345 	while (time_before(jiffies, timeout)) {
346 		if (cpu->flags & 1)
347 			goto started;
348 		udelay(10);
349 		barrier();
350 	}
351 	printk(KERN_ERR "SMP: Processor %d failed to start.\n", cpuid);
352 	return -1;
353 
354  started:
355 	DBGS(("secondary_cpu_start: SUCCESS for CPU %d!!!\n", cpuid));
356 	return 0;
357 }
358 
359 /*
360  * Bring one cpu online.
361  */
362 static int __cpuinit
363 smp_boot_one_cpu(int cpuid)
364 {
365 	struct task_struct *idle;
366 	unsigned long timeout;
367 
368 	/* Cook up an idler for this guy.  Note that the address we
369 	   give to kernel_thread is irrelevant -- it's going to start
370 	   where HWRPB.CPU_restart says to start.  But this gets all
371 	   the other task-y sort of data structures set up like we
372 	   wish.  We can't use kernel_thread since we must avoid
373 	   rescheduling the child.  */
374 	idle = fork_idle(cpuid);
375 	if (IS_ERR(idle))
376 		panic("failed fork for CPU %d", cpuid);
377 
378 	DBGS(("smp_boot_one_cpu: CPU %d state 0x%lx flags 0x%lx\n",
379 	      cpuid, idle->state, idle->flags));
380 
381 	/* Signal the secondary to wait a moment.  */
382 	smp_secondary_alive = -1;
383 
384 	/* Whirrr, whirrr, whirrrrrrrrr... */
385 	if (secondary_cpu_start(cpuid, idle))
386 		return -1;
387 
388 	/* Notify the secondary CPU it can run calibrate_delay.  */
389 	mb();
390 	smp_secondary_alive = 0;
391 
392 	/* We've been acked by the console; wait one second for
393 	   the task to start up for real.  */
394 	timeout = jiffies + 1*HZ;
395 	while (time_before(jiffies, timeout)) {
396 		if (smp_secondary_alive == 1)
397 			goto alive;
398 		udelay(10);
399 		barrier();
400 	}
401 
402 	/* We failed to boot the CPU.  */
403 
404 	printk(KERN_ERR "SMP: Processor %d is stuck.\n", cpuid);
405 	return -1;
406 
407  alive:
408 	/* Another "Red Snapper". */
409 	return 0;
410 }
411 
412 /*
413  * Called from setup_arch.  Detect an SMP system and which processors
414  * are present.
415  */
416 void __init
417 setup_smp(void)
418 {
419 	struct percpu_struct *cpubase, *cpu;
420 	unsigned long i;
421 
422 	if (boot_cpuid != 0) {
423 		printk(KERN_WARNING "SMP: Booting off cpu %d instead of 0?\n",
424 		       boot_cpuid);
425 	}
426 
427 	if (hwrpb->nr_processors > 1) {
428 		int boot_cpu_palrev;
429 
430 		DBGS(("setup_smp: nr_processors %ld\n",
431 		      hwrpb->nr_processors));
432 
433 		cpubase = (struct percpu_struct *)
434 			((char*)hwrpb + hwrpb->processor_offset);
435 		boot_cpu_palrev = cpubase->pal_revision;
436 
437 		for (i = 0; i < hwrpb->nr_processors; i++) {
438 			cpu = (struct percpu_struct *)
439 				((char *)cpubase + i*hwrpb->processor_size);
440 			if ((cpu->flags & 0x1cc) == 0x1cc) {
441 				smp_num_probed++;
442 				/* Assume here that "whami" == index */
443 				cpu_set(i, cpu_present_map);
444 				cpu->pal_revision = boot_cpu_palrev;
445 			}
446 
447 			DBGS(("setup_smp: CPU %d: flags 0x%lx type 0x%lx\n",
448 			      i, cpu->flags, cpu->type));
449 			DBGS(("setup_smp: CPU %d: PAL rev 0x%lx\n",
450 			      i, cpu->pal_revision));
451 		}
452 	} else {
453 		smp_num_probed = 1;
454 	}
455 
456 	printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_map = %lx\n",
457 	       smp_num_probed, cpu_present_map.bits[0]);
458 }
459 
460 /*
461  * Called by smp_init prepare the secondaries
462  */
463 void __init
464 smp_prepare_cpus(unsigned int max_cpus)
465 {
466 	/* Take care of some initial bookkeeping.  */
467 	memset(ipi_data, 0, sizeof(ipi_data));
468 
469 	current_thread_info()->cpu = boot_cpuid;
470 
471 	smp_store_cpu_info(boot_cpuid);
472 	smp_setup_percpu_timer(boot_cpuid);
473 
474 	/* Nothing to do on a UP box, or when told not to.  */
475 	if (smp_num_probed == 1 || max_cpus == 0) {
476 		cpu_present_map = cpumask_of_cpu(boot_cpuid);
477 		printk(KERN_INFO "SMP mode deactivated.\n");
478 		return;
479 	}
480 
481 	printk(KERN_INFO "SMP starting up secondaries.\n");
482 
483 	smp_num_cpus = smp_num_probed;
484 }
485 
486 void __devinit
487 smp_prepare_boot_cpu(void)
488 {
489 }
490 
491 int __cpuinit
492 __cpu_up(unsigned int cpu)
493 {
494 	smp_boot_one_cpu(cpu);
495 
496 	return cpu_online(cpu) ? 0 : -ENOSYS;
497 }
498 
499 void __init
500 smp_cpus_done(unsigned int max_cpus)
501 {
502 	int cpu;
503 	unsigned long bogosum = 0;
504 
505 	for(cpu = 0; cpu < NR_CPUS; cpu++)
506 		if (cpu_online(cpu))
507 			bogosum += cpu_data[cpu].loops_per_jiffy;
508 
509 	printk(KERN_INFO "SMP: Total of %d processors activated "
510 	       "(%lu.%02lu BogoMIPS).\n",
511 	       num_online_cpus(),
512 	       (bogosum + 2500) / (500000/HZ),
513 	       ((bogosum + 2500) / (5000/HZ)) % 100);
514 }
515 
516 
517 void
518 smp_percpu_timer_interrupt(struct pt_regs *regs)
519 {
520 	struct pt_regs *old_regs;
521 	int cpu = smp_processor_id();
522 	unsigned long user = user_mode(regs);
523 	struct cpuinfo_alpha *data = &cpu_data[cpu];
524 
525 	old_regs = set_irq_regs(regs);
526 
527 	/* Record kernel PC.  */
528 	profile_tick(CPU_PROFILING);
529 
530 	if (!--data->prof_counter) {
531 		/* We need to make like a normal interrupt -- otherwise
532 		   timer interrupts ignore the global interrupt lock,
533 		   which would be a Bad Thing.  */
534 		irq_enter();
535 
536 		update_process_times(user);
537 
538 		data->prof_counter = data->prof_multiplier;
539 
540 		irq_exit();
541 	}
542 	set_irq_regs(old_regs);
543 }
544 
545 int
546 setup_profiling_timer(unsigned int multiplier)
547 {
548 	return -EINVAL;
549 }
550 
551 
552 static void
553 send_ipi_message(cpumask_t to_whom, enum ipi_message_type operation)
554 {
555 	int i;
556 
557 	mb();
558 	for_each_cpu_mask(i, to_whom)
559 		set_bit(operation, &ipi_data[i].bits);
560 
561 	mb();
562 	for_each_cpu_mask(i, to_whom)
563 		wripir(i);
564 }
565 
566 /* Structure and data for smp_call_function.  This is designed to
567    minimize static memory requirements.  Plus it looks cleaner.  */
568 
569 struct smp_call_struct {
570 	void (*func) (void *info);
571 	void *info;
572 	long wait;
573 	atomic_t unstarted_count;
574 	atomic_t unfinished_count;
575 };
576 
577 static struct smp_call_struct *smp_call_function_data;
578 
579 /* Atomicly drop data into a shared pointer.  The pointer is free if
580    it is initially locked.  If retry, spin until free.  */
581 
582 static int
583 pointer_lock (void *lock, void *data, int retry)
584 {
585 	void *old, *tmp;
586 
587 	mb();
588  again:
589 	/* Compare and swap with zero.  */
590 	asm volatile (
591 	"1:	ldq_l	%0,%1\n"
592 	"	mov	%3,%2\n"
593 	"	bne	%0,2f\n"
594 	"	stq_c	%2,%1\n"
595 	"	beq	%2,1b\n"
596 	"2:"
597 	: "=&r"(old), "=m"(*(void **)lock), "=&r"(tmp)
598 	: "r"(data)
599 	: "memory");
600 
601 	if (old == 0)
602 		return 0;
603 	if (! retry)
604 		return -EBUSY;
605 
606 	while (*(void **)lock)
607 		barrier();
608 	goto again;
609 }
610 
611 void
612 handle_ipi(struct pt_regs *regs)
613 {
614 	int this_cpu = smp_processor_id();
615 	unsigned long *pending_ipis = &ipi_data[this_cpu].bits;
616 	unsigned long ops;
617 
618 #if 0
619 	DBGS(("handle_ipi: on CPU %d ops 0x%lx PC 0x%lx\n",
620 	      this_cpu, *pending_ipis, regs->pc));
621 #endif
622 
623 	mb();	/* Order interrupt and bit testing. */
624 	while ((ops = xchg(pending_ipis, 0)) != 0) {
625 	  mb();	/* Order bit clearing and data access. */
626 	  do {
627 		unsigned long which;
628 
629 		which = ops & -ops;
630 		ops &= ~which;
631 		which = __ffs(which);
632 
633 		switch (which) {
634 		case IPI_RESCHEDULE:
635 			/* Reschedule callback.  Everything to be done
636 			   is done by the interrupt return path.  */
637 			break;
638 
639 		case IPI_CALL_FUNC:
640 		    {
641 			struct smp_call_struct *data;
642 			void (*func)(void *info);
643 			void *info;
644 			int wait;
645 
646 			data = smp_call_function_data;
647 			func = data->func;
648 			info = data->info;
649 			wait = data->wait;
650 
651 			/* Notify the sending CPU that the data has been
652 			   received, and execution is about to begin.  */
653 			mb();
654 			atomic_dec (&data->unstarted_count);
655 
656 			/* At this point the structure may be gone unless
657 			   wait is true.  */
658 			(*func)(info);
659 
660 			/* Notify the sending CPU that the task is done.  */
661 			mb();
662 			if (wait) atomic_dec (&data->unfinished_count);
663 			break;
664 		    }
665 
666 		case IPI_CPU_STOP:
667 			halt();
668 
669 		default:
670 			printk(KERN_CRIT "Unknown IPI on CPU %d: %lu\n",
671 			       this_cpu, which);
672 			break;
673 		}
674 	  } while (ops);
675 
676 	  mb();	/* Order data access and bit testing. */
677 	}
678 
679 	cpu_data[this_cpu].ipi_count++;
680 
681 	if (hwrpb->txrdy)
682 		recv_secondary_console_msg();
683 }
684 
685 void
686 smp_send_reschedule(int cpu)
687 {
688 #ifdef DEBUG_IPI_MSG
689 	if (cpu == hard_smp_processor_id())
690 		printk(KERN_WARNING
691 		       "smp_send_reschedule: Sending IPI to self.\n");
692 #endif
693 	send_ipi_message(cpumask_of_cpu(cpu), IPI_RESCHEDULE);
694 }
695 
696 void
697 smp_send_stop(void)
698 {
699 	cpumask_t to_whom = cpu_possible_map;
700 	cpu_clear(smp_processor_id(), to_whom);
701 #ifdef DEBUG_IPI_MSG
702 	if (hard_smp_processor_id() != boot_cpu_id)
703 		printk(KERN_WARNING "smp_send_stop: Not on boot cpu.\n");
704 #endif
705 	send_ipi_message(to_whom, IPI_CPU_STOP);
706 }
707 
708 /*
709  * Run a function on all other CPUs.
710  *  <func>	The function to run. This must be fast and non-blocking.
711  *  <info>	An arbitrary pointer to pass to the function.
712  *  <retry>	If true, keep retrying until ready.
713  *  <wait>	If true, wait until function has completed on other CPUs.
714  *  [RETURNS]   0 on success, else a negative status code.
715  *
716  * Does not return until remote CPUs are nearly ready to execute <func>
717  * or are or have executed.
718  * You must not call this function with disabled interrupts or from a
719  * hardware interrupt handler or from a bottom half handler.
720  */
721 
722 int
723 smp_call_function_on_cpu (void (*func) (void *info), void *info, int retry,
724 			  int wait, cpumask_t to_whom)
725 {
726 	struct smp_call_struct data;
727 	unsigned long timeout;
728 	int num_cpus_to_call;
729 
730 	/* Can deadlock when called with interrupts disabled */
731 	WARN_ON(irqs_disabled());
732 
733 	data.func = func;
734 	data.info = info;
735 	data.wait = wait;
736 
737 	cpu_clear(smp_processor_id(), to_whom);
738 	num_cpus_to_call = cpus_weight(to_whom);
739 
740 	atomic_set(&data.unstarted_count, num_cpus_to_call);
741 	atomic_set(&data.unfinished_count, num_cpus_to_call);
742 
743 	/* Acquire the smp_call_function_data mutex.  */
744 	if (pointer_lock(&smp_call_function_data, &data, retry))
745 		return -EBUSY;
746 
747 	/* Send a message to the requested CPUs.  */
748 	send_ipi_message(to_whom, IPI_CALL_FUNC);
749 
750 	/* Wait for a minimal response.  */
751 	timeout = jiffies + HZ;
752 	while (atomic_read (&data.unstarted_count) > 0
753 	       && time_before (jiffies, timeout))
754 		barrier();
755 
756 	/* If there's no response yet, log a message but allow a longer
757 	 * timeout period -- if we get a response this time, log
758 	 * a message saying when we got it..
759 	 */
760 	if (atomic_read(&data.unstarted_count) > 0) {
761 		long start_time = jiffies;
762 		printk(KERN_ERR "%s: initial timeout -- trying long wait\n",
763 		       __FUNCTION__);
764 		timeout = jiffies + 30 * HZ;
765 		while (atomic_read(&data.unstarted_count) > 0
766 		       && time_before(jiffies, timeout))
767 			barrier();
768 		if (atomic_read(&data.unstarted_count) <= 0) {
769 			long delta = jiffies - start_time;
770 			printk(KERN_ERR
771 			       "%s: response %ld.%ld seconds into long wait\n",
772 			       __FUNCTION__, delta / HZ,
773 			       (100 * (delta - ((delta / HZ) * HZ))) / HZ);
774 		}
775 	}
776 
777 	/* We either got one or timed out -- clear the lock. */
778 	mb();
779 	smp_call_function_data = NULL;
780 
781 	/*
782 	 * If after both the initial and long timeout periods we still don't
783 	 * have a response, something is very wrong...
784 	 */
785 	BUG_ON(atomic_read (&data.unstarted_count) > 0);
786 
787 	/* Wait for a complete response, if needed.  */
788 	if (wait) {
789 		while (atomic_read (&data.unfinished_count) > 0)
790 			barrier();
791 	}
792 
793 	return 0;
794 }
795 EXPORT_SYMBOL(smp_call_function_on_cpu);
796 
797 int
798 smp_call_function (void (*func) (void *info), void *info, int retry, int wait)
799 {
800 	return smp_call_function_on_cpu (func, info, retry, wait,
801 					 cpu_online_map);
802 }
803 EXPORT_SYMBOL(smp_call_function);
804 
805 static void
806 ipi_imb(void *ignored)
807 {
808 	imb();
809 }
810 
811 void
812 smp_imb(void)
813 {
814 	/* Must wait other processors to flush their icache before continue. */
815 	if (on_each_cpu(ipi_imb, NULL, 1, 1))
816 		printk(KERN_CRIT "smp_imb: timed out\n");
817 }
818 EXPORT_SYMBOL(smp_imb);
819 
820 static void
821 ipi_flush_tlb_all(void *ignored)
822 {
823 	tbia();
824 }
825 
826 void
827 flush_tlb_all(void)
828 {
829 	/* Although we don't have any data to pass, we do want to
830 	   synchronize with the other processors.  */
831 	if (on_each_cpu(ipi_flush_tlb_all, NULL, 1, 1)) {
832 		printk(KERN_CRIT "flush_tlb_all: timed out\n");
833 	}
834 }
835 
836 #define asn_locked() (cpu_data[smp_processor_id()].asn_lock)
837 
838 static void
839 ipi_flush_tlb_mm(void *x)
840 {
841 	struct mm_struct *mm = (struct mm_struct *) x;
842 	if (mm == current->active_mm && !asn_locked())
843 		flush_tlb_current(mm);
844 	else
845 		flush_tlb_other(mm);
846 }
847 
848 void
849 flush_tlb_mm(struct mm_struct *mm)
850 {
851 	preempt_disable();
852 
853 	if (mm == current->active_mm) {
854 		flush_tlb_current(mm);
855 		if (atomic_read(&mm->mm_users) <= 1) {
856 			int cpu, this_cpu = smp_processor_id();
857 			for (cpu = 0; cpu < NR_CPUS; cpu++) {
858 				if (!cpu_online(cpu) || cpu == this_cpu)
859 					continue;
860 				if (mm->context[cpu])
861 					mm->context[cpu] = 0;
862 			}
863 			preempt_enable();
864 			return;
865 		}
866 	}
867 
868 	if (smp_call_function(ipi_flush_tlb_mm, mm, 1, 1)) {
869 		printk(KERN_CRIT "flush_tlb_mm: timed out\n");
870 	}
871 
872 	preempt_enable();
873 }
874 EXPORT_SYMBOL(flush_tlb_mm);
875 
876 struct flush_tlb_page_struct {
877 	struct vm_area_struct *vma;
878 	struct mm_struct *mm;
879 	unsigned long addr;
880 };
881 
882 static void
883 ipi_flush_tlb_page(void *x)
884 {
885 	struct flush_tlb_page_struct *data = (struct flush_tlb_page_struct *)x;
886 	struct mm_struct * mm = data->mm;
887 
888 	if (mm == current->active_mm && !asn_locked())
889 		flush_tlb_current_page(mm, data->vma, data->addr);
890 	else
891 		flush_tlb_other(mm);
892 }
893 
894 void
895 flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
896 {
897 	struct flush_tlb_page_struct data;
898 	struct mm_struct *mm = vma->vm_mm;
899 
900 	preempt_disable();
901 
902 	if (mm == current->active_mm) {
903 		flush_tlb_current_page(mm, vma, addr);
904 		if (atomic_read(&mm->mm_users) <= 1) {
905 			int cpu, this_cpu = smp_processor_id();
906 			for (cpu = 0; cpu < NR_CPUS; cpu++) {
907 				if (!cpu_online(cpu) || cpu == this_cpu)
908 					continue;
909 				if (mm->context[cpu])
910 					mm->context[cpu] = 0;
911 			}
912 			preempt_enable();
913 			return;
914 		}
915 	}
916 
917 	data.vma = vma;
918 	data.mm = mm;
919 	data.addr = addr;
920 
921 	if (smp_call_function(ipi_flush_tlb_page, &data, 1, 1)) {
922 		printk(KERN_CRIT "flush_tlb_page: timed out\n");
923 	}
924 
925 	preempt_enable();
926 }
927 EXPORT_SYMBOL(flush_tlb_page);
928 
929 void
930 flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
931 {
932 	/* On the Alpha we always flush the whole user tlb.  */
933 	flush_tlb_mm(vma->vm_mm);
934 }
935 EXPORT_SYMBOL(flush_tlb_range);
936 
937 static void
938 ipi_flush_icache_page(void *x)
939 {
940 	struct mm_struct *mm = (struct mm_struct *) x;
941 	if (mm == current->active_mm && !asn_locked())
942 		__load_new_mm_context(mm);
943 	else
944 		flush_tlb_other(mm);
945 }
946 
947 void
948 flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
949 			unsigned long addr, int len)
950 {
951 	struct mm_struct *mm = vma->vm_mm;
952 
953 	if ((vma->vm_flags & VM_EXEC) == 0)
954 		return;
955 
956 	preempt_disable();
957 
958 	if (mm == current->active_mm) {
959 		__load_new_mm_context(mm);
960 		if (atomic_read(&mm->mm_users) <= 1) {
961 			int cpu, this_cpu = smp_processor_id();
962 			for (cpu = 0; cpu < NR_CPUS; cpu++) {
963 				if (!cpu_online(cpu) || cpu == this_cpu)
964 					continue;
965 				if (mm->context[cpu])
966 					mm->context[cpu] = 0;
967 			}
968 			preempt_enable();
969 			return;
970 		}
971 	}
972 
973 	if (smp_call_function(ipi_flush_icache_page, mm, 1, 1)) {
974 		printk(KERN_CRIT "flush_icache_page: timed out\n");
975 	}
976 
977 	preempt_enable();
978 }
979