xref: /openbmc/linux/arch/alpha/kernel/irq_alpha.c (revision 87c2ce3b)
1 /*
2  * Alpha specific irq code.
3  */
4 
5 #include <linux/config.h>
6 #include <linux/init.h>
7 #include <linux/sched.h>
8 #include <linux/irq.h>
9 #include <linux/kernel_stat.h>
10 
11 #include <asm/machvec.h>
12 #include <asm/dma.h>
13 
14 #include "proto.h"
15 #include "irq_impl.h"
16 
17 /* Hack minimum IPL during interrupt processing for broken hardware.  */
18 #ifdef CONFIG_ALPHA_BROKEN_IRQ_MASK
19 int __min_ipl;
20 #endif
21 
22 /*
23  * Performance counter hook.  A module can override this to
24  * do something useful.
25  */
26 static void
27 dummy_perf(unsigned long vector, struct pt_regs *regs)
28 {
29 	irq_err_count++;
30 	printk(KERN_CRIT "Performance counter interrupt!\n");
31 }
32 
33 void (*perf_irq)(unsigned long, struct pt_regs *) = dummy_perf;
34 
35 /*
36  * The main interrupt entry point.
37  */
38 
39 asmlinkage void
40 do_entInt(unsigned long type, unsigned long vector,
41 	  unsigned long la_ptr, struct pt_regs *regs)
42 {
43 	switch (type) {
44 	case 0:
45 #ifdef CONFIG_SMP
46 		handle_ipi(regs);
47 		return;
48 #else
49 		irq_err_count++;
50 		printk(KERN_CRIT "Interprocessor interrupt? "
51 		       "You must be kidding!\n");
52 #endif
53 		break;
54 	case 1:
55 #ifdef CONFIG_SMP
56 	  {
57 		long cpu;
58 
59 		local_irq_disable();
60 		smp_percpu_timer_interrupt(regs);
61 		cpu = smp_processor_id();
62 		if (cpu != boot_cpuid) {
63 		        kstat_cpu(cpu).irqs[RTC_IRQ]++;
64 		} else {
65 			handle_irq(RTC_IRQ, regs);
66 		}
67 	  }
68 #else
69 		handle_irq(RTC_IRQ, regs);
70 #endif
71 		return;
72 	case 2:
73 		alpha_mv.machine_check(vector, la_ptr, regs);
74 		return;
75 	case 3:
76 		alpha_mv.device_interrupt(vector, regs);
77 		return;
78 	case 4:
79 		perf_irq(la_ptr, regs);
80 		return;
81 	default:
82 		printk(KERN_CRIT "Hardware intr %ld %lx? Huh?\n",
83 		       type, vector);
84 	}
85 	printk(KERN_CRIT "PC = %016lx PS=%04lx\n", regs->pc, regs->ps);
86 }
87 
88 void __init
89 common_init_isa_dma(void)
90 {
91 	outb(0, DMA1_RESET_REG);
92 	outb(0, DMA2_RESET_REG);
93 	outb(0, DMA1_CLR_MASK_REG);
94 	outb(0, DMA2_CLR_MASK_REG);
95 }
96 
97 void __init
98 init_IRQ(void)
99 {
100 	/* Just in case the platform init_irq() causes interrupts/mchecks
101 	   (as is the case with RAWHIDE, at least).  */
102 	wrent(entInt, 0);
103 
104 	alpha_mv.init_irq();
105 }
106 
107 /*
108  * machine error checks
109  */
110 #define MCHK_K_TPERR           0x0080
111 #define MCHK_K_TCPERR          0x0082
112 #define MCHK_K_HERR            0x0084
113 #define MCHK_K_ECC_C           0x0086
114 #define MCHK_K_ECC_NC          0x0088
115 #define MCHK_K_OS_BUGCHECK     0x008A
116 #define MCHK_K_PAL_BUGCHECK    0x0090
117 
118 #ifndef CONFIG_SMP
119 struct mcheck_info __mcheck_info;
120 #endif
121 
122 void
123 process_mcheck_info(unsigned long vector, unsigned long la_ptr,
124 		    struct pt_regs *regs, const char *machine,
125 		    int expected)
126 {
127 	struct el_common *mchk_header;
128 	const char *reason;
129 
130 	/*
131 	 * See if the machine check is due to a badaddr() and if so,
132 	 * ignore it.
133 	 */
134 
135 #ifdef CONFIG_VERBOSE_MCHECK
136 	if (alpha_verbose_mcheck > 1) {
137 		printk(KERN_CRIT "%s machine check %s\n", machine,
138 		       expected ? "expected." : "NOT expected!!!");
139 	}
140 #endif
141 
142 	if (expected) {
143 		int cpu = smp_processor_id();
144 		mcheck_expected(cpu) = 0;
145 		mcheck_taken(cpu) = 1;
146 		return;
147 	}
148 
149 	mchk_header = (struct el_common *)la_ptr;
150 
151 	printk(KERN_CRIT "%s machine check: vector=0x%lx pc=0x%lx code=0x%x\n",
152 	       machine, vector, regs->pc, mchk_header->code);
153 
154 	switch (mchk_header->code) {
155 	/* Machine check reasons.  Defined according to PALcode sources.  */
156 	case 0x80: reason = "tag parity error"; break;
157 	case 0x82: reason = "tag control parity error"; break;
158 	case 0x84: reason = "generic hard error"; break;
159 	case 0x86: reason = "correctable ECC error"; break;
160 	case 0x88: reason = "uncorrectable ECC error"; break;
161 	case 0x8A: reason = "OS-specific PAL bugcheck"; break;
162 	case 0x90: reason = "callsys in kernel mode"; break;
163 	case 0x96: reason = "i-cache read retryable error"; break;
164 	case 0x98: reason = "processor detected hard error"; break;
165 
166 	/* System specific (these are for Alcor, at least): */
167 	case 0x202: reason = "system detected hard error"; break;
168 	case 0x203: reason = "system detected uncorrectable ECC error"; break;
169 	case 0x204: reason = "SIO SERR occurred on PCI bus"; break;
170 	case 0x205: reason = "parity error detected by core logic"; break;
171 	case 0x206: reason = "SIO IOCHK occurred on ISA bus"; break;
172 	case 0x207: reason = "non-existent memory error"; break;
173 	case 0x208: reason = "MCHK_K_DCSR"; break;
174 	case 0x209: reason = "PCI SERR detected"; break;
175 	case 0x20b: reason = "PCI data parity error detected"; break;
176 	case 0x20d: reason = "PCI address parity error detected"; break;
177 	case 0x20f: reason = "PCI master abort error"; break;
178 	case 0x211: reason = "PCI target abort error"; break;
179 	case 0x213: reason = "scatter/gather PTE invalid error"; break;
180 	case 0x215: reason = "flash ROM write error"; break;
181 	case 0x217: reason = "IOA timeout detected"; break;
182 	case 0x219: reason = "IOCHK#, EISA add-in board parity or other catastrophic error"; break;
183 	case 0x21b: reason = "EISA fail-safe timer timeout"; break;
184 	case 0x21d: reason = "EISA bus time-out"; break;
185 	case 0x21f: reason = "EISA software generated NMI"; break;
186 	case 0x221: reason = "unexpected ev5 IRQ[3] interrupt"; break;
187 	default: reason = "unknown"; break;
188 	}
189 
190 	printk(KERN_CRIT "machine check type: %s%s\n",
191 	       reason, mchk_header->retry ? " (retryable)" : "");
192 
193 	dik_show_regs(regs, NULL);
194 
195 #ifdef CONFIG_VERBOSE_MCHECK
196 	if (alpha_verbose_mcheck > 1) {
197 		/* Dump the logout area to give all info.  */
198 		unsigned long *ptr = (unsigned long *)la_ptr;
199 		long i;
200 		for (i = 0; i < mchk_header->size / sizeof(long); i += 2) {
201 			printk(KERN_CRIT "   +%8lx %016lx %016lx\n",
202 			       i*sizeof(long), ptr[i], ptr[i+1]);
203 		}
204 	}
205 #endif /* CONFIG_VERBOSE_MCHECK */
206 }
207 
208 /*
209  * The special RTC interrupt type.  The interrupt itself was
210  * processed by PALcode, and comes in via entInt vector 1.
211  */
212 
213 static void rtc_enable_disable(unsigned int irq) { }
214 static unsigned int rtc_startup(unsigned int irq) { return 0; }
215 
216 struct irqaction timer_irqaction = {
217 	.handler	= timer_interrupt,
218 	.flags		= SA_INTERRUPT,
219 	.name		= "timer",
220 };
221 
222 static struct hw_interrupt_type rtc_irq_type = {
223 	.typename	= "RTC",
224 	.startup	= rtc_startup,
225 	.shutdown	= rtc_enable_disable,
226 	.enable		= rtc_enable_disable,
227 	.disable	= rtc_enable_disable,
228 	.ack		= rtc_enable_disable,
229 	.end		= rtc_enable_disable,
230 };
231 
232 void __init
233 init_rtc_irq(void)
234 {
235 	irq_desc[RTC_IRQ].status = IRQ_DISABLED;
236 	irq_desc[RTC_IRQ].handler = &rtc_irq_type;
237 	setup_irq(RTC_IRQ, &timer_irqaction);
238 }
239 
240 /* Dummy irqactions.  */
241 struct irqaction isa_cascade_irqaction = {
242 	.handler	= no_action,
243 	.name		= "isa-cascade"
244 };
245 
246 struct irqaction timer_cascade_irqaction = {
247 	.handler	= no_action,
248 	.name		= "timer-cascade"
249 };
250 
251 struct irqaction halt_switch_irqaction = {
252 	.handler	= no_action,
253 	.name		= "halt-switch"
254 };
255