1b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0
21da177e4SLinus Torvalds /*
31da177e4SLinus Torvalds * linux/arch/alpha/kernel/core_marvel.c
41da177e4SLinus Torvalds *
51da177e4SLinus Torvalds * Code common to all Marvel based systems.
61da177e4SLinus Torvalds */
71da177e4SLinus Torvalds
81da177e4SLinus Torvalds #define __EXTERN_INLINE inline
91da177e4SLinus Torvalds #include <asm/io.h>
101da177e4SLinus Torvalds #include <asm/core_marvel.h>
111da177e4SLinus Torvalds #undef __EXTERN_INLINE
121da177e4SLinus Torvalds
131da177e4SLinus Torvalds #include <linux/types.h>
141da177e4SLinus Torvalds #include <linux/pci.h>
151da177e4SLinus Torvalds #include <linux/sched.h>
161da177e4SLinus Torvalds #include <linux/init.h>
171da177e4SLinus Torvalds #include <linux/vmalloc.h>
181da177e4SLinus Torvalds #include <linux/mc146818rtc.h>
191da177e4SLinus Torvalds #include <linux/rtc.h>
201da177e4SLinus Torvalds #include <linux/module.h>
2157c8a661SMike Rapoport #include <linux/memblock.h>
221da177e4SLinus Torvalds
231da177e4SLinus Torvalds #include <asm/ptrace.h>
241da177e4SLinus Torvalds #include <asm/smp.h>
251da177e4SLinus Torvalds #include <asm/gct.h>
261da177e4SLinus Torvalds #include <asm/tlbflush.h>
27025a2215SJay Estabrook #include <asm/vga.h>
281da177e4SLinus Torvalds
291da177e4SLinus Torvalds #include "proto.h"
301da177e4SLinus Torvalds #include "pci_impl.h"
311da177e4SLinus Torvalds
321da177e4SLinus Torvalds
331da177e4SLinus Torvalds /*
341da177e4SLinus Torvalds * Debug helpers
351da177e4SLinus Torvalds */
361da177e4SLinus Torvalds #define DEBUG_CONFIG 0
371da177e4SLinus Torvalds
381da177e4SLinus Torvalds #if DEBUG_CONFIG
391da177e4SLinus Torvalds # define DBG_CFG(args) printk args
401da177e4SLinus Torvalds #else
411da177e4SLinus Torvalds # define DBG_CFG(args)
421da177e4SLinus Torvalds #endif
431da177e4SLinus Torvalds
441da177e4SLinus Torvalds
451da177e4SLinus Torvalds /*
461da177e4SLinus Torvalds * Private data
471da177e4SLinus Torvalds */
481da177e4SLinus Torvalds static struct io7 *io7_head = NULL;
491da177e4SLinus Torvalds
501da177e4SLinus Torvalds
511da177e4SLinus Torvalds /*
521da177e4SLinus Torvalds * Helper functions
531da177e4SLinus Torvalds */
541da177e4SLinus Torvalds static unsigned long __attribute__ ((unused))
read_ev7_csr(int pe,unsigned long offset)551da177e4SLinus Torvalds read_ev7_csr(int pe, unsigned long offset)
561da177e4SLinus Torvalds {
571da177e4SLinus Torvalds ev7_csr *ev7csr = EV7_CSR_KERN(pe, offset);
581da177e4SLinus Torvalds unsigned long q;
591da177e4SLinus Torvalds
601da177e4SLinus Torvalds mb();
611da177e4SLinus Torvalds q = ev7csr->csr;
621da177e4SLinus Torvalds mb();
631da177e4SLinus Torvalds
641da177e4SLinus Torvalds return q;
651da177e4SLinus Torvalds }
661da177e4SLinus Torvalds
671da177e4SLinus Torvalds static void __attribute__ ((unused))
write_ev7_csr(int pe,unsigned long offset,unsigned long q)681da177e4SLinus Torvalds write_ev7_csr(int pe, unsigned long offset, unsigned long q)
691da177e4SLinus Torvalds {
701da177e4SLinus Torvalds ev7_csr *ev7csr = EV7_CSR_KERN(pe, offset);
711da177e4SLinus Torvalds
721da177e4SLinus Torvalds mb();
731da177e4SLinus Torvalds ev7csr->csr = q;
741da177e4SLinus Torvalds mb();
751da177e4SLinus Torvalds }
761da177e4SLinus Torvalds
771da177e4SLinus Torvalds static char * __init
mk_resource_name(int pe,int port,char * str)781da177e4SLinus Torvalds mk_resource_name(int pe, int port, char *str)
791da177e4SLinus Torvalds {
801da177e4SLinus Torvalds char tmp[80];
811da177e4SLinus Torvalds char *name;
821da177e4SLinus Torvalds
831da177e4SLinus Torvalds sprintf(tmp, "PCI %s PE %d PORT %d", str, pe, port);
847e1c4e27SMike Rapoport name = memblock_alloc(strlen(tmp) + 1, SMP_CACHE_BYTES);
858a7f97b9SMike Rapoport if (!name)
868a7f97b9SMike Rapoport panic("%s: Failed to allocate %zu bytes\n", __func__,
878a7f97b9SMike Rapoport strlen(tmp) + 1);
881da177e4SLinus Torvalds strcpy(name, tmp);
891da177e4SLinus Torvalds
901da177e4SLinus Torvalds return name;
911da177e4SLinus Torvalds }
921da177e4SLinus Torvalds
931da177e4SLinus Torvalds inline struct io7 *
marvel_next_io7(struct io7 * prev)941da177e4SLinus Torvalds marvel_next_io7(struct io7 *prev)
951da177e4SLinus Torvalds {
961da177e4SLinus Torvalds return (prev ? prev->next : io7_head);
971da177e4SLinus Torvalds }
981da177e4SLinus Torvalds
991da177e4SLinus Torvalds struct io7 *
marvel_find_io7(int pe)1001da177e4SLinus Torvalds marvel_find_io7(int pe)
1011da177e4SLinus Torvalds {
1021da177e4SLinus Torvalds struct io7 *io7;
1031da177e4SLinus Torvalds
1041da177e4SLinus Torvalds for (io7 = io7_head; io7 && io7->pe != pe; io7 = io7->next)
1051da177e4SLinus Torvalds continue;
1061da177e4SLinus Torvalds
1071da177e4SLinus Torvalds return io7;
1081da177e4SLinus Torvalds }
1091da177e4SLinus Torvalds
1101da177e4SLinus Torvalds static struct io7 * __init
alloc_io7(unsigned int pe)1111da177e4SLinus Torvalds alloc_io7(unsigned int pe)
1121da177e4SLinus Torvalds {
1131da177e4SLinus Torvalds struct io7 *io7;
1141da177e4SLinus Torvalds struct io7 *insp;
1151da177e4SLinus Torvalds int h;
1161da177e4SLinus Torvalds
1171da177e4SLinus Torvalds if (marvel_find_io7(pe)) {
1181da177e4SLinus Torvalds printk(KERN_WARNING "IO7 at PE %d already allocated!\n", pe);
1191da177e4SLinus Torvalds return NULL;
1201da177e4SLinus Torvalds }
1211da177e4SLinus Torvalds
1227e1c4e27SMike Rapoport io7 = memblock_alloc(sizeof(*io7), SMP_CACHE_BYTES);
1238a7f97b9SMike Rapoport if (!io7)
1248a7f97b9SMike Rapoport panic("%s: Failed to allocate %zu bytes\n", __func__,
1258a7f97b9SMike Rapoport sizeof(*io7));
1261da177e4SLinus Torvalds io7->pe = pe;
127b5a3a128SJulia Cartwright raw_spin_lock_init(&io7->irq_lock);
1281da177e4SLinus Torvalds
1291da177e4SLinus Torvalds for (h = 0; h < 4; h++) {
1301da177e4SLinus Torvalds io7->ports[h].io7 = io7;
1311da177e4SLinus Torvalds io7->ports[h].port = h;
1321da177e4SLinus Torvalds io7->ports[h].enabled = 0; /* default to disabled */
1331da177e4SLinus Torvalds }
1341da177e4SLinus Torvalds
1351da177e4SLinus Torvalds /*
1361da177e4SLinus Torvalds * Insert in pe sorted order.
1371da177e4SLinus Torvalds */
1381da177e4SLinus Torvalds if (NULL == io7_head) /* empty list */
1391da177e4SLinus Torvalds io7_head = io7;
1401da177e4SLinus Torvalds else if (io7_head->pe > io7->pe) { /* insert at head */
1411da177e4SLinus Torvalds io7->next = io7_head;
1421da177e4SLinus Torvalds io7_head = io7;
1431da177e4SLinus Torvalds } else { /* insert at position */
1441da177e4SLinus Torvalds for (insp = io7_head; insp; insp = insp->next) {
1451da177e4SLinus Torvalds if (insp->pe == io7->pe) {
1461da177e4SLinus Torvalds printk(KERN_ERR "Too many IO7s at PE %d\n",
1471da177e4SLinus Torvalds io7->pe);
1481da177e4SLinus Torvalds return NULL;
1491da177e4SLinus Torvalds }
1501da177e4SLinus Torvalds
1511da177e4SLinus Torvalds if (NULL == insp->next ||
1521da177e4SLinus Torvalds insp->next->pe > io7->pe) { /* insert here */
1531da177e4SLinus Torvalds io7->next = insp->next;
1541da177e4SLinus Torvalds insp->next = io7;
1551da177e4SLinus Torvalds break;
1561da177e4SLinus Torvalds }
1571da177e4SLinus Torvalds }
1581da177e4SLinus Torvalds
1591da177e4SLinus Torvalds if (NULL == insp) { /* couldn't insert ?!? */
1601da177e4SLinus Torvalds printk(KERN_WARNING "Failed to insert IO7 at PE %d "
1611da177e4SLinus Torvalds " - adding at head of list\n", io7->pe);
1621da177e4SLinus Torvalds io7->next = io7_head;
1631da177e4SLinus Torvalds io7_head = io7;
1641da177e4SLinus Torvalds }
1651da177e4SLinus Torvalds }
1661da177e4SLinus Torvalds
1671da177e4SLinus Torvalds return io7;
1681da177e4SLinus Torvalds }
1691da177e4SLinus Torvalds
1701da177e4SLinus Torvalds void
io7_clear_errors(struct io7 * io7)1711da177e4SLinus Torvalds io7_clear_errors(struct io7 *io7)
1721da177e4SLinus Torvalds {
1731da177e4SLinus Torvalds io7_port7_csrs *p7csrs;
1741da177e4SLinus Torvalds io7_ioport_csrs *csrs;
1751da177e4SLinus Torvalds int port;
1761da177e4SLinus Torvalds
1771da177e4SLinus Torvalds
1781da177e4SLinus Torvalds /*
1791da177e4SLinus Torvalds * First the IO ports.
1801da177e4SLinus Torvalds */
1811da177e4SLinus Torvalds for (port = 0; port < 4; port++) {
1821da177e4SLinus Torvalds csrs = IO7_CSRS_KERN(io7->pe, port);
1831da177e4SLinus Torvalds
1841da177e4SLinus Torvalds csrs->POx_ERR_SUM.csr = -1UL;
1851da177e4SLinus Torvalds csrs->POx_TLB_ERR.csr = -1UL;
1861da177e4SLinus Torvalds csrs->POx_SPL_COMPLT.csr = -1UL;
1871da177e4SLinus Torvalds csrs->POx_TRANS_SUM.csr = -1UL;
1881da177e4SLinus Torvalds }
1891da177e4SLinus Torvalds
1901da177e4SLinus Torvalds /*
1911da177e4SLinus Torvalds * Then the common ones.
1921da177e4SLinus Torvalds */
1931da177e4SLinus Torvalds p7csrs = IO7_PORT7_CSRS_KERN(io7->pe);
1941da177e4SLinus Torvalds
1951da177e4SLinus Torvalds p7csrs->PO7_ERROR_SUM.csr = -1UL;
1961da177e4SLinus Torvalds p7csrs->PO7_UNCRR_SYM.csr = -1UL;
1971da177e4SLinus Torvalds p7csrs->PO7_CRRCT_SYM.csr = -1UL;
1981da177e4SLinus Torvalds }
1991da177e4SLinus Torvalds
2001da177e4SLinus Torvalds
2011da177e4SLinus Torvalds /*
2021da177e4SLinus Torvalds * IO7 PCI, PCI/X, AGP configuration.
2031da177e4SLinus Torvalds */
2041da177e4SLinus Torvalds static void __init
io7_init_hose(struct io7 * io7,int port)2051da177e4SLinus Torvalds io7_init_hose(struct io7 *io7, int port)
2061da177e4SLinus Torvalds {
2071da177e4SLinus Torvalds static int hose_index = 0;
2081da177e4SLinus Torvalds
2091da177e4SLinus Torvalds struct pci_controller *hose = alloc_pci_controller();
2101da177e4SLinus Torvalds struct io7_port *io7_port = &io7->ports[port];
2111da177e4SLinus Torvalds io7_ioport_csrs *csrs = IO7_CSRS_KERN(io7->pe, port);
2121da177e4SLinus Torvalds int i;
2131da177e4SLinus Torvalds
2141da177e4SLinus Torvalds hose->index = hose_index++; /* arbitrary */
2151da177e4SLinus Torvalds
2161da177e4SLinus Torvalds /*
2171da177e4SLinus Torvalds * We don't have an isa or legacy hose, but glibc expects to be
2181da177e4SLinus Torvalds * able to use the bus == 0 / dev == 0 form of the iobase syscall
2191da177e4SLinus Torvalds * to determine information about the i/o system. Since XFree86
2201da177e4SLinus Torvalds * relies on glibc's determination to tell whether or not to use
2211da177e4SLinus Torvalds * sparse access, we need to point the pci_isa_hose at a real hose
2221da177e4SLinus Torvalds * so at least that determination is correct.
2231da177e4SLinus Torvalds */
2241da177e4SLinus Torvalds if (hose->index == 0)
2251da177e4SLinus Torvalds pci_isa_hose = hose;
2261da177e4SLinus Torvalds
2271da177e4SLinus Torvalds io7_port->csrs = csrs;
2281da177e4SLinus Torvalds io7_port->hose = hose;
2291da177e4SLinus Torvalds hose->sysdata = io7_port;
2301da177e4SLinus Torvalds
2311da177e4SLinus Torvalds hose->io_space = alloc_resource();
2321da177e4SLinus Torvalds hose->mem_space = alloc_resource();
2331da177e4SLinus Torvalds
2341da177e4SLinus Torvalds /*
2351da177e4SLinus Torvalds * Base addresses for userland consumption. Since these are going
2361da177e4SLinus Torvalds * to be mapped, they are pure physical addresses.
2371da177e4SLinus Torvalds */
2381da177e4SLinus Torvalds hose->sparse_mem_base = hose->sparse_io_base = 0;
2391da177e4SLinus Torvalds hose->dense_mem_base = IO7_MEM_PHYS(io7->pe, port);
2401da177e4SLinus Torvalds hose->dense_io_base = IO7_IO_PHYS(io7->pe, port);
2411da177e4SLinus Torvalds
2421da177e4SLinus Torvalds /*
2431da177e4SLinus Torvalds * Base addresses and resource ranges for kernel consumption.
2441da177e4SLinus Torvalds */
2451da177e4SLinus Torvalds hose->config_space_base = (unsigned long)IO7_CONF_KERN(io7->pe, port);
2461da177e4SLinus Torvalds
2471da177e4SLinus Torvalds hose->io_space->start = (unsigned long)IO7_IO_KERN(io7->pe, port);
2481da177e4SLinus Torvalds hose->io_space->end = hose->io_space->start + IO7_IO_SPACE - 1;
2491da177e4SLinus Torvalds hose->io_space->name = mk_resource_name(io7->pe, port, "IO");
2501da177e4SLinus Torvalds hose->io_space->flags = IORESOURCE_IO;
2511da177e4SLinus Torvalds
2521da177e4SLinus Torvalds hose->mem_space->start = (unsigned long)IO7_MEM_KERN(io7->pe, port);
2531da177e4SLinus Torvalds hose->mem_space->end = hose->mem_space->start + IO7_MEM_SPACE - 1;
2541da177e4SLinus Torvalds hose->mem_space->name = mk_resource_name(io7->pe, port, "MEM");
2551da177e4SLinus Torvalds hose->mem_space->flags = IORESOURCE_MEM;
2561da177e4SLinus Torvalds
2571da177e4SLinus Torvalds if (request_resource(&ioport_resource, hose->io_space) < 0)
2581da177e4SLinus Torvalds printk(KERN_ERR "Failed to request IO on hose %d\n",
2591da177e4SLinus Torvalds hose->index);
2601da177e4SLinus Torvalds if (request_resource(&iomem_resource, hose->mem_space) < 0)
2611da177e4SLinus Torvalds printk(KERN_ERR "Failed to request MEM on hose %d\n",
2621da177e4SLinus Torvalds hose->index);
2631da177e4SLinus Torvalds
2641da177e4SLinus Torvalds /*
2651da177e4SLinus Torvalds * Save the existing DMA window settings for later restoration.
2661da177e4SLinus Torvalds */
2671da177e4SLinus Torvalds for (i = 0; i < 4; i++) {
2681da177e4SLinus Torvalds io7_port->saved_wbase[i] = csrs->POx_WBASE[i].csr;
2691da177e4SLinus Torvalds io7_port->saved_wmask[i] = csrs->POx_WMASK[i].csr;
2701da177e4SLinus Torvalds io7_port->saved_tbase[i] = csrs->POx_TBASE[i].csr;
2711da177e4SLinus Torvalds }
2721da177e4SLinus Torvalds
2731da177e4SLinus Torvalds /*
2741da177e4SLinus Torvalds * Set up the PCI to main memory translation windows.
2751da177e4SLinus Torvalds *
2761da177e4SLinus Torvalds * Window 0 is scatter-gather 8MB at 8MB
2771da177e4SLinus Torvalds * Window 1 is direct access 1GB at 2GB
2781da177e4SLinus Torvalds * Window 2 is scatter-gather (up-to) 1GB at 3GB
2791da177e4SLinus Torvalds * Window 3 is disabled
2801da177e4SLinus Torvalds */
2811da177e4SLinus Torvalds
2821da177e4SLinus Torvalds /*
2831da177e4SLinus Torvalds * TBIA before modifying windows.
2841da177e4SLinus Torvalds */
2851da177e4SLinus Torvalds marvel_pci_tbi(hose, 0, -1);
2861da177e4SLinus Torvalds
2871da177e4SLinus Torvalds /*
2881da177e4SLinus Torvalds * Set up window 0 for scatter-gather 8MB at 8MB.
2891da177e4SLinus Torvalds */
290fdb7d9b7SMike Rapoport hose->sg_isa = iommu_arena_new_node(0, hose, 0x00800000, 0x00800000, 0);
2911da177e4SLinus Torvalds hose->sg_isa->align_entry = 8; /* cache line boundary */
2921da177e4SLinus Torvalds csrs->POx_WBASE[0].csr =
2931da177e4SLinus Torvalds hose->sg_isa->dma_base | wbase_m_ena | wbase_m_sg;
2941da177e4SLinus Torvalds csrs->POx_WMASK[0].csr = (hose->sg_isa->size - 1) & wbase_m_addr;
2951da177e4SLinus Torvalds csrs->POx_TBASE[0].csr = virt_to_phys(hose->sg_isa->ptes);
2961da177e4SLinus Torvalds
2971da177e4SLinus Torvalds /*
2981da177e4SLinus Torvalds * Set up window 1 for direct-mapped 1GB at 2GB.
2991da177e4SLinus Torvalds */
3001da177e4SLinus Torvalds csrs->POx_WBASE[1].csr = __direct_map_base | wbase_m_ena;
3011da177e4SLinus Torvalds csrs->POx_WMASK[1].csr = (__direct_map_size - 1) & wbase_m_addr;
3021da177e4SLinus Torvalds csrs->POx_TBASE[1].csr = 0;
3031da177e4SLinus Torvalds
3041da177e4SLinus Torvalds /*
3051da177e4SLinus Torvalds * Set up window 2 for scatter-gather (up-to) 1GB at 3GB.
3061da177e4SLinus Torvalds */
307fdb7d9b7SMike Rapoport hose->sg_pci = iommu_arena_new_node(0, hose, 0xc0000000, 0x40000000, 0);
3081da177e4SLinus Torvalds hose->sg_pci->align_entry = 8; /* cache line boundary */
3091da177e4SLinus Torvalds csrs->POx_WBASE[2].csr =
3101da177e4SLinus Torvalds hose->sg_pci->dma_base | wbase_m_ena | wbase_m_sg;
3111da177e4SLinus Torvalds csrs->POx_WMASK[2].csr = (hose->sg_pci->size - 1) & wbase_m_addr;
3121da177e4SLinus Torvalds csrs->POx_TBASE[2].csr = virt_to_phys(hose->sg_pci->ptes);
3131da177e4SLinus Torvalds
3141da177e4SLinus Torvalds /*
3151da177e4SLinus Torvalds * Disable window 3.
3161da177e4SLinus Torvalds */
3171da177e4SLinus Torvalds csrs->POx_WBASE[3].csr = 0;
3181da177e4SLinus Torvalds
3191da177e4SLinus Torvalds /*
3201da177e4SLinus Torvalds * Make sure that the AGP Monster Window is disabled.
3211da177e4SLinus Torvalds */
3221da177e4SLinus Torvalds csrs->POx_CTRL.csr &= ~(1UL << 61);
3231da177e4SLinus Torvalds
3241da177e4SLinus Torvalds #if 1
3251da177e4SLinus Torvalds printk("FIXME: disabling master aborts\n");
3261da177e4SLinus Torvalds csrs->POx_MSK_HEI.csr &= ~(3UL << 14);
3271da177e4SLinus Torvalds #endif
3281da177e4SLinus Torvalds /*
3291da177e4SLinus Torvalds * TBIA after modifying windows.
3301da177e4SLinus Torvalds */
3311da177e4SLinus Torvalds marvel_pci_tbi(hose, 0, -1);
3321da177e4SLinus Torvalds }
3331da177e4SLinus Torvalds
3341da177e4SLinus Torvalds static void __init
marvel_init_io7(struct io7 * io7)3351da177e4SLinus Torvalds marvel_init_io7(struct io7 *io7)
3361da177e4SLinus Torvalds {
3371da177e4SLinus Torvalds int i;
3381da177e4SLinus Torvalds
3391da177e4SLinus Torvalds printk("Initializing IO7 at PID %d\n", io7->pe);
3401da177e4SLinus Torvalds
3411da177e4SLinus Torvalds /*
3421da177e4SLinus Torvalds * Get the Port 7 CSR pointer.
3431da177e4SLinus Torvalds */
3441da177e4SLinus Torvalds io7->csrs = IO7_PORT7_CSRS_KERN(io7->pe);
3451da177e4SLinus Torvalds
3461da177e4SLinus Torvalds /*
3471da177e4SLinus Torvalds * Init this IO7's hoses.
3481da177e4SLinus Torvalds */
3491da177e4SLinus Torvalds for (i = 0; i < IO7_NUM_PORTS; i++) {
3501da177e4SLinus Torvalds io7_ioport_csrs *csrs = IO7_CSRS_KERN(io7->pe, i);
3511da177e4SLinus Torvalds if (csrs->POx_CACHE_CTL.csr == 8) {
3521da177e4SLinus Torvalds io7->ports[i].enabled = 1;
3531da177e4SLinus Torvalds io7_init_hose(io7, i);
3541da177e4SLinus Torvalds }
3551da177e4SLinus Torvalds }
3561da177e4SLinus Torvalds }
3571da177e4SLinus Torvalds
35869f06782SMatt Turner void __init
marvel_io7_present(gct6_node * node)3591da177e4SLinus Torvalds marvel_io7_present(gct6_node *node)
3601da177e4SLinus Torvalds {
3611da177e4SLinus Torvalds int pe;
3621da177e4SLinus Torvalds
3631da177e4SLinus Torvalds if (node->type != GCT_TYPE_HOSE ||
3641da177e4SLinus Torvalds node->subtype != GCT_SUBTYPE_IO_PORT_MODULE)
3651da177e4SLinus Torvalds return;
3661da177e4SLinus Torvalds
3671da177e4SLinus Torvalds pe = (node->id >> 8) & 0xff;
3681da177e4SLinus Torvalds printk("Found an IO7 at PID %d\n", pe);
3691da177e4SLinus Torvalds
3701da177e4SLinus Torvalds alloc_io7(pe);
3711da177e4SLinus Torvalds }
3721da177e4SLinus Torvalds
3731da177e4SLinus Torvalds static void __init
marvel_find_console_vga_hose(void)374025a2215SJay Estabrook marvel_find_console_vga_hose(void)
3751da177e4SLinus Torvalds {
376e42faf55SMatt Turner #ifdef CONFIG_VGA_HOSE
3771da177e4SLinus Torvalds u64 *pu64 = (u64 *)((u64)hwrpb + hwrpb->ctbt_offset);
3781da177e4SLinus Torvalds
3791da177e4SLinus Torvalds if (pu64[7] == 3) { /* TERM_TYPE == graphics */
3801da177e4SLinus Torvalds struct pci_controller *hose = NULL;
3811da177e4SLinus Torvalds int h = (pu64[30] >> 24) & 0xff; /* TERM_OUT_LOC, hose # */
3821da177e4SLinus Torvalds struct io7 *io7;
3831da177e4SLinus Torvalds int pid, port;
3841da177e4SLinus Torvalds
3851da177e4SLinus Torvalds /* FIXME - encoding is going to have to change for Marvel
3861da177e4SLinus Torvalds * since hose will be able to overflow a byte...
3871da177e4SLinus Torvalds * need to fix this decode when the console
3881da177e4SLinus Torvalds * changes its encoding
3891da177e4SLinus Torvalds */
3901da177e4SLinus Torvalds printk("console graphics is on hose %d (console)\n", h);
3911da177e4SLinus Torvalds
3921da177e4SLinus Torvalds /*
3931da177e4SLinus Torvalds * The console's hose numbering is:
3941da177e4SLinus Torvalds *
3951da177e4SLinus Torvalds * hose<n:2>: PID
3961da177e4SLinus Torvalds * hose<1:0>: PORT
3971da177e4SLinus Torvalds *
3981da177e4SLinus Torvalds * We need to find the hose at that pid and port
3991da177e4SLinus Torvalds */
4001da177e4SLinus Torvalds pid = h >> 2;
4011da177e4SLinus Torvalds port = h & 3;
4021da177e4SLinus Torvalds if ((io7 = marvel_find_io7(pid)))
4031da177e4SLinus Torvalds hose = io7->ports[port].hose;
4041da177e4SLinus Torvalds
4051da177e4SLinus Torvalds if (hose) {
4061da177e4SLinus Torvalds printk("Console graphics on hose %d\n", hose->index);
4071da177e4SLinus Torvalds pci_vga_hose = hose;
4081da177e4SLinus Torvalds }
4091da177e4SLinus Torvalds }
410e42faf55SMatt Turner #endif
4111da177e4SLinus Torvalds }
4121da177e4SLinus Torvalds
41369f06782SMatt Turner gct6_search_struct gct_wanted_node_list[] __initdata = {
4141da177e4SLinus Torvalds { GCT_TYPE_HOSE, GCT_SUBTYPE_IO_PORT_MODULE, marvel_io7_present },
4151da177e4SLinus Torvalds { 0, 0, NULL }
4161da177e4SLinus Torvalds };
4171da177e4SLinus Torvalds
4181da177e4SLinus Torvalds /*
4191da177e4SLinus Torvalds * In case the GCT is not complete, let the user specify PIDs with IO7s
4201da177e4SLinus Torvalds * at boot time. Syntax is 'io7=a,b,c,...,n' where a-n are the PIDs (decimal)
4211da177e4SLinus Torvalds * where IO7s are connected
4221da177e4SLinus Torvalds */
4231da177e4SLinus Torvalds static int __init
marvel_specify_io7(char * str)4241da177e4SLinus Torvalds marvel_specify_io7(char *str)
4251da177e4SLinus Torvalds {
4261da177e4SLinus Torvalds unsigned long pid;
4271da177e4SLinus Torvalds struct io7 *io7;
4281da177e4SLinus Torvalds char *pchar;
4291da177e4SLinus Torvalds
4301da177e4SLinus Torvalds do {
4311da177e4SLinus Torvalds pid = simple_strtoul(str, &pchar, 0);
4321da177e4SLinus Torvalds if (pchar != str) {
4331da177e4SLinus Torvalds printk("User-specified IO7 at PID %lu\n", pid);
4341da177e4SLinus Torvalds io7 = alloc_io7(pid);
4351da177e4SLinus Torvalds if (io7) marvel_init_io7(io7);
4361da177e4SLinus Torvalds }
4371da177e4SLinus Torvalds
4381da177e4SLinus Torvalds if (pchar == str) pchar++;
4391da177e4SLinus Torvalds str = pchar;
4401da177e4SLinus Torvalds } while(*str);
4411da177e4SLinus Torvalds
4429b41046cSOGAWA Hirofumi return 1;
4431da177e4SLinus Torvalds }
4441da177e4SLinus Torvalds __setup("io7=", marvel_specify_io7);
4451da177e4SLinus Torvalds
4461da177e4SLinus Torvalds void __init
marvel_init_arch(void)4471da177e4SLinus Torvalds marvel_init_arch(void)
4481da177e4SLinus Torvalds {
4491da177e4SLinus Torvalds struct io7 *io7;
4501da177e4SLinus Torvalds
4511da177e4SLinus Torvalds /* With multiple PCI busses, we play with I/O as physical addrs. */
4521da177e4SLinus Torvalds ioport_resource.end = ~0UL;
4531da177e4SLinus Torvalds
4541da177e4SLinus Torvalds /* PCI DMA Direct Mapping is 1GB at 2GB. */
4551da177e4SLinus Torvalds __direct_map_base = 0x80000000;
4561da177e4SLinus Torvalds __direct_map_size = 0x40000000;
4571da177e4SLinus Torvalds
4581da177e4SLinus Torvalds /* Parse the config tree. */
4591da177e4SLinus Torvalds gct6_find_nodes(GCT_NODE_PTR(0), gct_wanted_node_list);
4601da177e4SLinus Torvalds
4611da177e4SLinus Torvalds /* Init the io7s. */
4621da177e4SLinus Torvalds for (io7 = NULL; NULL != (io7 = marvel_next_io7(io7)); )
4631da177e4SLinus Torvalds marvel_init_io7(io7);
4641da177e4SLinus Torvalds
4651da177e4SLinus Torvalds /* Check for graphic console location (if any). */
466025a2215SJay Estabrook marvel_find_console_vga_hose();
4671da177e4SLinus Torvalds }
4681da177e4SLinus Torvalds
4691da177e4SLinus Torvalds void
marvel_kill_arch(int mode)4701da177e4SLinus Torvalds marvel_kill_arch(int mode)
4711da177e4SLinus Torvalds {
4721da177e4SLinus Torvalds }
4731da177e4SLinus Torvalds
4741da177e4SLinus Torvalds
4751da177e4SLinus Torvalds /*
4761da177e4SLinus Torvalds * PCI Configuration Space access functions
4771da177e4SLinus Torvalds *
4781da177e4SLinus Torvalds * Configuration space addresses have the following format:
4791da177e4SLinus Torvalds *
4801da177e4SLinus Torvalds * |2 2 2 2|1 1 1 1|1 1 1 1|1 1
4811da177e4SLinus Torvalds * |3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
4821da177e4SLinus Torvalds * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
4831da177e4SLinus Torvalds * |B|B|B|B|B|B|B|B|D|D|D|D|D|F|F|F|R|R|R|R|R|R|R|R|
4841da177e4SLinus Torvalds * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
4851da177e4SLinus Torvalds *
4861da177e4SLinus Torvalds * n:24 reserved for hose base
4871da177e4SLinus Torvalds * 23:16 bus number (8 bits = 128 possible buses)
4881da177e4SLinus Torvalds * 15:11 Device number (5 bits)
4891da177e4SLinus Torvalds * 10:8 function number
4901da177e4SLinus Torvalds * 7:2 register number
4911da177e4SLinus Torvalds *
4921da177e4SLinus Torvalds * Notes:
4931da177e4SLinus Torvalds * IO7 determines whether to use a type 0 or type 1 config cycle
4941da177e4SLinus Torvalds * based on the bus number. Therefore the bus number must be set
4951da177e4SLinus Torvalds * to 0 for the root bus on any hose.
4961da177e4SLinus Torvalds *
4971da177e4SLinus Torvalds * The function number selects which function of a multi-function device
4981da177e4SLinus Torvalds * (e.g., SCSI and Ethernet).
4991da177e4SLinus Torvalds *
5001da177e4SLinus Torvalds */
5011da177e4SLinus Torvalds
5021da177e4SLinus Torvalds static inline unsigned long
build_conf_addr(struct pci_controller * hose,u8 bus,unsigned int devfn,int where)5031da177e4SLinus Torvalds build_conf_addr(struct pci_controller *hose, u8 bus,
5041da177e4SLinus Torvalds unsigned int devfn, int where)
5051da177e4SLinus Torvalds {
5061da177e4SLinus Torvalds return (hose->config_space_base | (bus << 16) | (devfn << 8) | where);
5071da177e4SLinus Torvalds }
5081da177e4SLinus Torvalds
5091da177e4SLinus Torvalds static unsigned long
mk_conf_addr(struct pci_bus * pbus,unsigned int devfn,int where)5101da177e4SLinus Torvalds mk_conf_addr(struct pci_bus *pbus, unsigned int devfn, int where)
5111da177e4SLinus Torvalds {
5121da177e4SLinus Torvalds struct pci_controller *hose = pbus->sysdata;
5131da177e4SLinus Torvalds struct io7_port *io7_port;
5141da177e4SLinus Torvalds unsigned long addr = 0;
5151da177e4SLinus Torvalds u8 bus = pbus->number;
5161da177e4SLinus Torvalds
5171da177e4SLinus Torvalds if (!hose)
5181da177e4SLinus Torvalds return addr;
5191da177e4SLinus Torvalds
5201da177e4SLinus Torvalds /* Check for enabled. */
5211da177e4SLinus Torvalds io7_port = hose->sysdata;
5221da177e4SLinus Torvalds if (!io7_port->enabled)
5231da177e4SLinus Torvalds return addr;
5241da177e4SLinus Torvalds
5251da177e4SLinus Torvalds if (!pbus->parent) { /* No parent means peer PCI bus. */
5261da177e4SLinus Torvalds /* Don't support idsel > 20 on primary bus. */
5271da177e4SLinus Torvalds if (devfn >= PCI_DEVFN(21, 0))
5281da177e4SLinus Torvalds return addr;
5291da177e4SLinus Torvalds bus = 0;
5301da177e4SLinus Torvalds }
5311da177e4SLinus Torvalds
5321da177e4SLinus Torvalds addr = build_conf_addr(hose, bus, devfn, where);
5331da177e4SLinus Torvalds
5341da177e4SLinus Torvalds DBG_CFG(("mk_conf_addr: returning pci_addr 0x%lx\n", addr));
5351da177e4SLinus Torvalds return addr;
5361da177e4SLinus Torvalds }
5371da177e4SLinus Torvalds
5381da177e4SLinus Torvalds static int
marvel_read_config(struct pci_bus * bus,unsigned int devfn,int where,int size,u32 * value)5391da177e4SLinus Torvalds marvel_read_config(struct pci_bus *bus, unsigned int devfn, int where,
5401da177e4SLinus Torvalds int size, u32 *value)
5411da177e4SLinus Torvalds {
5421da177e4SLinus Torvalds unsigned long addr;
5431da177e4SLinus Torvalds
5441da177e4SLinus Torvalds if (0 == (addr = mk_conf_addr(bus, devfn, where)))
5451da177e4SLinus Torvalds return PCIBIOS_DEVICE_NOT_FOUND;
5461da177e4SLinus Torvalds
5471da177e4SLinus Torvalds switch(size) {
5481da177e4SLinus Torvalds case 1:
5491da177e4SLinus Torvalds *value = __kernel_ldbu(*(vucp)addr);
5501da177e4SLinus Torvalds break;
5511da177e4SLinus Torvalds case 2:
5521da177e4SLinus Torvalds *value = __kernel_ldwu(*(vusp)addr);
5531da177e4SLinus Torvalds break;
5541da177e4SLinus Torvalds case 4:
5551da177e4SLinus Torvalds *value = *(vuip)addr;
5561da177e4SLinus Torvalds break;
5571da177e4SLinus Torvalds default:
5581da177e4SLinus Torvalds return PCIBIOS_FUNC_NOT_SUPPORTED;
5591da177e4SLinus Torvalds }
5601da177e4SLinus Torvalds
5611da177e4SLinus Torvalds return PCIBIOS_SUCCESSFUL;
5621da177e4SLinus Torvalds }
5631da177e4SLinus Torvalds
5641da177e4SLinus Torvalds static int
marvel_write_config(struct pci_bus * bus,unsigned int devfn,int where,int size,u32 value)5651da177e4SLinus Torvalds marvel_write_config(struct pci_bus *bus, unsigned int devfn, int where,
5661da177e4SLinus Torvalds int size, u32 value)
5671da177e4SLinus Torvalds {
5681da177e4SLinus Torvalds unsigned long addr;
5691da177e4SLinus Torvalds
5701da177e4SLinus Torvalds if (0 == (addr = mk_conf_addr(bus, devfn, where)))
5711da177e4SLinus Torvalds return PCIBIOS_DEVICE_NOT_FOUND;
5721da177e4SLinus Torvalds
5731da177e4SLinus Torvalds switch (size) {
5741da177e4SLinus Torvalds case 1:
5751da177e4SLinus Torvalds __kernel_stb(value, *(vucp)addr);
5761da177e4SLinus Torvalds mb();
5771da177e4SLinus Torvalds __kernel_ldbu(*(vucp)addr);
5781da177e4SLinus Torvalds break;
5791da177e4SLinus Torvalds case 2:
5801da177e4SLinus Torvalds __kernel_stw(value, *(vusp)addr);
5811da177e4SLinus Torvalds mb();
5821da177e4SLinus Torvalds __kernel_ldwu(*(vusp)addr);
5831da177e4SLinus Torvalds break;
5841da177e4SLinus Torvalds case 4:
5851da177e4SLinus Torvalds *(vuip)addr = value;
5861da177e4SLinus Torvalds mb();
5871da177e4SLinus Torvalds *(vuip)addr;
5881da177e4SLinus Torvalds break;
5891da177e4SLinus Torvalds default:
5901da177e4SLinus Torvalds return PCIBIOS_FUNC_NOT_SUPPORTED;
5911da177e4SLinus Torvalds }
5921da177e4SLinus Torvalds
5931da177e4SLinus Torvalds return PCIBIOS_SUCCESSFUL;
5941da177e4SLinus Torvalds }
5951da177e4SLinus Torvalds
5961da177e4SLinus Torvalds struct pci_ops marvel_pci_ops =
5971da177e4SLinus Torvalds {
5981da177e4SLinus Torvalds .read = marvel_read_config,
5991da177e4SLinus Torvalds .write = marvel_write_config,
6001da177e4SLinus Torvalds };
6011da177e4SLinus Torvalds
6021da177e4SLinus Torvalds
6031da177e4SLinus Torvalds /*
6041da177e4SLinus Torvalds * Other PCI helper functions.
6051da177e4SLinus Torvalds */
6061da177e4SLinus Torvalds void
marvel_pci_tbi(struct pci_controller * hose,dma_addr_t start,dma_addr_t end)6071da177e4SLinus Torvalds marvel_pci_tbi(struct pci_controller *hose, dma_addr_t start, dma_addr_t end)
6081da177e4SLinus Torvalds {
6091da177e4SLinus Torvalds io7_ioport_csrs *csrs = ((struct io7_port *)hose->sysdata)->csrs;
6101da177e4SLinus Torvalds
6111da177e4SLinus Torvalds wmb();
6121da177e4SLinus Torvalds csrs->POx_SG_TBIA.csr = 0;
6131da177e4SLinus Torvalds mb();
6141da177e4SLinus Torvalds csrs->POx_SG_TBIA.csr;
6151da177e4SLinus Torvalds }
6161da177e4SLinus Torvalds
6171da177e4SLinus Torvalds
6181da177e4SLinus Torvalds
6191da177e4SLinus Torvalds /*
6201da177e4SLinus Torvalds * RTC Support
6211da177e4SLinus Torvalds */
6221da177e4SLinus Torvalds struct marvel_rtc_access_info {
6231da177e4SLinus Torvalds unsigned long function;
6241da177e4SLinus Torvalds unsigned long index;
6251da177e4SLinus Torvalds unsigned long data;
6261da177e4SLinus Torvalds };
6271da177e4SLinus Torvalds
6281da177e4SLinus Torvalds static void
__marvel_access_rtc(void * info)6291da177e4SLinus Torvalds __marvel_access_rtc(void *info)
6301da177e4SLinus Torvalds {
6311da177e4SLinus Torvalds struct marvel_rtc_access_info *rtc_access = info;
6321da177e4SLinus Torvalds
6331da177e4SLinus Torvalds register unsigned long __r0 __asm__("$0");
6341da177e4SLinus Torvalds register unsigned long __r16 __asm__("$16") = rtc_access->function;
6351da177e4SLinus Torvalds register unsigned long __r17 __asm__("$17") = rtc_access->index;
6361da177e4SLinus Torvalds register unsigned long __r18 __asm__("$18") = rtc_access->data;
6371da177e4SLinus Torvalds
6381da177e4SLinus Torvalds __asm__ __volatile__(
6391da177e4SLinus Torvalds "call_pal %4 # cserve rtc"
6401da177e4SLinus Torvalds : "=r"(__r16), "=r"(__r17), "=r"(__r18), "=r"(__r0)
6411da177e4SLinus Torvalds : "i"(PAL_cserve), "0"(__r16), "1"(__r17), "2"(__r18)
6421da177e4SLinus Torvalds : "$1", "$22", "$23", "$24", "$25");
6431da177e4SLinus Torvalds
6441da177e4SLinus Torvalds rtc_access->data = __r0;
6451da177e4SLinus Torvalds }
6461da177e4SLinus Torvalds
6471da177e4SLinus Torvalds static u8
__marvel_rtc_io(u8 b,unsigned long addr,int write)6481da177e4SLinus Torvalds __marvel_rtc_io(u8 b, unsigned long addr, int write)
6491da177e4SLinus Torvalds {
6501da177e4SLinus Torvalds static u8 index = 0;
6511da177e4SLinus Torvalds
6521da177e4SLinus Torvalds struct marvel_rtc_access_info rtc_access;
6531da177e4SLinus Torvalds u8 ret = 0;
6541da177e4SLinus Torvalds
6551da177e4SLinus Torvalds switch(addr) {
6561da177e4SLinus Torvalds case 0x70: /* RTC_PORT(0) */
6571da177e4SLinus Torvalds if (write) index = b;
6581da177e4SLinus Torvalds ret = index;
6591da177e4SLinus Torvalds break;
6601da177e4SLinus Torvalds
6611da177e4SLinus Torvalds case 0x71: /* RTC_PORT(1) */
6621da177e4SLinus Torvalds rtc_access.index = index;
66318b1bd05SAdrian Bunk rtc_access.data = bcd2bin(b);
6641da177e4SLinus Torvalds rtc_access.function = 0x48 + !write; /* GET/PUT_TOY */
6651da177e4SLinus Torvalds
6661da177e4SLinus Torvalds __marvel_access_rtc(&rtc_access);
6675f7dc5d7SIvan Kokshaysky
66818b1bd05SAdrian Bunk ret = bin2bcd(rtc_access.data);
6691da177e4SLinus Torvalds break;
6701da177e4SLinus Torvalds
6711da177e4SLinus Torvalds default:
6721da177e4SLinus Torvalds printk(KERN_WARNING "Illegal RTC port %lx\n", addr);
6731da177e4SLinus Torvalds break;
6741da177e4SLinus Torvalds }
6751da177e4SLinus Torvalds
6761da177e4SLinus Torvalds return ret;
6771da177e4SLinus Torvalds }
6781da177e4SLinus Torvalds
6791da177e4SLinus Torvalds
6801da177e4SLinus Torvalds /*
6811da177e4SLinus Torvalds * IO map support.
6821da177e4SLinus Torvalds */
6831da177e4SLinus Torvalds void __iomem *
marvel_ioremap(unsigned long addr,unsigned long size)6841da177e4SLinus Torvalds marvel_ioremap(unsigned long addr, unsigned long size)
6851da177e4SLinus Torvalds {
6861da177e4SLinus Torvalds struct pci_controller *hose;
6871da177e4SLinus Torvalds unsigned long baddr, last;
6881da177e4SLinus Torvalds struct vm_struct *area;
6891da177e4SLinus Torvalds unsigned long vaddr;
6901da177e4SLinus Torvalds unsigned long *ptes;
6911da177e4SLinus Torvalds unsigned long pfn;
6921da177e4SLinus Torvalds
6931da177e4SLinus Torvalds /*
694025a2215SJay Estabrook * Adjust the address.
6951da177e4SLinus Torvalds */
696025a2215SJay Estabrook FIXUP_MEMADDR_VGA(addr);
6971da177e4SLinus Torvalds
6981da177e4SLinus Torvalds /*
6991da177e4SLinus Torvalds * Find the hose.
7001da177e4SLinus Torvalds */
7011da177e4SLinus Torvalds for (hose = hose_head; hose; hose = hose->next) {
7021da177e4SLinus Torvalds if ((addr >> 32) == (hose->mem_space->start >> 32))
7031da177e4SLinus Torvalds break;
7041da177e4SLinus Torvalds }
7051da177e4SLinus Torvalds if (!hose)
7061da177e4SLinus Torvalds return NULL;
7071da177e4SLinus Torvalds
7081da177e4SLinus Torvalds /*
7091da177e4SLinus Torvalds * We have the hose - calculate the bus limits.
7101da177e4SLinus Torvalds */
7111da177e4SLinus Torvalds baddr = addr - hose->mem_space->start;
7121da177e4SLinus Torvalds last = baddr + size - 1;
7131da177e4SLinus Torvalds
7141da177e4SLinus Torvalds /*
7151da177e4SLinus Torvalds * Is it direct-mapped?
7161da177e4SLinus Torvalds */
7171da177e4SLinus Torvalds if ((baddr >= __direct_map_base) &&
7181da177e4SLinus Torvalds ((baddr + size - 1) < __direct_map_base + __direct_map_size)) {
7191da177e4SLinus Torvalds addr = IDENT_ADDR | (baddr - __direct_map_base);
7201da177e4SLinus Torvalds return (void __iomem *) addr;
7211da177e4SLinus Torvalds }
7221da177e4SLinus Torvalds
7231da177e4SLinus Torvalds /*
7241da177e4SLinus Torvalds * Check the scatter-gather arena.
7251da177e4SLinus Torvalds */
7261da177e4SLinus Torvalds if (hose->sg_pci &&
7271da177e4SLinus Torvalds baddr >= (unsigned long)hose->sg_pci->dma_base &&
7281da177e4SLinus Torvalds last < (unsigned long)hose->sg_pci->dma_base + hose->sg_pci->size) {
7291da177e4SLinus Torvalds
7301da177e4SLinus Torvalds /*
7311da177e4SLinus Torvalds * Adjust the limits (mappings must be page aligned)
7321da177e4SLinus Torvalds */
7331da177e4SLinus Torvalds baddr -= hose->sg_pci->dma_base;
7341da177e4SLinus Torvalds last -= hose->sg_pci->dma_base;
7351da177e4SLinus Torvalds baddr &= PAGE_MASK;
7361da177e4SLinus Torvalds size = PAGE_ALIGN(last) - baddr;
7371da177e4SLinus Torvalds
7381da177e4SLinus Torvalds /*
7391da177e4SLinus Torvalds * Map it.
7401da177e4SLinus Torvalds */
7411da177e4SLinus Torvalds area = get_vm_area(size, VM_IOREMAP);
7421da177e4SLinus Torvalds if (!area)
7431da177e4SLinus Torvalds return NULL;
7441da177e4SLinus Torvalds
7451da177e4SLinus Torvalds ptes = hose->sg_pci->ptes;
7461da177e4SLinus Torvalds for (vaddr = (unsigned long)area->addr;
7471da177e4SLinus Torvalds baddr <= last;
7481da177e4SLinus Torvalds baddr += PAGE_SIZE, vaddr += PAGE_SIZE) {
7491da177e4SLinus Torvalds pfn = ptes[baddr >> PAGE_SHIFT];
7501da177e4SLinus Torvalds if (!(pfn & 1)) {
7511da177e4SLinus Torvalds printk("ioremap failed... pte not valid...\n");
7521da177e4SLinus Torvalds vfree(area->addr);
7531da177e4SLinus Torvalds return NULL;
7541da177e4SLinus Torvalds }
7551da177e4SLinus Torvalds pfn >>= 1; /* make it a true pfn */
7561da177e4SLinus Torvalds
7571da177e4SLinus Torvalds if (__alpha_remap_area_pages(vaddr,
7581da177e4SLinus Torvalds pfn << PAGE_SHIFT,
7591da177e4SLinus Torvalds PAGE_SIZE, 0)) {
7601da177e4SLinus Torvalds printk("FAILED to map...\n");
7611da177e4SLinus Torvalds vfree(area->addr);
7621da177e4SLinus Torvalds return NULL;
7631da177e4SLinus Torvalds }
7641da177e4SLinus Torvalds }
7651da177e4SLinus Torvalds
7661da177e4SLinus Torvalds flush_tlb_all();
7671da177e4SLinus Torvalds
7681da177e4SLinus Torvalds vaddr = (unsigned long)area->addr + (addr & ~PAGE_MASK);
7691da177e4SLinus Torvalds
7701da177e4SLinus Torvalds return (void __iomem *) vaddr;
7711da177e4SLinus Torvalds }
7721da177e4SLinus Torvalds
773025a2215SJay Estabrook /* Assume it was already a reasonable address */
774025a2215SJay Estabrook vaddr = baddr + hose->mem_space->start;
775025a2215SJay Estabrook return (void __iomem *) vaddr;
7761da177e4SLinus Torvalds }
7771da177e4SLinus Torvalds
7781da177e4SLinus Torvalds void
marvel_iounmap(volatile void __iomem * xaddr)7791da177e4SLinus Torvalds marvel_iounmap(volatile void __iomem *xaddr)
7801da177e4SLinus Torvalds {
7811da177e4SLinus Torvalds unsigned long addr = (unsigned long) xaddr;
7821da177e4SLinus Torvalds if (addr >= VMALLOC_START)
7831da177e4SLinus Torvalds vfree((void *)(PAGE_MASK & addr));
7841da177e4SLinus Torvalds }
7851da177e4SLinus Torvalds
7861da177e4SLinus Torvalds int
marvel_is_mmio(const volatile void __iomem * xaddr)7871da177e4SLinus Torvalds marvel_is_mmio(const volatile void __iomem *xaddr)
7881da177e4SLinus Torvalds {
7891da177e4SLinus Torvalds unsigned long addr = (unsigned long) xaddr;
7901da177e4SLinus Torvalds
7911da177e4SLinus Torvalds if (addr >= VMALLOC_START)
7921da177e4SLinus Torvalds return 1;
7931da177e4SLinus Torvalds else
7941da177e4SLinus Torvalds return (addr & 0xFF000000UL) == 0;
7951da177e4SLinus Torvalds }
7961da177e4SLinus Torvalds
7971da177e4SLinus Torvalds #define __marvel_is_port_kbd(a) (((a) == 0x60) || ((a) == 0x64))
7981da177e4SLinus Torvalds #define __marvel_is_port_rtc(a) (((a) == 0x70) || ((a) == 0x71))
7991da177e4SLinus Torvalds
marvel_ioportmap(unsigned long addr)8001da177e4SLinus Torvalds void __iomem *marvel_ioportmap (unsigned long addr)
8011da177e4SLinus Torvalds {
802025a2215SJay Estabrook FIXUP_IOADDR_VGA(addr);
8031da177e4SLinus Torvalds return (void __iomem *)addr;
8041da177e4SLinus Torvalds }
8051da177e4SLinus Torvalds
806*2e21c157SArnd Bergmann u8
marvel_ioread8(const void __iomem * xaddr)8078f28ca6bSKrzysztof Kozlowski marvel_ioread8(const void __iomem *xaddr)
8081da177e4SLinus Torvalds {
8091da177e4SLinus Torvalds unsigned long addr = (unsigned long) xaddr;
8101da177e4SLinus Torvalds if (__marvel_is_port_kbd(addr))
8111da177e4SLinus Torvalds return 0;
8121da177e4SLinus Torvalds else if (__marvel_is_port_rtc(addr))
8131da177e4SLinus Torvalds return __marvel_rtc_io(0, addr, 0);
814025a2215SJay Estabrook else if (marvel_is_ioaddr(addr))
8151da177e4SLinus Torvalds return __kernel_ldbu(*(vucp)addr);
816025a2215SJay Estabrook else
817025a2215SJay Estabrook /* this should catch other legacy addresses
818025a2215SJay Estabrook that would normally fail on MARVEL,
819025a2215SJay Estabrook because there really is nothing there...
820025a2215SJay Estabrook */
821025a2215SJay Estabrook return ~0;
8221da177e4SLinus Torvalds }
8231da177e4SLinus Torvalds
8241da177e4SLinus Torvalds void
marvel_iowrite8(u8 b,void __iomem * xaddr)8251da177e4SLinus Torvalds marvel_iowrite8(u8 b, void __iomem *xaddr)
8261da177e4SLinus Torvalds {
8271da177e4SLinus Torvalds unsigned long addr = (unsigned long) xaddr;
8281da177e4SLinus Torvalds if (__marvel_is_port_kbd(addr))
8291da177e4SLinus Torvalds return;
8301da177e4SLinus Torvalds else if (__marvel_is_port_rtc(addr))
8311da177e4SLinus Torvalds __marvel_rtc_io(b, addr, 1);
832025a2215SJay Estabrook else if (marvel_is_ioaddr(addr))
8331da177e4SLinus Torvalds __kernel_stb(b, *(vucp)addr);
8341da177e4SLinus Torvalds }
8351da177e4SLinus Torvalds
8361da177e4SLinus Torvalds #ifndef CONFIG_ALPHA_GENERIC
8371da177e4SLinus Torvalds EXPORT_SYMBOL(marvel_ioremap);
8381da177e4SLinus Torvalds EXPORT_SYMBOL(marvel_iounmap);
8391da177e4SLinus Torvalds EXPORT_SYMBOL(marvel_is_mmio);
8401da177e4SLinus Torvalds EXPORT_SYMBOL(marvel_ioportmap);
8411da177e4SLinus Torvalds EXPORT_SYMBOL(marvel_ioread8);
8421da177e4SLinus Torvalds EXPORT_SYMBOL(marvel_iowrite8);
8431da177e4SLinus Torvalds #endif
8441da177e4SLinus Torvalds
8451da177e4SLinus Torvalds /*
8461da177e4SLinus Torvalds * AGP GART Support.
8471da177e4SLinus Torvalds */
8481da177e4SLinus Torvalds #include <linux/agp_backend.h>
8491da177e4SLinus Torvalds #include <asm/agp_backend.h>
8501da177e4SLinus Torvalds #include <linux/slab.h>
8511da177e4SLinus Torvalds #include <linux/delay.h>
8521da177e4SLinus Torvalds
8531da177e4SLinus Torvalds struct marvel_agp_aperture {
8541da177e4SLinus Torvalds struct pci_iommu_arena *arena;
8551da177e4SLinus Torvalds long pg_start;
8561da177e4SLinus Torvalds long pg_count;
8571da177e4SLinus Torvalds };
8581da177e4SLinus Torvalds
8591da177e4SLinus Torvalds static int
marvel_agp_setup(alpha_agp_info * agp)8601da177e4SLinus Torvalds marvel_agp_setup(alpha_agp_info *agp)
8611da177e4SLinus Torvalds {
8621da177e4SLinus Torvalds struct marvel_agp_aperture *aper;
8631da177e4SLinus Torvalds
8641da177e4SLinus Torvalds if (!alpha_agpgart_size)
8651da177e4SLinus Torvalds return -ENOMEM;
8661da177e4SLinus Torvalds
8671da177e4SLinus Torvalds aper = kmalloc(sizeof(*aper), GFP_KERNEL);
8681da177e4SLinus Torvalds if (aper == NULL) return -ENOMEM;
8691da177e4SLinus Torvalds
8701da177e4SLinus Torvalds aper->arena = agp->hose->sg_pci;
8711da177e4SLinus Torvalds aper->pg_count = alpha_agpgart_size / PAGE_SIZE;
8721da177e4SLinus Torvalds aper->pg_start = iommu_reserve(aper->arena, aper->pg_count,
8731da177e4SLinus Torvalds aper->pg_count - 1);
8741da177e4SLinus Torvalds
8751da177e4SLinus Torvalds if (aper->pg_start < 0) {
8761da177e4SLinus Torvalds printk(KERN_ERR "Failed to reserve AGP memory\n");
8771da177e4SLinus Torvalds kfree(aper);
8781da177e4SLinus Torvalds return -ENOMEM;
8791da177e4SLinus Torvalds }
8801da177e4SLinus Torvalds
8811da177e4SLinus Torvalds agp->aperture.bus_base =
8821da177e4SLinus Torvalds aper->arena->dma_base + aper->pg_start * PAGE_SIZE;
8831da177e4SLinus Torvalds agp->aperture.size = aper->pg_count * PAGE_SIZE;
8841da177e4SLinus Torvalds agp->aperture.sysdata = aper;
8851da177e4SLinus Torvalds
8861da177e4SLinus Torvalds return 0;
8871da177e4SLinus Torvalds }
8881da177e4SLinus Torvalds
8891da177e4SLinus Torvalds static void
marvel_agp_cleanup(alpha_agp_info * agp)8901da177e4SLinus Torvalds marvel_agp_cleanup(alpha_agp_info *agp)
8911da177e4SLinus Torvalds {
8921da177e4SLinus Torvalds struct marvel_agp_aperture *aper = agp->aperture.sysdata;
8931da177e4SLinus Torvalds int status;
8941da177e4SLinus Torvalds
8951da177e4SLinus Torvalds status = iommu_release(aper->arena, aper->pg_start, aper->pg_count);
8961da177e4SLinus Torvalds if (status == -EBUSY) {
8971da177e4SLinus Torvalds printk(KERN_WARNING
8981da177e4SLinus Torvalds "Attempted to release bound AGP memory - unbinding\n");
8991da177e4SLinus Torvalds iommu_unbind(aper->arena, aper->pg_start, aper->pg_count);
9001da177e4SLinus Torvalds status = iommu_release(aper->arena, aper->pg_start,
9011da177e4SLinus Torvalds aper->pg_count);
9021da177e4SLinus Torvalds }
9031da177e4SLinus Torvalds if (status < 0)
9041da177e4SLinus Torvalds printk(KERN_ERR "Failed to release AGP memory\n");
9051da177e4SLinus Torvalds
9061da177e4SLinus Torvalds kfree(aper);
9071da177e4SLinus Torvalds kfree(agp);
9081da177e4SLinus Torvalds }
9091da177e4SLinus Torvalds
9101da177e4SLinus Torvalds static int
marvel_agp_configure(alpha_agp_info * agp)9111da177e4SLinus Torvalds marvel_agp_configure(alpha_agp_info *agp)
9121da177e4SLinus Torvalds {
9131da177e4SLinus Torvalds io7_ioport_csrs *csrs = ((struct io7_port *)agp->hose->sysdata)->csrs;
9141da177e4SLinus Torvalds struct io7 *io7 = ((struct io7_port *)agp->hose->sysdata)->io7;
9151da177e4SLinus Torvalds unsigned int new_rate = 0;
9161da177e4SLinus Torvalds unsigned long agp_pll;
9171da177e4SLinus Torvalds
9181da177e4SLinus Torvalds /*
9191da177e4SLinus Torvalds * Check the requested mode against the PLL setting.
9201da177e4SLinus Torvalds * The agpgart_be code has not programmed the card yet,
9211da177e4SLinus Torvalds * so we can still tweak mode here.
9221da177e4SLinus Torvalds */
9231da177e4SLinus Torvalds agp_pll = io7->csrs->POx_RST[IO7_AGP_PORT].csr;
9241da177e4SLinus Torvalds switch(IO7_PLL_RNGB(agp_pll)) {
9251da177e4SLinus Torvalds case 0x4: /* 2x only */
9261da177e4SLinus Torvalds /*
9271da177e4SLinus Torvalds * The PLL is only programmed for 2x, so adjust the
9281da177e4SLinus Torvalds * rate to 2x, if necessary.
9291da177e4SLinus Torvalds */
9301da177e4SLinus Torvalds if (agp->mode.bits.rate != 2)
9311da177e4SLinus Torvalds new_rate = 2;
9321da177e4SLinus Torvalds break;
9331da177e4SLinus Torvalds
9341da177e4SLinus Torvalds case 0x6: /* 1x / 4x */
9351da177e4SLinus Torvalds /*
9361da177e4SLinus Torvalds * The PLL is programmed for 1x or 4x. Don't go faster
9371da177e4SLinus Torvalds * than requested, so if the requested rate is 2x, use 1x.
9381da177e4SLinus Torvalds */
9391da177e4SLinus Torvalds if (agp->mode.bits.rate == 2)
9401da177e4SLinus Torvalds new_rate = 1;
9411da177e4SLinus Torvalds break;
9421da177e4SLinus Torvalds
9431da177e4SLinus Torvalds default: /* ??????? */
9441da177e4SLinus Torvalds /*
9451da177e4SLinus Torvalds * Don't know what this PLL setting is, take the requested
9461da177e4SLinus Torvalds * rate, but warn the user.
9471da177e4SLinus Torvalds */
9481da177e4SLinus Torvalds printk("%s: unknown PLL setting RNGB=%lx (PLL6_CTL=%016lx)\n",
949bbb8d343SHarvey Harrison __func__, IO7_PLL_RNGB(agp_pll), agp_pll);
9501da177e4SLinus Torvalds break;
9511da177e4SLinus Torvalds }
9521da177e4SLinus Torvalds
9531da177e4SLinus Torvalds /*
9541da177e4SLinus Torvalds * Set the new rate, if necessary.
9551da177e4SLinus Torvalds */
9561da177e4SLinus Torvalds if (new_rate) {
9571da177e4SLinus Torvalds printk("Requested AGP Rate %dX not compatible "
9581da177e4SLinus Torvalds "with PLL setting - using %dX\n",
9591da177e4SLinus Torvalds agp->mode.bits.rate,
9601da177e4SLinus Torvalds new_rate);
9611da177e4SLinus Torvalds
9621da177e4SLinus Torvalds agp->mode.bits.rate = new_rate;
9631da177e4SLinus Torvalds }
9641da177e4SLinus Torvalds
9651da177e4SLinus Torvalds printk("Enabling AGP on hose %d: %dX%s RQ %d\n",
9661da177e4SLinus Torvalds agp->hose->index, agp->mode.bits.rate,
9671da177e4SLinus Torvalds agp->mode.bits.sba ? " - SBA" : "", agp->mode.bits.rq);
9681da177e4SLinus Torvalds
9691da177e4SLinus Torvalds csrs->AGP_CMD.csr = agp->mode.lw;
9701da177e4SLinus Torvalds
9711da177e4SLinus Torvalds return 0;
9721da177e4SLinus Torvalds }
9731da177e4SLinus Torvalds
9741da177e4SLinus Torvalds static int
marvel_agp_bind_memory(alpha_agp_info * agp,off_t pg_start,struct agp_memory * mem)9751da177e4SLinus Torvalds marvel_agp_bind_memory(alpha_agp_info *agp, off_t pg_start, struct agp_memory *mem)
9761da177e4SLinus Torvalds {
9771da177e4SLinus Torvalds struct marvel_agp_aperture *aper = agp->aperture.sysdata;
9781da177e4SLinus Torvalds return iommu_bind(aper->arena, aper->pg_start + pg_start,
979d68721ebSIvan Kokshaysky mem->page_count, mem->pages);
9801da177e4SLinus Torvalds }
9811da177e4SLinus Torvalds
9821da177e4SLinus Torvalds static int
marvel_agp_unbind_memory(alpha_agp_info * agp,off_t pg_start,struct agp_memory * mem)9831da177e4SLinus Torvalds marvel_agp_unbind_memory(alpha_agp_info *agp, off_t pg_start, struct agp_memory *mem)
9841da177e4SLinus Torvalds {
9851da177e4SLinus Torvalds struct marvel_agp_aperture *aper = agp->aperture.sysdata;
9861da177e4SLinus Torvalds return iommu_unbind(aper->arena, aper->pg_start + pg_start,
9871da177e4SLinus Torvalds mem->page_count);
9881da177e4SLinus Torvalds }
9891da177e4SLinus Torvalds
9901da177e4SLinus Torvalds static unsigned long
marvel_agp_translate(alpha_agp_info * agp,dma_addr_t addr)9911da177e4SLinus Torvalds marvel_agp_translate(alpha_agp_info *agp, dma_addr_t addr)
9921da177e4SLinus Torvalds {
9931da177e4SLinus Torvalds struct marvel_agp_aperture *aper = agp->aperture.sysdata;
9941da177e4SLinus Torvalds unsigned long baddr = addr - aper->arena->dma_base;
9951da177e4SLinus Torvalds unsigned long pte;
9961da177e4SLinus Torvalds
9971da177e4SLinus Torvalds if (addr < agp->aperture.bus_base ||
9981da177e4SLinus Torvalds addr >= agp->aperture.bus_base + agp->aperture.size) {
999bbb8d343SHarvey Harrison printk("%s: addr out of range\n", __func__);
10001da177e4SLinus Torvalds return -EINVAL;
10011da177e4SLinus Torvalds }
10021da177e4SLinus Torvalds
10031da177e4SLinus Torvalds pte = aper->arena->ptes[baddr >> PAGE_SHIFT];
10041da177e4SLinus Torvalds if (!(pte & 1)) {
1005bbb8d343SHarvey Harrison printk("%s: pte not valid\n", __func__);
10061da177e4SLinus Torvalds return -EINVAL;
10071da177e4SLinus Torvalds }
10081da177e4SLinus Torvalds return (pte >> 1) << PAGE_SHIFT;
10091da177e4SLinus Torvalds }
10101da177e4SLinus Torvalds
10111da177e4SLinus Torvalds struct alpha_agp_ops marvel_agp_ops =
10121da177e4SLinus Torvalds {
10131da177e4SLinus Torvalds .setup = marvel_agp_setup,
10141da177e4SLinus Torvalds .cleanup = marvel_agp_cleanup,
10151da177e4SLinus Torvalds .configure = marvel_agp_configure,
10161da177e4SLinus Torvalds .bind = marvel_agp_bind_memory,
10171da177e4SLinus Torvalds .unbind = marvel_agp_unbind_memory,
10181da177e4SLinus Torvalds .translate = marvel_agp_translate
10191da177e4SLinus Torvalds };
10201da177e4SLinus Torvalds
10211da177e4SLinus Torvalds alpha_agp_info *
marvel_agp_info(void)10221da177e4SLinus Torvalds marvel_agp_info(void)
10231da177e4SLinus Torvalds {
10241da177e4SLinus Torvalds struct pci_controller *hose;
10251da177e4SLinus Torvalds io7_ioport_csrs *csrs;
10261da177e4SLinus Torvalds alpha_agp_info *agp;
10271da177e4SLinus Torvalds struct io7 *io7;
10281da177e4SLinus Torvalds
10291da177e4SLinus Torvalds /*
10301da177e4SLinus Torvalds * Find the first IO7 with an AGP card.
10311da177e4SLinus Torvalds *
10321da177e4SLinus Torvalds * FIXME -- there should be a better way (we want to be able to
10331da177e4SLinus Torvalds * specify and what if the agp card is not video???)
10341da177e4SLinus Torvalds */
10351da177e4SLinus Torvalds hose = NULL;
10361da177e4SLinus Torvalds for (io7 = NULL; (io7 = marvel_next_io7(io7)) != NULL; ) {
10371da177e4SLinus Torvalds struct pci_controller *h;
10381da177e4SLinus Torvalds vuip addr;
10391da177e4SLinus Torvalds
10401da177e4SLinus Torvalds if (!io7->ports[IO7_AGP_PORT].enabled)
10411da177e4SLinus Torvalds continue;
10421da177e4SLinus Torvalds
10431da177e4SLinus Torvalds h = io7->ports[IO7_AGP_PORT].hose;
10441da177e4SLinus Torvalds addr = (vuip)build_conf_addr(h, 0, PCI_DEVFN(5, 0), 0);
10451da177e4SLinus Torvalds
10461da177e4SLinus Torvalds if (*addr != 0xffffffffu) {
10471da177e4SLinus Torvalds hose = h;
10481da177e4SLinus Torvalds break;
10491da177e4SLinus Torvalds }
10501da177e4SLinus Torvalds }
10511da177e4SLinus Torvalds
10521da177e4SLinus Torvalds if (!hose || !hose->sg_pci)
10531da177e4SLinus Torvalds return NULL;
10541da177e4SLinus Torvalds
10551da177e4SLinus Torvalds printk("MARVEL - using hose %d as AGP\n", hose->index);
10561da177e4SLinus Torvalds
10571da177e4SLinus Torvalds /*
10581da177e4SLinus Torvalds * Get the csrs from the hose.
10591da177e4SLinus Torvalds */
10601da177e4SLinus Torvalds csrs = ((struct io7_port *)hose->sysdata)->csrs;
10611da177e4SLinus Torvalds
10621da177e4SLinus Torvalds /*
10631da177e4SLinus Torvalds * Allocate the info structure.
10641da177e4SLinus Torvalds */
10651da177e4SLinus Torvalds agp = kmalloc(sizeof(*agp), GFP_KERNEL);
1066cc9a2c83SJulia Lawall if (!agp)
1067cc9a2c83SJulia Lawall return NULL;
10681da177e4SLinus Torvalds
10691da177e4SLinus Torvalds /*
10701da177e4SLinus Torvalds * Fill it in.
10711da177e4SLinus Torvalds */
10721da177e4SLinus Torvalds agp->hose = hose;
10731da177e4SLinus Torvalds agp->private = NULL;
10741da177e4SLinus Torvalds agp->ops = &marvel_agp_ops;
10751da177e4SLinus Torvalds
10761da177e4SLinus Torvalds /*
10771da177e4SLinus Torvalds * Aperture - not configured until ops.setup().
10781da177e4SLinus Torvalds */
10791da177e4SLinus Torvalds agp->aperture.bus_base = 0;
10801da177e4SLinus Torvalds agp->aperture.size = 0;
10811da177e4SLinus Torvalds agp->aperture.sysdata = NULL;
10821da177e4SLinus Torvalds
10831da177e4SLinus Torvalds /*
10841da177e4SLinus Torvalds * Capabilities.
10851da177e4SLinus Torvalds *
10861da177e4SLinus Torvalds * NOTE: IO7 reports through AGP_STAT that it can support a read queue
10871da177e4SLinus Torvalds * depth of 17 (rq = 0x10). It actually only supports a depth of
10881da177e4SLinus Torvalds * 16 (rq = 0xf).
10891da177e4SLinus Torvalds */
10901da177e4SLinus Torvalds agp->capability.lw = csrs->AGP_STAT.csr;
10911da177e4SLinus Torvalds agp->capability.bits.rq = 0xf;
10921da177e4SLinus Torvalds
10931da177e4SLinus Torvalds /*
10941da177e4SLinus Torvalds * Mode.
10951da177e4SLinus Torvalds */
10961da177e4SLinus Torvalds agp->mode.lw = csrs->AGP_CMD.csr;
10971da177e4SLinus Torvalds
10981da177e4SLinus Torvalds return agp;
10991da177e4SLinus Torvalds }
1100