1.. SPDX-License-Identifier: GPL-2.0
2
3===============================================
4ARM Virtual Interrupt Translation Service (ITS)
5===============================================
6
7Device types supported:
8  KVM_DEV_TYPE_ARM_VGIC_ITS    ARM Interrupt Translation Service Controller
9
10The ITS allows MSI(-X) interrupts to be injected into guests. This extension is
11optional.  Creating a virtual ITS controller also requires a host GICv3 (see
12arm-vgic-v3.txt), but does not depend on having physical ITS controllers.
13
14There can be multiple ITS controllers per guest, each of them has to have
15a separate, non-overlapping MMIO region.
16
17
18Groups
19======
20
21KVM_DEV_ARM_VGIC_GRP_ADDR
22-------------------------
23
24  Attributes:
25    KVM_VGIC_ITS_ADDR_TYPE (rw, 64-bit)
26      Base address in the guest physical address space of the GICv3 ITS
27      control register frame.
28      This address needs to be 64K aligned and the region covers 128K.
29
30  Errors:
31
32    =======  =================================================
33    -E2BIG   Address outside of addressable IPA range
34    -EINVAL  Incorrectly aligned address
35    -EEXIST  Address already configured
36    -EFAULT  Invalid user pointer for attr->addr.
37    -ENODEV  Incorrect attribute or the ITS is not supported.
38    =======  =================================================
39
40
41KVM_DEV_ARM_VGIC_GRP_CTRL
42-------------------------
43
44  Attributes:
45    KVM_DEV_ARM_VGIC_CTRL_INIT
46      request the initialization of the ITS, no additional parameter in
47      kvm_device_attr.addr.
48
49    KVM_DEV_ARM_ITS_CTRL_RESET
50      reset the ITS, no additional parameter in kvm_device_attr.addr.
51      See "ITS Reset State" section.
52
53    KVM_DEV_ARM_ITS_SAVE_TABLES
54      save the ITS table data into guest RAM, at the location provisioned
55      by the guest in corresponding registers/table entries.
56
57      The layout of the tables in guest memory defines an ABI. The entries
58      are laid out in little endian format as described in the last paragraph.
59
60    KVM_DEV_ARM_ITS_RESTORE_TABLES
61      restore the ITS tables from guest RAM to ITS internal structures.
62
63      The GICV3 must be restored before the ITS and all ITS registers but
64      the GITS_CTLR must be restored before restoring the ITS tables.
65
66      The GITS_IIDR read-only register must also be restored before
67      calling KVM_DEV_ARM_ITS_RESTORE_TABLES as the IIDR revision field
68      encodes the ABI revision.
69
70      The expected ordering when restoring the GICv3/ITS is described in section
71      "ITS Restore Sequence".
72
73  Errors:
74
75    =======  ==========================================================
76     -ENXIO  ITS not properly configured as required prior to setting
77             this attribute
78    -ENOMEM  Memory shortage when allocating ITS internal data
79    -EINVAL  Inconsistent restored data
80    -EFAULT  Invalid guest ram access
81    -EBUSY   One or more VCPUS are running
82    -EACCES  The virtual ITS is backed by a physical GICv4 ITS, and the
83	     state is not available without GICv4.1
84    =======  ==========================================================
85
86KVM_DEV_ARM_VGIC_GRP_ITS_REGS
87-----------------------------
88
89  Attributes:
90      The attr field of kvm_device_attr encodes the offset of the
91      ITS register, relative to the ITS control frame base address
92      (ITS_base).
93
94      kvm_device_attr.addr points to a __u64 value whatever the width
95      of the addressed register (32/64 bits). 64 bit registers can only
96      be accessed with full length.
97
98      Writes to read-only registers are ignored by the kernel except for:
99
100      - GITS_CREADR. It must be restored otherwise commands in the queue
101        will be re-executed after restoring CWRITER. GITS_CREADR must be
102        restored before restoring the GITS_CTLR which is likely to enable the
103        ITS. Also it must be restored after GITS_CBASER since a write to
104        GITS_CBASER resets GITS_CREADR.
105      - GITS_IIDR. The Revision field encodes the table layout ABI revision.
106        In the future we might implement direct injection of virtual LPIs.
107        This will require an upgrade of the table layout and an evolution of
108        the ABI. GITS_IIDR must be restored before calling
109        KVM_DEV_ARM_ITS_RESTORE_TABLES.
110
111      For other registers, getting or setting a register has the same
112      effect as reading/writing the register on real hardware.
113
114  Errors:
115
116    =======  ====================================================
117    -ENXIO   Offset does not correspond to any supported register
118    -EFAULT  Invalid user pointer for attr->addr
119    -EINVAL  Offset is not 64-bit aligned
120    -EBUSY   one or more VCPUS are running
121    =======  ====================================================
122
123ITS Restore Sequence:
124---------------------
125
126The following ordering must be followed when restoring the GIC and the ITS:
127
128a) restore all guest memory and create vcpus
129b) restore all redistributors
130c) provide the ITS base address
131   (KVM_DEV_ARM_VGIC_GRP_ADDR)
132d) restore the ITS in the following order:
133
134     1. Restore GITS_CBASER
135     2. Restore all other ``GITS_`` registers, except GITS_CTLR!
136     3. Load the ITS table data (KVM_DEV_ARM_ITS_RESTORE_TABLES)
137     4. Restore GITS_CTLR
138
139Then vcpus can be started.
140
141ITS Table ABI REV0:
142-------------------
143
144 Revision 0 of the ABI only supports the features of a virtual GICv3, and does
145 not support a virtual GICv4 with support for direct injection of virtual
146 interrupts for nested hypervisors.
147
148 The device table and ITT are indexed by the DeviceID and EventID,
149 respectively. The collection table is not indexed by CollectionID, and the
150 entries in the collection are listed in no particular order.
151 All entries are 8 bytes.
152
153 Device Table Entry (DTE)::
154
155   bits:     | 63| 62 ... 49 | 48 ... 5 | 4 ... 0 |
156   values:   | V |   next    | ITT_addr |  Size   |
157
158 where:
159
160 - V indicates whether the entry is valid. If not, other fields
161   are not meaningful.
162 - next: equals to 0 if this entry is the last one; otherwise it
163   corresponds to the DeviceID offset to the next DTE, capped by
164   2^14 -1.
165 - ITT_addr matches bits [51:8] of the ITT address (256 Byte aligned).
166 - Size specifies the supported number of bits for the EventID,
167   minus one
168
169 Collection Table Entry (CTE)::
170
171   bits:     | 63| 62 ..  52  | 51 ... 16 | 15  ...   0 |
172   values:   | V |    RES0    |  RDBase   |    ICID     |
173
174 where:
175
176 - V indicates whether the entry is valid. If not, other fields are
177   not meaningful.
178 - RES0: reserved field with Should-Be-Zero-or-Preserved behavior.
179 - RDBase is the PE number (GICR_TYPER.Processor_Number semantic),
180 - ICID is the collection ID
181
182 Interrupt Translation Entry (ITE)::
183
184   bits:     | 63 ... 48 | 47 ... 16 | 15 ... 0 |
185   values:   |    next   |   pINTID  |  ICID    |
186
187 where:
188
189 - next: equals to 0 if this entry is the last one; otherwise it corresponds
190   to the EventID offset to the next ITE capped by 2^16 -1.
191 - pINTID is the physical LPI ID; if zero, it means the entry is not valid
192   and other fields are not meaningful.
193 - ICID is the collection ID
194
195ITS Reset State:
196----------------
197
198RESET returns the ITS to the same state that it was when first created and
199initialized. When the RESET command returns, the following things are
200guaranteed:
201
202- The ITS is not enabled and quiescent
203  GITS_CTLR.Enabled = 0 .Quiescent=1
204- There is no internally cached state
205- No collection or device table are used
206  GITS_BASER<n>.Valid = 0
207- GITS_CBASER = 0, GITS_CREADR = 0, GITS_CWRITER = 0
208- The ABI version is unchanged and remains the one set when the ITS
209  device was first created.
210