1520a44d4SMauro Carvalho Chehab.. SPDX-License-Identifier: GPL-2.0
2520a44d4SMauro Carvalho Chehab.. include:: <isonum.txt>
3520a44d4SMauro Carvalho Chehab
4520a44d4SMauro Carvalho Chehab===================================
5520a44d4SMauro Carvalho ChehabAdaptec Ultra320 Family Manager Set
6520a44d4SMauro Carvalho Chehab===================================
7520a44d4SMauro Carvalho Chehab
8520a44d4SMauro Carvalho ChehabREADME for The Linux Operating System
9520a44d4SMauro Carvalho Chehab
10520a44d4SMauro Carvalho Chehab.. The following information is available in this file:
11520a44d4SMauro Carvalho Chehab
12520a44d4SMauro Carvalho Chehab  1. Supported Hardware
13520a44d4SMauro Carvalho Chehab  2. Version History
14520a44d4SMauro Carvalho Chehab  3. Command Line Options
15520a44d4SMauro Carvalho Chehab  4. Additional Notes
16520a44d4SMauro Carvalho Chehab  5. Contacting Adaptec
17520a44d4SMauro Carvalho Chehab
18520a44d4SMauro Carvalho Chehab
19520a44d4SMauro Carvalho Chehab1. Supported Hardware
20520a44d4SMauro Carvalho Chehab=====================
21520a44d4SMauro Carvalho Chehab
22520a44d4SMauro Carvalho Chehab   The following Adaptec SCSI Host Adapters are supported by this
23520a44d4SMauro Carvalho Chehab   driver set.
24520a44d4SMauro Carvalho Chehab
25520a44d4SMauro Carvalho Chehab   =============              =========================================
26520a44d4SMauro Carvalho Chehab   Ultra320 ASIC              Description
27520a44d4SMauro Carvalho Chehab   =============              =========================================
28520a44d4SMauro Carvalho Chehab   AIC-7901A                  Single Channel 64-bit PCI-X 133MHz to
29520a44d4SMauro Carvalho Chehab                              Ultra320 SCSI ASIC
30520a44d4SMauro Carvalho Chehab   AIC-7901B                  Single Channel 64-bit PCI-X 133MHz to
31520a44d4SMauro Carvalho Chehab                              Ultra320 SCSI ASIC with Retained Training
32520a44d4SMauro Carvalho Chehab   AIC-7902A4                 Dual Channel 64-bit PCI-X 133MHz to
33520a44d4SMauro Carvalho Chehab                              Ultra320 SCSI ASIC
34520a44d4SMauro Carvalho Chehab   AIC-7902B                  Dual Channel 64-bit PCI-X 133MHz to
35520a44d4SMauro Carvalho Chehab                              Ultra320 SCSI ASIC with Retained Training
36520a44d4SMauro Carvalho Chehab   =============              =========================================
37520a44d4SMauro Carvalho Chehab
38520a44d4SMauro Carvalho Chehab   ========================== ===================================== ============
39520a44d4SMauro Carvalho Chehab   Ultra320 Adapters          Description                              ASIC
40520a44d4SMauro Carvalho Chehab   ========================== ===================================== ============
41520a44d4SMauro Carvalho Chehab   Adaptec SCSI Card 39320    Dual Channel 64-bit PCI-X 133MHz to   7902A4/7902B
42520a44d4SMauro Carvalho Chehab                              Ultra320 SCSI Card (one external
43520a44d4SMauro Carvalho Chehab                              68-pin, two internal 68-pin)
44520a44d4SMauro Carvalho Chehab   Adaptec SCSI Card 39320A   Dual Channel 64-bit PCI-X 133MHz to      7902B
45520a44d4SMauro Carvalho Chehab                              Ultra320 SCSI Card (one external
46520a44d4SMauro Carvalho Chehab                              68-pin, two internal 68-pin)
47520a44d4SMauro Carvalho Chehab   Adaptec SCSI Card 39320D   Dual Channel 64-bit PCI-X 133MHz to      7902A4
48520a44d4SMauro Carvalho Chehab                              Ultra320 SCSI Card (two external VHDC
49520a44d4SMauro Carvalho Chehab                              and one internal 68-pin)
50520a44d4SMauro Carvalho Chehab   Adaptec SCSI Card 39320D   Dual Channel 64-bit PCI-X 133MHz to      7902A4
51520a44d4SMauro Carvalho Chehab                              Ultra320 SCSI Card (two external VHDC
52520a44d4SMauro Carvalho Chehab                              and one internal 68-pin) based on the
53520a44d4SMauro Carvalho Chehab                              AIC-7902B ASIC
54520a44d4SMauro Carvalho Chehab   Adaptec SCSI Card 29320    Single Channel 64-bit PCI-X 133MHz to    7901A
55520a44d4SMauro Carvalho Chehab                              Ultra320 SCSI Card (one external
56520a44d4SMauro Carvalho Chehab                              68-pin, two internal 68-pin, one
57520a44d4SMauro Carvalho Chehab                              internal 50-pin)
58520a44d4SMauro Carvalho Chehab   Adaptec SCSI Card 29320A   Single Channel 64-bit PCI-X 133MHz to    7901B
59520a44d4SMauro Carvalho Chehab                              Ultra320 SCSI Card (one external
60520a44d4SMauro Carvalho Chehab                              68-pin, two internal 68-pin, one
61520a44d4SMauro Carvalho Chehab                              internal 50-pin)
62520a44d4SMauro Carvalho Chehab   Adaptec SCSI Card 29320LP  Single Channel 64-bit Low Profile        7901A
63520a44d4SMauro Carvalho Chehab                              PCI-X 133MHz to Ultra320 SCSI Card
64520a44d4SMauro Carvalho Chehab                              (One external VHDC, one internal
65520a44d4SMauro Carvalho Chehab                              68-pin)
66520a44d4SMauro Carvalho Chehab   Adaptec SCSI Card 29320ALP Single Channel 64-bit Low Profile        7901B
67520a44d4SMauro Carvalho Chehab                              PCI-X 133MHz to Ultra320 SCSI Card
68520a44d4SMauro Carvalho Chehab                              (One external VHDC, one internal
69520a44d4SMauro Carvalho Chehab                              68-pin)
70520a44d4SMauro Carvalho Chehab   ========================== ===================================== ============
71520a44d4SMauro Carvalho Chehab
72520a44d4SMauro Carvalho Chehab2. Version History
73520a44d4SMauro Carvalho Chehab==================
74520a44d4SMauro Carvalho Chehab
75520a44d4SMauro Carvalho Chehab
76520a44d4SMauro Carvalho Chehab * 3.0	  (December 1st, 2005)
77520a44d4SMauro Carvalho Chehab	- Updated driver to use SCSI transport class infrastructure
78520a44d4SMauro Carvalho Chehab	- Upported sequencer and core fixes from adaptec released
79520a44d4SMauro Carvalho Chehab	  version 2.0.15 of the driver.
80520a44d4SMauro Carvalho Chehab
81520a44d4SMauro Carvalho Chehab * 1.3.11 (July 11, 2003)
82520a44d4SMauro Carvalho Chehab        - Fix several deadlock issues.
83520a44d4SMauro Carvalho Chehab        - Add 29320ALP and 39320B Id's.
84520a44d4SMauro Carvalho Chehab
85520a44d4SMauro Carvalho Chehab * 1.3.10 (June 3rd, 2003)
86520a44d4SMauro Carvalho Chehab        - Align the SCB_TAG field on a 16byte boundary.  This avoids
87520a44d4SMauro Carvalho Chehab          SCB corruption on some PCI-33 busses.
88520a44d4SMauro Carvalho Chehab        - Correct non-zero luns on Rev B. hardware.
89520a44d4SMauro Carvalho Chehab        - Update for change in 2.5.X SCSI proc FS interface.
90520a44d4SMauro Carvalho Chehab        - When negotiation async via an 8bit WDTR message, send
91520a44d4SMauro Carvalho Chehab          an SDTR with an offset of 0 to be sure the target
92520a44d4SMauro Carvalho Chehab          knows we are async.  This works around a firmware defect
93520a44d4SMauro Carvalho Chehab          in the Quantum Atlas 10K.
94520a44d4SMauro Carvalho Chehab        - Implement controller suspend and resume.
95520a44d4SMauro Carvalho Chehab        - Clear PCI error state during driver attach so that we
96520a44d4SMauro Carvalho Chehab          don't disable memory mapped I/O due to a stray write
97520a44d4SMauro Carvalho Chehab          by some other driver probe that occurred before we
98520a44d4SMauro Carvalho Chehab          claimed the controller.
99520a44d4SMauro Carvalho Chehab
100520a44d4SMauro Carvalho Chehab * 1.3.9 (May 22nd, 2003)
101520a44d4SMauro Carvalho Chehab        - Fix compiler errors.
102520a44d4SMauro Carvalho Chehab        - Remove S/G splitting for segments that cross a 4GB boundary.
103520a44d4SMauro Carvalho Chehab          This is guaranteed not to happen in Linux.
104520a44d4SMauro Carvalho Chehab        - Add support for scsi_report_device_reset() found in
105520a44d4SMauro Carvalho Chehab          2.5.X kernels.
106520a44d4SMauro Carvalho Chehab        - Add 7901B support.
107520a44d4SMauro Carvalho Chehab        - Simplify handling of the packetized lun Rev A workaround.
108520a44d4SMauro Carvalho Chehab        - Correct and simplify handling of the ignore wide residue
109520a44d4SMauro Carvalho Chehab          message.  The previous code would fail to report a residual
110520a44d4SMauro Carvalho Chehab          if the transaction data length was even and we received
111520a44d4SMauro Carvalho Chehab          an IWR message.
112520a44d4SMauro Carvalho Chehab
113520a44d4SMauro Carvalho Chehab * 1.3.8 (April 29th, 2003)
114520a44d4SMauro Carvalho Chehab        - Fix types accessed via the command line interface code.
115520a44d4SMauro Carvalho Chehab        - Perform a few firmware optimizations.
116520a44d4SMauro Carvalho Chehab        - Fix "Unexpected PKT busfree" errors.
117520a44d4SMauro Carvalho Chehab        - Use a sequencer interrupt to notify the host of
118520a44d4SMauro Carvalho Chehab          commands with bad status.  We defer the notification
119520a44d4SMauro Carvalho Chehab          until there are no outstanding selections to ensure
120520a44d4SMauro Carvalho Chehab          that the host is interrupted for as short a time as
121520a44d4SMauro Carvalho Chehab          possible.
122520a44d4SMauro Carvalho Chehab        - Remove pre-2.2.X support.
123520a44d4SMauro Carvalho Chehab        - Add support for new 2.5.X interrupt API.
124520a44d4SMauro Carvalho Chehab        - Correct big-endian architecture support.
125520a44d4SMauro Carvalho Chehab
126520a44d4SMauro Carvalho Chehab * 1.3.7 (April 16th, 2003)
127520a44d4SMauro Carvalho Chehab        - Use del_timer_sync() to ensure that no timeouts
128520a44d4SMauro Carvalho Chehab          are pending during controller shutdown.
129520a44d4SMauro Carvalho Chehab        - For pre-2.5.X kernels, carefully adjust our segment
130520a44d4SMauro Carvalho Chehab          list size to avoid SCSI malloc pool fragmentation.
131520a44d4SMauro Carvalho Chehab        - Cleanup channel display in our /proc output.
132520a44d4SMauro Carvalho Chehab        - Workaround duplicate device entries in the mid-layer
133520a44d4SMauro Carvalho Chehab          device list during add-single-device.
134520a44d4SMauro Carvalho Chehab
135520a44d4SMauro Carvalho Chehab * 1.3.6 (March 28th, 2003)
136520a44d4SMauro Carvalho Chehab        - Correct a double free in the Domain Validation code.
137520a44d4SMauro Carvalho Chehab        - Correct a reference to free'ed memory during controller
138520a44d4SMauro Carvalho Chehab          shutdown.
139520a44d4SMauro Carvalho Chehab        - Reset the bus on an SE->LVD change.  This is required
140520a44d4SMauro Carvalho Chehab          to reset our transceivers.
141520a44d4SMauro Carvalho Chehab
142520a44d4SMauro Carvalho Chehab * 1.3.5 (March 24th, 2003)
143520a44d4SMauro Carvalho Chehab        - Fix a few register window mode bugs.
144520a44d4SMauro Carvalho Chehab        - Include read streaming in the PPR flags we display in
145520a44d4SMauro Carvalho Chehab          diagnostics as well as /proc.
146520a44d4SMauro Carvalho Chehab        - Add PCI hot plug support for 2.5.X kernels.
147520a44d4SMauro Carvalho Chehab        - Correct default precompensation value for RevA hardware.
148520a44d4SMauro Carvalho Chehab        - Fix Domain Validation thread shutdown.
149520a44d4SMauro Carvalho Chehab        - Add a firmware workaround to make the LED blink
150520a44d4SMauro Carvalho Chehab          brighter during packetized operations on the H2A4.
151520a44d4SMauro Carvalho Chehab        - Correct /proc display of user read streaming settings.
152520a44d4SMauro Carvalho Chehab        - Simplify driver locking by releasing the io_request_lock
153520a44d4SMauro Carvalho Chehab          upon driver entry from the mid-layer.
154520a44d4SMauro Carvalho Chehab        - Cleanup command line parsing and move much of this code
155520a44d4SMauro Carvalho Chehab          to aiclib.
156520a44d4SMauro Carvalho Chehab
157520a44d4SMauro Carvalho Chehab * 1.3.4 (February 28th, 2003)
158520a44d4SMauro Carvalho Chehab        - Correct a race condition in our error recovery handler.
159520a44d4SMauro Carvalho Chehab        - Allow Test Unit Ready commands to take a full 5 seconds
160520a44d4SMauro Carvalho Chehab          during Domain Validation.
161520a44d4SMauro Carvalho Chehab
162520a44d4SMauro Carvalho Chehab * 1.3.2 (February 19th, 2003)
163520a44d4SMauro Carvalho Chehab        - Correct a Rev B. regression due to the GEM318
164520a44d4SMauro Carvalho Chehab          compatibility fix included in 1.3.1.
165520a44d4SMauro Carvalho Chehab
166520a44d4SMauro Carvalho Chehab * 1.3.1 (February 11th, 2003)
167520a44d4SMauro Carvalho Chehab        - Add support for the 39320A.
168520a44d4SMauro Carvalho Chehab        - Improve recovery for certain PCI-X errors.
169520a44d4SMauro Carvalho Chehab        - Fix handling of LQ/DATA/LQ/DATA for the
170520a44d4SMauro Carvalho Chehab          same write transaction that can occur without
171520a44d4SMauro Carvalho Chehab          interveining training.
172520a44d4SMauro Carvalho Chehab        - Correct compatibility issues with the GEM318
173520a44d4SMauro Carvalho Chehab          enclosure services device.
174520a44d4SMauro Carvalho Chehab        - Correct data corruption issue that occurred under
175520a44d4SMauro Carvalho Chehab          high tag depth write loads.
176520a44d4SMauro Carvalho Chehab        - Adapt to a change in the 2.5.X daemonize() API.
177520a44d4SMauro Carvalho Chehab        - Correct a "Missing case in ahd_handle_scsiint" panic.
178520a44d4SMauro Carvalho Chehab
179520a44d4SMauro Carvalho Chehab * 1.3.0 (January 21st, 2003)
180520a44d4SMauro Carvalho Chehab        - Full regression testing for all U320 products completed.
181520a44d4SMauro Carvalho Chehab        - Added abort and target/lun reset error recovery handler and
182520a44d4SMauro Carvalho Chehab          interrupt coalescing.
183520a44d4SMauro Carvalho Chehab
184520a44d4SMauro Carvalho Chehab * 1.2.0 (November 14th, 2002)
185520a44d4SMauro Carvalho Chehab        - Added support for Domain Validation
186520a44d4SMauro Carvalho Chehab        - Add support for the Hewlett-Packard version of the 39320D
187520a44d4SMauro Carvalho Chehab          and AIC-7902 adapters.
188520a44d4SMauro Carvalho Chehab
189520a44d4SMauro Carvalho Chehab        Support for previous adapters has not been fully tested and should
190520a44d4SMauro Carvalho Chehab        only be used at the customer's own risk.
191520a44d4SMauro Carvalho Chehab
192520a44d4SMauro Carvalho Chehab * 1.1.1 (September 24th, 2002)
193520a44d4SMauro Carvalho Chehab        - Added support for the Linux 2.5.X kernel series
194520a44d4SMauro Carvalho Chehab
195520a44d4SMauro Carvalho Chehab * 1.1.0 (September 17th, 2002)
196520a44d4SMauro Carvalho Chehab        - Added support for four additional SCSI products:
197520a44d4SMauro Carvalho Chehab          ASC-39320, ASC-29320, ASC-29320LP, AIC-7901.
198520a44d4SMauro Carvalho Chehab
199520a44d4SMauro Carvalho Chehab * 1.0.0 (May 30th, 2002)
200520a44d4SMauro Carvalho Chehab        - Initial driver release.
201520a44d4SMauro Carvalho Chehab
202520a44d4SMauro Carvalho Chehab * 2.1. Software/Hardware Features
203520a44d4SMauro Carvalho Chehab        - Support for the SPI-4 "Ultra320" standard:
204520a44d4SMauro Carvalho Chehab          - 320MB/s transfer rates
205520a44d4SMauro Carvalho Chehab          - Packetized SCSI Protocol at 160MB/s and 320MB/s
206520a44d4SMauro Carvalho Chehab          - Quick Arbitration Selection (QAS)
207520a44d4SMauro Carvalho Chehab          - Retained Training Information (Rev B. ASIC only)
208520a44d4SMauro Carvalho Chehab        - Interrupt Coalescing
209520a44d4SMauro Carvalho Chehab        - Initiator Mode (target mode not currently
210520a44d4SMauro Carvalho Chehab          supported)
211520a44d4SMauro Carvalho Chehab        - Support for the PCI-X standard up to 133MHz
212520a44d4SMauro Carvalho Chehab        - Support for the PCI v2.2 standard
213520a44d4SMauro Carvalho Chehab        - Domain Validation
214520a44d4SMauro Carvalho Chehab
215520a44d4SMauro Carvalho Chehab * 2.2. Operating System Support:
216520a44d4SMauro Carvalho Chehab        - Redhat Linux 7.2, 7.3, 8.0, Advanced Server 2.1
217520a44d4SMauro Carvalho Chehab        - SuSE Linux 7.3, 8.0, 8.1, Enterprise Server 7
218520a44d4SMauro Carvalho Chehab        - only Intel and AMD x86 supported at this time
219520a44d4SMauro Carvalho Chehab        - >4GB memory configurations supported.
220520a44d4SMauro Carvalho Chehab
221520a44d4SMauro Carvalho Chehab     Refer to the User's Guide for more details on this.
222520a44d4SMauro Carvalho Chehab
223520a44d4SMauro Carvalho Chehab3. Command Line Options
224520a44d4SMauro Carvalho Chehab=======================
225520a44d4SMauro Carvalho Chehab
226520a44d4SMauro Carvalho Chehab    .. Warning::
227520a44d4SMauro Carvalho Chehab
228520a44d4SMauro Carvalho Chehab	         ALTERING OR ADDING THESE DRIVER PARAMETERS
229520a44d4SMauro Carvalho Chehab                 INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE.
230520a44d4SMauro Carvalho Chehab                 USE THEM WITH CAUTION.
231520a44d4SMauro Carvalho Chehab
232520a44d4SMauro Carvalho Chehab   Put a .conf file in the /etc/modprobe.d/ directory and add/edit a
233520a44d4SMauro Carvalho Chehab   line containing ``options aic79xx aic79xx=[command[,command...]]`` where
234520a44d4SMauro Carvalho Chehab   ``command`` is one or more of the following:
235520a44d4SMauro Carvalho Chehab
236520a44d4SMauro Carvalho Chehab
237520a44d4SMauro Carvalho Chehabverbose
238520a44d4SMauro Carvalho Chehab    :Definition: enable additional informative messages during driver operation.
239520a44d4SMauro Carvalho Chehab    :Possible Values: This option is a flag
240520a44d4SMauro Carvalho Chehab    :Default Value: disabled
241520a44d4SMauro Carvalho Chehab
242520a44d4SMauro Carvalho Chehabdebug:[value]
243520a44d4SMauro Carvalho Chehab    :Definition: Enables various levels of debugging information
244520a44d4SMauro Carvalho Chehab                 The bit definitions for the debugging mask can
245520a44d4SMauro Carvalho Chehab                 be found in drivers/scsi/aic7xxx/aic79xx.h under
246520a44d4SMauro Carvalho Chehab                 the "Debug" heading.
247520a44d4SMauro Carvalho Chehab    :Possible Values: 0x0000 = no debugging, 0xffff = full debugging
248520a44d4SMauro Carvalho Chehab    :Default Value: 0x0000
249520a44d4SMauro Carvalho Chehab
250520a44d4SMauro Carvalho Chehabno_reset
251520a44d4SMauro Carvalho Chehab    :Definition: Do not reset the bus during the initial probe
252520a44d4SMauro Carvalho Chehab                 phase
253520a44d4SMauro Carvalho Chehab    :Possible Values: This option is a flag
254520a44d4SMauro Carvalho Chehab    :Default Value: disabled
255520a44d4SMauro Carvalho Chehab
256520a44d4SMauro Carvalho Chehabextended
257520a44d4SMauro Carvalho Chehab    :Definition: Force extended translation on the controller
258520a44d4SMauro Carvalho Chehab    :Possible Values: This option is a flag
259520a44d4SMauro Carvalho Chehab    :Default Value: disabled
260520a44d4SMauro Carvalho Chehab
261520a44d4SMauro Carvalho Chehabperiodic_otag
262520a44d4SMauro Carvalho Chehab    :Definition: Send an ordered tag periodically to prevent
263520a44d4SMauro Carvalho Chehab                 tag starvation.  Needed for some older devices
264520a44d4SMauro Carvalho Chehab    :Possible Values: This option is a flag
265520a44d4SMauro Carvalho Chehab    :Default Value: disabled
266520a44d4SMauro Carvalho Chehab
267520a44d4SMauro Carvalho Chehabreverse_scan
268520a44d4SMauro Carvalho Chehab    :Definition: Probe the scsi bus in reverse order, starting with target 15
269520a44d4SMauro Carvalho Chehab    :Possible Values: This option is a flag
270520a44d4SMauro Carvalho Chehab    :Default Value: disabled
271520a44d4SMauro Carvalho Chehab
272520a44d4SMauro Carvalho Chehabglobal_tag_depth
273520a44d4SMauro Carvalho Chehab    :Definition: Global tag depth for all targets on all busses.
274520a44d4SMauro Carvalho Chehab		 This option sets the default tag depth which
275520a44d4SMauro Carvalho Chehab		 may be selectively overridden vi the tag_info
276520a44d4SMauro Carvalho Chehab		 option.
277520a44d4SMauro Carvalho Chehab
278520a44d4SMauro Carvalho Chehab    :Possible Values: 1 - 253
279520a44d4SMauro Carvalho Chehab    :Default Value: 32
280520a44d4SMauro Carvalho Chehab
281520a44d4SMauro Carvalho Chehabtag_info:{{value[,value...]}[,{value[,value...]}...]}
282520a44d4SMauro Carvalho Chehab    :Definition: Set the per-target tagged queue depth on a
283520a44d4SMauro Carvalho Chehab                 per controller basis.  Both controllers and targets
284520a44d4SMauro Carvalho Chehab                 may be omitted indicating that they should retain
285520a44d4SMauro Carvalho Chehab                 the default tag depth.
286520a44d4SMauro Carvalho Chehab
287520a44d4SMauro Carvalho Chehab    :Possible Values: 1 - 253
288520a44d4SMauro Carvalho Chehab    :Default Value: 32
289520a44d4SMauro Carvalho Chehab
290520a44d4SMauro Carvalho Chehab    Examples:
291520a44d4SMauro Carvalho Chehab
292520a44d4SMauro Carvalho Chehab
293520a44d4SMauro Carvalho Chehab	::
294520a44d4SMauro Carvalho Chehab
295520a44d4SMauro Carvalho Chehab	    tag_info:{{16,32,32,64,8,8,,32,32,32,32,32,32,32,32,32}
296520a44d4SMauro Carvalho Chehab
297520a44d4SMauro Carvalho Chehab	On Controller 0
298520a44d4SMauro Carvalho Chehab
299520a44d4SMauro Carvalho Chehab	    - specifies a tag depth of 16 for target 0
300520a44d4SMauro Carvalho Chehab	    - specifies a tag depth of 64 for target 3
301520a44d4SMauro Carvalho Chehab	    - specifies a tag depth of 8 for targets 4 and 5
302520a44d4SMauro Carvalho Chehab	    - leaves target 6 at the default
303520a44d4SMauro Carvalho Chehab	    - specifies a tag depth of 32 for targets 1,2,7-15
304520a44d4SMauro Carvalho Chehab
305520a44d4SMauro Carvalho Chehab	All other targets retain the default depth.
306520a44d4SMauro Carvalho Chehab
307520a44d4SMauro Carvalho Chehab	::
308520a44d4SMauro Carvalho Chehab
309520a44d4SMauro Carvalho Chehab	    tag_info:{{},{32,,32}}
310520a44d4SMauro Carvalho Chehab
311520a44d4SMauro Carvalho Chehab	On Controller 1
312520a44d4SMauro Carvalho Chehab
313520a44d4SMauro Carvalho Chehab	    - specifies a tag depth of 32 for targets 0 and 2
314520a44d4SMauro Carvalho Chehab
315520a44d4SMauro Carvalho Chehab	All other targets retain the default depth.
316520a44d4SMauro Carvalho Chehab
317520a44d4SMauro Carvalho Chehab
318520a44d4SMauro Carvalho Chehabrd_strm: {rd_strm_bitmask[,rd_strm_bitmask...]}
319520a44d4SMauro Carvalho Chehab    :Definition: Enable read streaming on a per target basis.
320520a44d4SMauro Carvalho Chehab		 The rd_strm_bitmask is a 16 bit hex value in which
321520a44d4SMauro Carvalho Chehab		 each bit represents a target.  Setting the target's
322520a44d4SMauro Carvalho Chehab		 bit to '1' enables read streaming for that
323520a44d4SMauro Carvalho Chehab		 target.  Controllers may be omitted indicating that
324520a44d4SMauro Carvalho Chehab		 they should retain the default read streaming setting.
325520a44d4SMauro Carvalho Chehab
326520a44d4SMauro Carvalho Chehab    Examples:
327520a44d4SMauro Carvalho Chehab
328520a44d4SMauro Carvalho Chehab	    ::
329520a44d4SMauro Carvalho Chehab
330520a44d4SMauro Carvalho Chehab		rd_strm:{0x0041}
331520a44d4SMauro Carvalho Chehab
332520a44d4SMauro Carvalho Chehab	    On Controller 0
333520a44d4SMauro Carvalho Chehab
334520a44d4SMauro Carvalho Chehab		- enables read streaming for targets 0 and 6.
335520a44d4SMauro Carvalho Chehab		- disables read streaming for targets 1-5,7-15.
336520a44d4SMauro Carvalho Chehab
337520a44d4SMauro Carvalho Chehab	    All other targets retain the default read
338520a44d4SMauro Carvalho Chehab	    streaming setting.
339520a44d4SMauro Carvalho Chehab
340520a44d4SMauro Carvalho Chehab	    ::
341520a44d4SMauro Carvalho Chehab
342520a44d4SMauro Carvalho Chehab		rd_strm:{0x0023,,0xFFFF}
343520a44d4SMauro Carvalho Chehab
344520a44d4SMauro Carvalho Chehab	    On Controller 0
345520a44d4SMauro Carvalho Chehab
346520a44d4SMauro Carvalho Chehab		- enables read streaming for targets 1,2, and 5.
347520a44d4SMauro Carvalho Chehab		- disables read streaming for targets 3,4,6-15.
348520a44d4SMauro Carvalho Chehab
349520a44d4SMauro Carvalho Chehab	    On Controller 2
350520a44d4SMauro Carvalho Chehab
351520a44d4SMauro Carvalho Chehab		- enables read streaming for all targets.
352520a44d4SMauro Carvalho Chehab
353520a44d4SMauro Carvalho Chehab	    All other targets retain the default read
354520a44d4SMauro Carvalho Chehab	    streaming setting.
355520a44d4SMauro Carvalho Chehab
356520a44d4SMauro Carvalho Chehab    :Possible Values: 0x0000 - 0xffff
357520a44d4SMauro Carvalho Chehab    :Default Value: 0x0000
358520a44d4SMauro Carvalho Chehab
359520a44d4SMauro Carvalho Chehabdv: {value[,value...]}
360520a44d4SMauro Carvalho Chehab    :Definition: Set Domain Validation Policy on a per-controller basis.
361520a44d4SMauro Carvalho Chehab                 Controllers may be omitted indicating that
362520a44d4SMauro Carvalho Chehab                 they should retain the default read streaming setting.
363520a44d4SMauro Carvalho Chehab
364520a44d4SMauro Carvalho Chehab     :Possible Values:
365520a44d4SMauro Carvalho Chehab
366520a44d4SMauro Carvalho Chehab		      ==== ===============================
367520a44d4SMauro Carvalho Chehab		       < 0 Use setting from serial EEPROM.
368520a44d4SMauro Carvalho Chehab                         0 Disable DV
369520a44d4SMauro Carvalho Chehab		       > 0 Enable DV
370520a44d4SMauro Carvalho Chehab		      ==== ===============================
371520a44d4SMauro Carvalho Chehab
372520a44d4SMauro Carvalho Chehab    :Default Value: DV Serial EEPROM configuration setting.
373520a44d4SMauro Carvalho Chehab
374520a44d4SMauro Carvalho Chehab    Example:
375520a44d4SMauro Carvalho Chehab
376520a44d4SMauro Carvalho Chehab	::
377520a44d4SMauro Carvalho Chehab
378520a44d4SMauro Carvalho Chehab	    dv:{-1,0,,1,1,0}
379520a44d4SMauro Carvalho Chehab
380520a44d4SMauro Carvalho Chehab	- On Controller 0 leave DV at its default setting.
381520a44d4SMauro Carvalho Chehab	- On Controller 1 disable DV.
382520a44d4SMauro Carvalho Chehab	- Skip configuration on Controller 2.
383520a44d4SMauro Carvalho Chehab	- On Controllers 3 and 4 enable DV.
384520a44d4SMauro Carvalho Chehab	- On Controller 5 disable DV.
385520a44d4SMauro Carvalho Chehab
386520a44d4SMauro Carvalho Chehabseltime:[value]
387520a44d4SMauro Carvalho Chehab    :Definition: Specifies the selection timeout value
388520a44d4SMauro Carvalho Chehab    :Possible Values: 0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms
389520a44d4SMauro Carvalho Chehab    :Default Value: 0
390520a44d4SMauro Carvalho Chehab
391520a44d4SMauro Carvalho Chehab.. Warning:
392520a44d4SMauro Carvalho Chehab
393520a44d4SMauro Carvalho Chehab    The following three options should only be changed at
394520a44d4SMauro Carvalho Chehab    the direction of a technical support representative.
395520a44d4SMauro Carvalho Chehab
396520a44d4SMauro Carvalho Chehab
397520a44d4SMauro Carvalho Chehabprecomp: {value[,value...]}
398520a44d4SMauro Carvalho Chehab    :Definition: Set IO Cell precompensation value on a per-controller basis.
399520a44d4SMauro Carvalho Chehab                 Controllers may be omitted indicating that
400520a44d4SMauro Carvalho Chehab                 they should retain the default precompensation setting.
401520a44d4SMauro Carvalho Chehab
402520a44d4SMauro Carvalho Chehab    :Possible Values: 0 - 7
403520a44d4SMauro Carvalho Chehab    :Default Value: Varies based on chip revision
404520a44d4SMauro Carvalho Chehab
405520a44d4SMauro Carvalho Chehab    Examples:
406520a44d4SMauro Carvalho Chehab
407520a44d4SMauro Carvalho Chehab	::
408520a44d4SMauro Carvalho Chehab
409520a44d4SMauro Carvalho Chehab	    precomp:{0x1}
410520a44d4SMauro Carvalho Chehab
411520a44d4SMauro Carvalho Chehab	On Controller 0 set precompensation to 1.
412520a44d4SMauro Carvalho Chehab
413520a44d4SMauro Carvalho Chehab	::
414520a44d4SMauro Carvalho Chehab
415520a44d4SMauro Carvalho Chehab	    precomp:{1,,7}
416520a44d4SMauro Carvalho Chehab
417520a44d4SMauro Carvalho Chehab	- On Controller 0 set precompensation to 1.
418520a44d4SMauro Carvalho Chehab	- On Controller 2 set precompensation to 8.
419520a44d4SMauro Carvalho Chehab
420520a44d4SMauro Carvalho Chehabslewrate: {value[,value...]}
421520a44d4SMauro Carvalho Chehab    :Definition: Set IO Cell slew rate on a per-controller basis.
422520a44d4SMauro Carvalho Chehab                      Controllers may be omitted indicating that
423520a44d4SMauro Carvalho Chehab                      they should retain the default slew rate setting.
424520a44d4SMauro Carvalho Chehab
425520a44d4SMauro Carvalho Chehab    :Possible Values: 0 - 15
426520a44d4SMauro Carvalho Chehab    :Default Value: Varies based on chip revision
427520a44d4SMauro Carvalho Chehab
428520a44d4SMauro Carvalho Chehab    Examples:
429520a44d4SMauro Carvalho Chehab
430520a44d4SMauro Carvalho Chehab	::
431520a44d4SMauro Carvalho Chehab
432520a44d4SMauro Carvalho Chehab	    slewrate:{0x1}
433520a44d4SMauro Carvalho Chehab
434520a44d4SMauro Carvalho Chehab	- On Controller 0 set slew rate to 1.
435520a44d4SMauro Carvalho Chehab
436520a44d4SMauro Carvalho Chehab	::
437520a44d4SMauro Carvalho Chehab
438520a44d4SMauro Carvalho Chehab	    slewrate :{1,,8}
439520a44d4SMauro Carvalho Chehab
440520a44d4SMauro Carvalho Chehab	- On Controller 0 set slew rate to 1.
441520a44d4SMauro Carvalho Chehab	- On Controller 2 set slew rate to 8.
442520a44d4SMauro Carvalho Chehab
443520a44d4SMauro Carvalho Chehabamplitude: {value[,value...]}
444520a44d4SMauro Carvalho Chehab    :Definition: Set IO Cell signal amplitude on a per-controller basis.
445520a44d4SMauro Carvalho Chehab                 Controllers may be omitted indicating that
446520a44d4SMauro Carvalho Chehab                 they should retain the default read streaming setting.
447520a44d4SMauro Carvalho Chehab
448520a44d4SMauro Carvalho Chehab    :Possible Values: 1 - 7
449520a44d4SMauro Carvalho Chehab    :Default Value: Varies based on chip revision
450520a44d4SMauro Carvalho Chehab
451520a44d4SMauro Carvalho Chehab    Examples:
452520a44d4SMauro Carvalho Chehab
453520a44d4SMauro Carvalho Chehab    ::
454520a44d4SMauro Carvalho Chehab
455520a44d4SMauro Carvalho Chehab	amplitude:{0x1}
456520a44d4SMauro Carvalho Chehab
457520a44d4SMauro Carvalho Chehab    On Controller 0 set amplitude to 1.
458520a44d4SMauro Carvalho Chehab
459520a44d4SMauro Carvalho Chehab    ::
460520a44d4SMauro Carvalho Chehab
461520a44d4SMauro Carvalho Chehab	amplitude :{1,,7}
462520a44d4SMauro Carvalho Chehab
463520a44d4SMauro Carvalho Chehab    - On Controller 0 set amplitude to 1.
464520a44d4SMauro Carvalho Chehab    - On Controller 2 set amplitude to 7.
465520a44d4SMauro Carvalho Chehab
466520a44d4SMauro Carvalho ChehabExample::
467520a44d4SMauro Carvalho Chehab
468520a44d4SMauro Carvalho Chehab    options aic79xx aic79xx=verbose,rd_strm:{{0x0041}}
469520a44d4SMauro Carvalho Chehab
470520a44d4SMauro Carvalho Chehabenables verbose output in the driver and turns read streaming on
471520a44d4SMauro Carvalho Chehabfor targets 0 and 6 of Controller 0.
472520a44d4SMauro Carvalho Chehab
473520a44d4SMauro Carvalho Chehab4. Additional Notes
474520a44d4SMauro Carvalho Chehab===================
475520a44d4SMauro Carvalho Chehab
476520a44d4SMauro Carvalho Chehab4.1. Known/Unresolved or FYI Issues
477520a44d4SMauro Carvalho Chehab-----------------------------------
478520a44d4SMauro Carvalho Chehab
479520a44d4SMauro Carvalho Chehab        * Under SuSE Linux Enterprise 7, the driver may fail to operate
480520a44d4SMauro Carvalho Chehab          correctly due to a problem with PCI interrupt routing in the
481520a44d4SMauro Carvalho Chehab          Linux kernel.  Please contact SuSE for an updated Linux
482520a44d4SMauro Carvalho Chehab          kernel.
483520a44d4SMauro Carvalho Chehab
484520a44d4SMauro Carvalho Chehab4.2. Third-Party Compatibility Issues
485520a44d4SMauro Carvalho Chehab-------------------------------------
486520a44d4SMauro Carvalho Chehab
487520a44d4SMauro Carvalho Chehab        * Adaptec only supports Ultra320 hard drives running
488520a44d4SMauro Carvalho Chehab          the latest firmware available. Please check with
489520a44d4SMauro Carvalho Chehab          your hard drive manufacturer to ensure you have the
490520a44d4SMauro Carvalho Chehab          latest version.
491520a44d4SMauro Carvalho Chehab
492520a44d4SMauro Carvalho Chehab4.3. Operating System or Technology Limitations
493520a44d4SMauro Carvalho Chehab-----------------------------------------------
494520a44d4SMauro Carvalho Chehab
495520a44d4SMauro Carvalho Chehab        * PCI Hot Plug is untested and may cause the operating system
496520a44d4SMauro Carvalho Chehab          to stop responding.
497520a44d4SMauro Carvalho Chehab        * Luns that are not numbered contiguously starting with 0 might not
498520a44d4SMauro Carvalho Chehab          be automatically probed during system startup.  This is a limitation
499520a44d4SMauro Carvalho Chehab          of the OS.  Please contact your Linux vendor for instructions on
500520a44d4SMauro Carvalho Chehab          manually probing non-contiguous luns.
501520a44d4SMauro Carvalho Chehab        * Using the Driver Update Disk version of this package during OS
502520a44d4SMauro Carvalho Chehab          installation under RedHat might result in two versions of this
503520a44d4SMauro Carvalho Chehab          driver being installed into the system module directory.  This
504520a44d4SMauro Carvalho Chehab          might cause problems with the /sbin/mkinitrd program and/or
505520a44d4SMauro Carvalho Chehab          other RPM packages that try to install system modules.  The best
506520a44d4SMauro Carvalho Chehab          way to correct this once the system is running is to install
507520a44d4SMauro Carvalho Chehab          the latest RPM package version of this driver, available from
508520a44d4SMauro Carvalho Chehab          http://www.adaptec.com.
509520a44d4SMauro Carvalho Chehab
510520a44d4SMauro Carvalho Chehab
511520a44d4SMauro Carvalho Chehab5. Adaptec Customer Support
512520a44d4SMauro Carvalho Chehab===========================
513520a44d4SMauro Carvalho Chehab
514520a44d4SMauro Carvalho Chehab   A Technical Support Identification (TSID) Number is required for
515520a44d4SMauro Carvalho Chehab   Adaptec technical support.
516520a44d4SMauro Carvalho Chehab
517520a44d4SMauro Carvalho Chehab    - The 12-digit TSID can be found on the white barcode-type label
518520a44d4SMauro Carvalho Chehab      included inside the box with your product.  The TSID helps us
519520a44d4SMauro Carvalho Chehab      provide more efficient service by accurately identifying your
520520a44d4SMauro Carvalho Chehab      product and support status.
521520a44d4SMauro Carvalho Chehab
522520a44d4SMauro Carvalho Chehab   Support Options
523520a44d4SMauro Carvalho Chehab    - Search the Adaptec Support Knowledgebase (ASK) at
524520a44d4SMauro Carvalho Chehab      http://ask.adaptec.com for articles, troubleshooting tips, and
525520a44d4SMauro Carvalho Chehab      frequently asked questions about your product.
526520a44d4SMauro Carvalho Chehab    - For support via Email, submit your question to Adaptec's
527520a44d4SMauro Carvalho Chehab      Technical Support Specialists at http://ask.adaptec.com/.
528520a44d4SMauro Carvalho Chehab
529520a44d4SMauro Carvalho Chehab   North America
530520a44d4SMauro Carvalho Chehab    - Visit our Web site at http://www.adaptec.com/.
531520a44d4SMauro Carvalho Chehab    - For information about Adaptec's support options, call
532520a44d4SMauro Carvalho Chehab      408-957-2550, 24 hours a day, 7 days a week.
533520a44d4SMauro Carvalho Chehab    - To speak with a Technical Support Specialist,
534520a44d4SMauro Carvalho Chehab
535520a44d4SMauro Carvalho Chehab      * For hardware products, call 408-934-7274,
536520a44d4SMauro Carvalho Chehab        Monday to Friday, 3:00 am to 5:00 pm, PDT.
537520a44d4SMauro Carvalho Chehab      * For RAID and Fibre Channel products, call 321-207-2000,
538520a44d4SMauro Carvalho Chehab        Monday to Friday, 3:00 am to 5:00 pm, PDT.
539520a44d4SMauro Carvalho Chehab
540520a44d4SMauro Carvalho Chehab      To expedite your service, have your computer with you.
541520a44d4SMauro Carvalho Chehab    - To order Adaptec products, including accessories and cables,
542520a44d4SMauro Carvalho Chehab      call 408-957-7274.  To order cables online go to
543520a44d4SMauro Carvalho Chehab      http://www.adaptec.com/buy-cables/.
544520a44d4SMauro Carvalho Chehab
545520a44d4SMauro Carvalho Chehab   Europe
546520a44d4SMauro Carvalho Chehab    - Visit our Web site at http://www.adaptec.com/en-US/_common/world_index.
547520a44d4SMauro Carvalho Chehab    - To speak with a Technical Support Specialist, call, or email,
548520a44d4SMauro Carvalho Chehab
549520a44d4SMauro Carvalho Chehab      * German:  +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET,
550520a44d4SMauro Carvalho Chehab        http://ask-de.adaptec.com/.
551520a44d4SMauro Carvalho Chehab      * French:  +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET,
552520a44d4SMauro Carvalho Chehab	http://ask-fr.adaptec.com/.
553520a44d4SMauro Carvalho Chehab      * English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT,
554520a44d4SMauro Carvalho Chehab	http://ask.adaptec.com/.
555520a44d4SMauro Carvalho Chehab
556520a44d4SMauro Carvalho Chehab    - You can order Adaptec cables online at
557520a44d4SMauro Carvalho Chehab      http://www.adaptec.com/buy-cables/.
558520a44d4SMauro Carvalho Chehab
559520a44d4SMauro Carvalho Chehab   Japan
560520a44d4SMauro Carvalho Chehab    - Visit our web site at http://www.adaptec.co.jp/.
561520a44d4SMauro Carvalho Chehab    - To speak with a Technical Support Specialist, call
562520a44d4SMauro Carvalho Chehab      +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m.,
563520a44d4SMauro Carvalho Chehab      1:00 p.m. to 6:00 p.m.
564520a44d4SMauro Carvalho Chehab
565520a44d4SMauro Carvalho ChehabCopyright |copy| 2003 Adaptec Inc. 691 S. Milpitas Blvd., Milpitas CA 95035 USA.
566520a44d4SMauro Carvalho ChehabAll rights reserved.
567520a44d4SMauro Carvalho Chehab
568520a44d4SMauro Carvalho ChehabYou are permitted to redistribute, use and modify this README file in whole
569520a44d4SMauro Carvalho Chehabor in part in conjunction with redistribution of software governed by the
570520a44d4SMauro Carvalho ChehabGeneral Public License, provided that the following conditions are met:
571520a44d4SMauro Carvalho Chehab
572520a44d4SMauro Carvalho Chehab1. Redistributions of README file must retain the above copyright
573520a44d4SMauro Carvalho Chehab   notice, this list of conditions, and the following disclaimer,
574520a44d4SMauro Carvalho Chehab   without modification.
575520a44d4SMauro Carvalho Chehab2. The name of the author may not be used to endorse or promote products
576520a44d4SMauro Carvalho Chehab   derived from this software without specific prior written permission.
577520a44d4SMauro Carvalho Chehab3. Modifications or new contributions must be attributed in a copyright
578520a44d4SMauro Carvalho Chehab   notice identifying the author ("Contributor") and added below the
579520a44d4SMauro Carvalho Chehab   original copyright notice. The copyright notice is for purposes of
580520a44d4SMauro Carvalho Chehab   identifying contributors and should not be deemed as permission to alter
581520a44d4SMauro Carvalho Chehab   the permissions given by Adaptec.
582520a44d4SMauro Carvalho Chehab
583520a44d4SMauro Carvalho ChehabTHIS README FILE IS PROVIDED BY ADAPTEC AND CONTRIBUTORS ``AS IS`` AND
584520a44d4SMauro Carvalho ChehabANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ANY
585520a44d4SMauro Carvalho ChehabWARRANTIES OF NON-INFRINGEMENT OR THE IMPLIED WARRANTIES OF MERCHANTABILITY
586520a44d4SMauro Carvalho ChehabAND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
587520a44d4SMauro Carvalho ChehabADAPTEC OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
588520a44d4SMauro Carvalho ChehabSPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
589520a44d4SMauro Carvalho ChehabTO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
590520a44d4SMauro Carvalho ChehabPROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
591520a44d4SMauro Carvalho ChehabLIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
592520a44d4SMauro Carvalho ChehabNEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS README
593520a44d4SMauro Carvalho ChehabFILE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
594