14d2e26a3SMauro Carvalho Chehab============ 24d2e26a3SMauro Carvalho ChehabCPU Features 34d2e26a3SMauro Carvalho Chehab============ 44d2e26a3SMauro Carvalho Chehab 54d2e26a3SMauro Carvalho ChehabHollis Blanchard <hollis@austin.ibm.com> 64d2e26a3SMauro Carvalho Chehab5 Jun 2002 74d2e26a3SMauro Carvalho Chehab 84d2e26a3SMauro Carvalho ChehabThis document describes the system (including self-modifying code) used in the 94d2e26a3SMauro Carvalho ChehabPPC Linux kernel to support a variety of PowerPC CPUs without requiring 104d2e26a3SMauro Carvalho Chehabcompile-time selection. 114d2e26a3SMauro Carvalho Chehab 124d2e26a3SMauro Carvalho ChehabEarly in the boot process the ppc32 kernel detects the current CPU type and 134d2e26a3SMauro Carvalho Chehabchooses a set of features accordingly. Some examples include Altivec support, 144d2e26a3SMauro Carvalho Chehabsplit instruction and data caches, and if the CPU supports the DOZE and NAP 154d2e26a3SMauro Carvalho Chehabsleep modes. 164d2e26a3SMauro Carvalho Chehab 174d2e26a3SMauro Carvalho ChehabDetection of the feature set is simple. A list of processors can be found in 184d2e26a3SMauro Carvalho Chehabarch/powerpc/kernel/cputable.c. The PVR register is masked and compared with 194d2e26a3SMauro Carvalho Chehabeach value in the list. If a match is found, the cpu_features of cur_cpu_spec 204d2e26a3SMauro Carvalho Chehabis assigned to the feature bitmask for this processor and a __setup_cpu 214d2e26a3SMauro Carvalho Chehabfunction is called. 224d2e26a3SMauro Carvalho Chehab 234d2e26a3SMauro Carvalho ChehabC code may test 'cur_cpu_spec[smp_processor_id()]->cpu_features' for a 244d2e26a3SMauro Carvalho Chehabparticular feature bit. This is done in quite a few places, for example 254d2e26a3SMauro Carvalho Chehabin ppc_setup_l2cr(). 264d2e26a3SMauro Carvalho Chehab 274d2e26a3SMauro Carvalho ChehabImplementing cpufeatures in assembly is a little more involved. There are 284d2e26a3SMauro Carvalho Chehabseveral paths that are performance-critical and would suffer if an array 294d2e26a3SMauro Carvalho Chehabindex, structure dereference, and conditional branch were added. To avoid the 304d2e26a3SMauro Carvalho Chehabperformance penalty but still allow for runtime (rather than compile-time) CPU 314d2e26a3SMauro Carvalho Chehabselection, unused code is replaced by 'nop' instructions. This nop'ing is 324d2e26a3SMauro Carvalho Chehabbased on CPU 0's capabilities, so a multi-processor system with non-identical 334d2e26a3SMauro Carvalho Chehabprocessors will not work (but such a system would likely have other problems 344d2e26a3SMauro Carvalho Chehabanyways). 354d2e26a3SMauro Carvalho Chehab 364d2e26a3SMauro Carvalho ChehabAfter detecting the processor type, the kernel patches out sections of code 374d2e26a3SMauro Carvalho Chehabthat shouldn't be used by writing nop's over it. Using cpufeatures requires 384d2e26a3SMauro Carvalho Chehabjust 2 macros (found in arch/powerpc/include/asm/cputable.h), as seen in head.S 394d2e26a3SMauro Carvalho Chehabtransfer_to_handler:: 404d2e26a3SMauro Carvalho Chehab 414d2e26a3SMauro Carvalho Chehab #ifdef CONFIG_ALTIVEC 424d2e26a3SMauro Carvalho Chehab BEGIN_FTR_SECTION 434d2e26a3SMauro Carvalho Chehab mfspr r22,SPRN_VRSAVE /* if G4, save vrsave register value */ 444d2e26a3SMauro Carvalho Chehab stw r22,THREAD_VRSAVE(r23) 454d2e26a3SMauro Carvalho Chehab END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) 464d2e26a3SMauro Carvalho Chehab #endif /* CONFIG_ALTIVEC */ 474d2e26a3SMauro Carvalho Chehab 484d2e26a3SMauro Carvalho ChehabIf CPU 0 supports Altivec, the code is left untouched. If it doesn't, both 494d2e26a3SMauro Carvalho Chehabinstructions are replaced with nop's. 504d2e26a3SMauro Carvalho Chehab 514d2e26a3SMauro Carvalho ChehabThe END_FTR_SECTION macro has two simpler variations: END_FTR_SECTION_IFSET 524d2e26a3SMauro Carvalho Chehaband END_FTR_SECTION_IFCLR. These simply test if a flag is set (in 534d2e26a3SMauro Carvalho Chehabcur_cpu_spec[0]->cpu_features) or is cleared, respectively. These two macros 544d2e26a3SMauro Carvalho Chehabshould be used in the majority of cases. 554d2e26a3SMauro Carvalho Chehab 564d2e26a3SMauro Carvalho ChehabThe END_FTR_SECTION macros are implemented by storing information about this 574d2e26a3SMauro Carvalho Chehabcode in the '__ftr_fixup' ELF section. When do_cpu_ftr_fixups 584d2e26a3SMauro Carvalho Chehab(arch/powerpc/kernel/misc.S) is invoked, it will iterate over the records in 594d2e26a3SMauro Carvalho Chehab__ftr_fixup, and if the required feature is not present it will loop writing 604d2e26a3SMauro Carvalho Chehabnop's from each BEGIN_FTR_SECTION to END_FTR_SECTION. 61