1============ 2Architecture 3============ 4 5This document describes the **Distributed Switch Architecture (DSA)** subsystem 6design principles, limitations, interactions with other subsystems, and how to 7develop drivers for this subsystem as well as a TODO for developers interested 8in joining the effort. 9 10Design principles 11================= 12 13The Distributed Switch Architecture is a subsystem which was primarily designed 14to support Marvell Ethernet switches (MV88E6xxx, a.k.a Linkstreet product line) 15using Linux, but has since evolved to support other vendors as well. 16 17The original philosophy behind this design was to be able to use unmodified 18Linux tools such as bridge, iproute2, ifconfig to work transparently whether 19they configured/queried a switch port network device or a regular network 20device. 21 22An Ethernet switch is typically comprised of multiple front-panel ports, and one 23or more CPU or management port. The DSA subsystem currently relies on the 24presence of a management port connected to an Ethernet controller capable of 25receiving Ethernet frames from the switch. This is a very common setup for all 26kinds of Ethernet switches found in Small Home and Office products: routers, 27gateways, or even top-of-the rack switches. This host Ethernet controller will 28be later referred to as "master" and "cpu" in DSA terminology and code. 29 30The D in DSA stands for Distributed, because the subsystem has been designed 31with the ability to configure and manage cascaded switches on top of each other 32using upstream and downstream Ethernet links between switches. These specific 33ports are referred to as "dsa" ports in DSA terminology and code. A collection 34of multiple switches connected to each other is called a "switch tree". 35 36For each front-panel port, DSA will create specialized network devices which are 37used as controlling and data-flowing endpoints for use by the Linux networking 38stack. These specialized network interfaces are referred to as "slave" network 39interfaces in DSA terminology and code. 40 41The ideal case for using DSA is when an Ethernet switch supports a "switch tag" 42which is a hardware feature making the switch insert a specific tag for each 43Ethernet frames it received to/from specific ports to help the management 44interface figure out: 45 46- what port is this frame coming from 47- what was the reason why this frame got forwarded 48- how to send CPU originated traffic to specific ports 49 50The subsystem does support switches not capable of inserting/stripping tags, but 51the features might be slightly limited in that case (traffic separation relies 52on Port-based VLAN IDs). 53 54Note that DSA does not currently create network interfaces for the "cpu" and 55"dsa" ports because: 56 57- the "cpu" port is the Ethernet switch facing side of the management 58 controller, and as such, would create a duplication of feature, since you 59 would get two interfaces for the same conduit: master netdev, and "cpu" netdev 60 61- the "dsa" port(s) are just conduits between two or more switches, and as such 62 cannot really be used as proper network interfaces either, only the 63 downstream, or the top-most upstream interface makes sense with that model 64 65Switch tagging protocols 66------------------------ 67 68DSA supports many vendor-specific tagging protocols, one software-defined 69tagging protocol, and a tag-less mode as well (``DSA_TAG_PROTO_NONE``). 70 71The exact format of the tag protocol is vendor specific, but in general, they 72all contain something which: 73 74- identifies which port the Ethernet frame came from/should be sent to 75- provides a reason why this frame was forwarded to the management interface 76 77All tagging protocols are in ``net/dsa/tag_*.c`` files and implement the 78methods of the ``struct dsa_device_ops`` structure, which are detailed below. 79 80Tagging protocols generally fall in one of three categories: 81 821. The switch-specific frame header is located before the Ethernet header, 83 shifting to the right (from the perspective of the DSA master's frame 84 parser) the MAC DA, MAC SA, EtherType and the entire L2 payload. 852. The switch-specific frame header is located before the EtherType, keeping 86 the MAC DA and MAC SA in place from the DSA master's perspective, but 87 shifting the 'real' EtherType and L2 payload to the right. 883. The switch-specific frame header is located at the tail of the packet, 89 keeping all frame headers in place and not altering the view of the packet 90 that the DSA master's frame parser has. 91 92A tagging protocol may tag all packets with switch tags of the same length, or 93the tag length might vary (for example packets with PTP timestamps might 94require an extended switch tag, or there might be one tag length on TX and a 95different one on RX). Either way, the tagging protocol driver must populate the 96``struct dsa_device_ops::overhead`` with the length in octets of the longest 97switch frame header. The DSA framework will automatically adjust the MTU of the 98master interface to accomodate for this extra size in order for DSA user ports 99to support the standard MTU (L2 payload length) of 1500 octets. The ``overhead`` 100is also used to request from the network stack, on a best-effort basis, the 101allocation of packets with a ``needed_headroom`` or ``needed_tailroom`` 102sufficient such that the act of pushing the switch tag on transmission of a 103packet does not cause it to reallocate due to lack of memory. 104 105Even though applications are not expected to parse DSA-specific frame headers, 106the format on the wire of the tagging protocol represents an Application Binary 107Interface exposed by the kernel towards user space, for decoders such as 108``libpcap``. The tagging protocol driver must populate the ``proto`` member of 109``struct dsa_device_ops`` with a value that uniquely describes the 110characteristics of the interaction required between the switch hardware and the 111data path driver: the offset of each bit field within the frame header and any 112stateful processing required to deal with the frames (as may be required for 113PTP timestamping). 114 115From the perspective of the network stack, all switches within the same DSA 116switch tree use the same tagging protocol. In case of a packet transiting a 117fabric with more than one switch, the switch-specific frame header is inserted 118by the first switch in the fabric that the packet was received on. This header 119typically contains information regarding its type (whether it is a control 120frame that must be trapped to the CPU, or a data frame to be forwarded). 121Control frames should be decapsulated only by the software data path, whereas 122data frames might also be autonomously forwarded towards other user ports of 123other switches from the same fabric, and in this case, the outermost switch 124ports must decapsulate the packet. 125 126Note that in certain cases, it might be the case that the tagging format used 127by a leaf switch (not connected directly to the CPU) to not be the same as what 128the network stack sees. This can be seen with Marvell switch trees, where the 129CPU port can be configured to use either the DSA or the Ethertype DSA (EDSA) 130format, but the DSA links are configured to use the shorter (without Ethertype) 131DSA frame header, in order to reduce the autonomous packet forwarding overhead. 132It still remains the case that, if the DSA switch tree is configured for the 133EDSA tagging protocol, the operating system sees EDSA-tagged packets from the 134leaf switches that tagged them with the shorter DSA header. This can be done 135because the Marvell switch connected directly to the CPU is configured to 136perform tag translation between DSA and EDSA (which is simply the operation of 137adding or removing the ``ETH_P_EDSA`` EtherType and some padding octets). 138 139It is possible to construct cascaded setups of DSA switches even if their 140tagging protocols are not compatible with one another. In this case, there are 141no DSA links in this fabric, and each switch constitutes a disjoint DSA switch 142tree. The DSA links are viewed as simply a pair of a DSA master (the out-facing 143port of the upstream DSA switch) and a CPU port (the in-facing port of the 144downstream DSA switch). 145 146The tagging protocol of the attached DSA switch tree can be viewed through the 147``dsa/tagging`` sysfs attribute of the DSA master:: 148 149 cat /sys/class/net/eth0/dsa/tagging 150 151If the hardware and driver are capable, the tagging protocol of the DSA switch 152tree can be changed at runtime. This is done by writing the new tagging 153protocol name to the same sysfs device attribute as above (the DSA master and 154all attached switch ports must be down while doing this). 155 156It is desirable that all tagging protocols are testable with the ``dsa_loop`` 157mockup driver, which can be attached to any network interface. The goal is that 158any network interface should be capable of transmitting the same packet in the 159same way, and the tagger should decode the same received packet in the same way 160regardless of the driver used for the switch control path, and the driver used 161for the DSA master. 162 163The transmission of a packet goes through the tagger's ``xmit`` function. 164The passed ``struct sk_buff *skb`` has ``skb->data`` pointing at 165``skb_mac_header(skb)``, i.e. at the destination MAC address, and the passed 166``struct net_device *dev`` represents the virtual DSA user network interface 167whose hardware counterpart the packet must be steered to (i.e. ``swp0``). 168The job of this method is to prepare the skb in a way that the switch will 169understand what egress port the packet is for (and not deliver it towards other 170ports). Typically this is fulfilled by pushing a frame header. Checking for 171insufficient size in the skb headroom or tailroom is unnecessary provided that 172the ``overhead`` and ``tail_tag`` properties were filled out properly, because 173DSA ensures there is enough space before calling this method. 174 175The reception of a packet goes through the tagger's ``rcv`` function. The 176passed ``struct sk_buff *skb`` has ``skb->data`` pointing at 177``skb_mac_header(skb) + ETH_ALEN`` octets, i.e. to where the first octet after 178the EtherType would have been, were this frame not tagged. The role of this 179method is to consume the frame header, adjust ``skb->data`` to really point at 180the first octet after the EtherType, and to change ``skb->dev`` to point to the 181virtual DSA user network interface corresponding to the physical front-facing 182switch port that the packet was received on. 183 184Since tagging protocols in category 1 and 2 break software (and most often also 185hardware) packet dissection on the DSA master, features such as RPS (Receive 186Packet Steering) on the DSA master would be broken. The DSA framework deals 187with this by hooking into the flow dissector and shifting the offset at which 188the IP header is to be found in the tagged frame as seen by the DSA master. 189This behavior is automatic based on the ``overhead`` value of the tagging 190protocol. If not all packets are of equal size, the tagger can implement the 191``flow_dissect`` method of the ``struct dsa_device_ops`` and override this 192default behavior by specifying the correct offset incurred by each individual 193RX packet. Tail taggers do not cause issues to the flow dissector. 194 195Due to various reasons (most common being category 1 taggers being associated 196with DSA-unaware masters, mangling what the master perceives as MAC DA), the 197tagging protocol may require the DSA master to operate in promiscuous mode, to 198receive all frames regardless of the value of the MAC DA. This can be done by 199setting the ``promisc_on_master`` property of the ``struct dsa_device_ops``. 200Note that this assumes a DSA-unaware master driver, which is the norm. 201 202Hardware manufacturers are strongly discouraged to do this, but some tagging 203protocols might not provide source port information on RX for all packets, but 204e.g. only for control traffic (link-local PDUs). In this case, by implementing 205the ``filter`` method of ``struct dsa_device_ops``, the tagger might select 206which packets are to be redirected on RX towards the virtual DSA user network 207interfaces, and which are to be left in the DSA master's RX data path. 208 209It might also happen (although silicon vendors are strongly discouraged to 210produce hardware like this) that a tagging protocol splits the switch-specific 211information into a header portion and a tail portion, therefore not falling 212cleanly into any of the above 3 categories. DSA does not support this 213configuration. 214 215Master network devices 216---------------------- 217 218Master network devices are regular, unmodified Linux network device drivers for 219the CPU/management Ethernet interface. Such a driver might occasionally need to 220know whether DSA is enabled (e.g.: to enable/disable specific offload features), 221but the DSA subsystem has been proven to work with industry standard drivers: 222``e1000e,`` ``mv643xx_eth`` etc. without having to introduce modifications to these 223drivers. Such network devices are also often referred to as conduit network 224devices since they act as a pipe between the host processor and the hardware 225Ethernet switch. 226 227Networking stack hooks 228---------------------- 229 230When a master netdev is used with DSA, a small hook is placed in the 231networking stack is in order to have the DSA subsystem process the Ethernet 232switch specific tagging protocol. DSA accomplishes this by registering a 233specific (and fake) Ethernet type (later becoming ``skb->protocol``) with the 234networking stack, this is also known as a ``ptype`` or ``packet_type``. A typical 235Ethernet Frame receive sequence looks like this: 236 237Master network device (e.g.: e1000e): 238 2391. Receive interrupt fires: 240 241 - receive function is invoked 242 - basic packet processing is done: getting length, status etc. 243 - packet is prepared to be processed by the Ethernet layer by calling 244 ``eth_type_trans`` 245 2462. net/ethernet/eth.c:: 247 248 eth_type_trans(skb, dev) 249 if (dev->dsa_ptr != NULL) 250 -> skb->protocol = ETH_P_XDSA 251 2523. drivers/net/ethernet/\*:: 253 254 netif_receive_skb(skb) 255 -> iterate over registered packet_type 256 -> invoke handler for ETH_P_XDSA, calls dsa_switch_rcv() 257 2584. net/dsa/dsa.c:: 259 260 -> dsa_switch_rcv() 261 -> invoke switch tag specific protocol handler in 'net/dsa/tag_*.c' 262 2635. net/dsa/tag_*.c: 264 265 - inspect and strip switch tag protocol to determine originating port 266 - locate per-port network device 267 - invoke ``eth_type_trans()`` with the DSA slave network device 268 - invoked ``netif_receive_skb()`` 269 270Past this point, the DSA slave network devices get delivered regular Ethernet 271frames that can be processed by the networking stack. 272 273Slave network devices 274--------------------- 275 276Slave network devices created by DSA are stacked on top of their master network 277device, each of these network interfaces will be responsible for being a 278controlling and data-flowing end-point for each front-panel port of the switch. 279These interfaces are specialized in order to: 280 281- insert/remove the switch tag protocol (if it exists) when sending traffic 282 to/from specific switch ports 283- query the switch for ethtool operations: statistics, link state, 284 Wake-on-LAN, register dumps... 285- external/internal PHY management: link, auto-negotiation etc. 286 287These slave network devices have custom net_device_ops and ethtool_ops function 288pointers which allow DSA to introduce a level of layering between the networking 289stack/ethtool, and the switch driver implementation. 290 291Upon frame transmission from these slave network devices, DSA will look up which 292switch tagging protocol is currently registered with these network devices, and 293invoke a specific transmit routine which takes care of adding the relevant 294switch tag in the Ethernet frames. 295 296These frames are then queued for transmission using the master network device 297``ndo_start_xmit()`` function, since they contain the appropriate switch tag, the 298Ethernet switch will be able to process these incoming frames from the 299management interface and delivers these frames to the physical switch port. 300 301Graphical representation 302------------------------ 303 304Summarized, this is basically how DSA looks like from a network device 305perspective:: 306 307 Unaware application 308 opens and binds socket 309 | ^ 310 | | 311 +-----------v--|--------------------+ 312 |+------+ +------+ +------+ +------+| 313 || swp0 | | swp1 | | swp2 | | swp3 || 314 |+------+-+------+-+------+-+------+| 315 | DSA switch driver | 316 +-----------------------------------+ 317 | ^ 318 Tag added by | | Tag consumed by 319 switch driver | | switch driver 320 v | 321 +-----------------------------------+ 322 | Unmodified host interface driver | Software 323 --------+-----------------------------------+------------ 324 | Host interface (eth0) | Hardware 325 +-----------------------------------+ 326 | ^ 327 Tag consumed by | | Tag added by 328 switch hardware | | switch hardware 329 v | 330 +-----------------------------------+ 331 | Switch | 332 |+------+ +------+ +------+ +------+| 333 || swp0 | | swp1 | | swp2 | | swp3 || 334 ++------+-+------+-+------+-+------++ 335 336Slave MDIO bus 337-------------- 338 339In order to be able to read to/from a switch PHY built into it, DSA creates a 340slave MDIO bus which allows a specific switch driver to divert and intercept 341MDIO reads/writes towards specific PHY addresses. In most MDIO-connected 342switches, these functions would utilize direct or indirect PHY addressing mode 343to return standard MII registers from the switch builtin PHYs, allowing the PHY 344library and/or to return link status, link partner pages, auto-negotiation 345results etc.. 346 347For Ethernet switches which have both external and internal MDIO busses, the 348slave MII bus can be utilized to mux/demux MDIO reads and writes towards either 349internal or external MDIO devices this switch might be connected to: internal 350PHYs, external PHYs, or even external switches. 351 352Data structures 353--------------- 354 355DSA data structures are defined in ``include/net/dsa.h`` as well as 356``net/dsa/dsa_priv.h``: 357 358- ``dsa_chip_data``: platform data configuration for a given switch device, 359 this structure describes a switch device's parent device, its address, as 360 well as various properties of its ports: names/labels, and finally a routing 361 table indication (when cascading switches) 362 363- ``dsa_platform_data``: platform device configuration data which can reference 364 a collection of dsa_chip_data structure if multiples switches are cascaded, 365 the master network device this switch tree is attached to needs to be 366 referenced 367 368- ``dsa_switch_tree``: structure assigned to the master network device under 369 ``dsa_ptr``, this structure references a dsa_platform_data structure as well as 370 the tagging protocol supported by the switch tree, and which receive/transmit 371 function hooks should be invoked, information about the directly attached 372 switch is also provided: CPU port. Finally, a collection of dsa_switch are 373 referenced to address individual switches in the tree. 374 375- ``dsa_switch``: structure describing a switch device in the tree, referencing 376 a ``dsa_switch_tree`` as a backpointer, slave network devices, master network 377 device, and a reference to the backing``dsa_switch_ops`` 378 379- ``dsa_switch_ops``: structure referencing function pointers, see below for a 380 full description. 381 382Design limitations 383================== 384 385Lack of CPU/DSA network devices 386------------------------------- 387 388DSA does not currently create slave network devices for the CPU or DSA ports, as 389described before. This might be an issue in the following cases: 390 391- inability to fetch switch CPU port statistics counters using ethtool, which 392 can make it harder to debug MDIO switch connected using xMII interfaces 393 394- inability to configure the CPU port link parameters based on the Ethernet 395 controller capabilities attached to it: http://patchwork.ozlabs.org/patch/509806/ 396 397- inability to configure specific VLAN IDs / trunking VLANs between switches 398 when using a cascaded setup 399 400Common pitfalls using DSA setups 401-------------------------------- 402 403Once a master network device is configured to use DSA (dev->dsa_ptr becomes 404non-NULL), and the switch behind it expects a tagging protocol, this network 405interface can only exclusively be used as a conduit interface. Sending packets 406directly through this interface (e.g.: opening a socket using this interface) 407will not make us go through the switch tagging protocol transmit function, so 408the Ethernet switch on the other end, expecting a tag will typically drop this 409frame. 410 411Interactions with other subsystems 412================================== 413 414DSA currently leverages the following subsystems: 415 416- MDIO/PHY library: ``drivers/net/phy/phy.c``, ``mdio_bus.c`` 417- Switchdev:``net/switchdev/*`` 418- Device Tree for various of_* functions 419- Devlink: ``net/core/devlink.c`` 420 421MDIO/PHY library 422---------------- 423 424Slave network devices exposed by DSA may or may not be interfacing with PHY 425devices (``struct phy_device`` as defined in ``include/linux/phy.h)``, but the DSA 426subsystem deals with all possible combinations: 427 428- internal PHY devices, built into the Ethernet switch hardware 429- external PHY devices, connected via an internal or external MDIO bus 430- internal PHY devices, connected via an internal MDIO bus 431- special, non-autonegotiated or non MDIO-managed PHY devices: SFPs, MoCA; a.k.a 432 fixed PHYs 433 434The PHY configuration is done by the ``dsa_slave_phy_setup()`` function and the 435logic basically looks like this: 436 437- if Device Tree is used, the PHY device is looked up using the standard 438 "phy-handle" property, if found, this PHY device is created and registered 439 using ``of_phy_connect()`` 440 441- if Device Tree is used, and the PHY device is "fixed", that is, conforms to 442 the definition of a non-MDIO managed PHY as defined in 443 ``Documentation/devicetree/bindings/net/fixed-link.txt``, the PHY is registered 444 and connected transparently using the special fixed MDIO bus driver 445 446- finally, if the PHY is built into the switch, as is very common with 447 standalone switch packages, the PHY is probed using the slave MII bus created 448 by DSA 449 450 451SWITCHDEV 452--------- 453 454DSA directly utilizes SWITCHDEV when interfacing with the bridge layer, and 455more specifically with its VLAN filtering portion when configuring VLANs on top 456of per-port slave network devices. As of today, the only SWITCHDEV objects 457supported by DSA are the FDB and VLAN objects. 458 459Devlink 460------- 461 462DSA registers one devlink device per physical switch in the fabric. 463For each devlink device, every physical port (i.e. user ports, CPU ports, DSA 464links or unused ports) is exposed as a devlink port. 465 466DSA drivers can make use of the following devlink features: 467- Regions: debugging feature which allows user space to dump driver-defined 468 areas of hardware information in a low-level, binary format. Both global 469 regions as well as per-port regions are supported. It is possible to export 470 devlink regions even for pieces of data that are already exposed in some way 471 to the standard iproute2 user space programs (ip-link, bridge), like address 472 tables and VLAN tables. For example, this might be useful if the tables 473 contain additional hardware-specific details which are not visible through 474 the iproute2 abstraction, or it might be useful to inspect these tables on 475 the non-user ports too, which are invisible to iproute2 because no network 476 interface is registered for them. 477- Params: a feature which enables user to configure certain low-level tunable 478 knobs pertaining to the device. Drivers may implement applicable generic 479 devlink params, or may add new device-specific devlink params. 480- Resources: a monitoring feature which enables users to see the degree of 481 utilization of certain hardware tables in the device, such as FDB, VLAN, etc. 482- Shared buffers: a QoS feature for adjusting and partitioning memory and frame 483 reservations per port and per traffic class, in the ingress and egress 484 directions, such that low-priority bulk traffic does not impede the 485 processing of high-priority critical traffic. 486 487For more details, consult ``Documentation/networking/devlink/``. 488 489Device Tree 490----------- 491 492DSA features a standardized binding which is documented in 493``Documentation/devicetree/bindings/net/dsa/dsa.txt``. PHY/MDIO library helper 494functions such as ``of_get_phy_mode()``, ``of_phy_connect()`` are also used to query 495per-port PHY specific details: interface connection, MDIO bus location etc.. 496 497Driver development 498================== 499 500DSA switch drivers need to implement a dsa_switch_ops structure which will 501contain the various members described below. 502 503``register_switch_driver()`` registers this dsa_switch_ops in its internal list 504of drivers to probe for. ``unregister_switch_driver()`` does the exact opposite. 505 506Unless requested differently by setting the priv_size member accordingly, DSA 507does not allocate any driver private context space. 508 509Switch configuration 510-------------------- 511 512- ``tag_protocol``: this is to indicate what kind of tagging protocol is supported, 513 should be a valid value from the ``dsa_tag_protocol`` enum 514 515- ``probe``: probe routine which will be invoked by the DSA platform device upon 516 registration to test for the presence/absence of a switch device. For MDIO 517 devices, it is recommended to issue a read towards internal registers using 518 the switch pseudo-PHY and return whether this is a supported device. For other 519 buses, return a non-NULL string 520 521- ``setup``: setup function for the switch, this function is responsible for setting 522 up the ``dsa_switch_ops`` private structure with all it needs: register maps, 523 interrupts, mutexes, locks etc.. This function is also expected to properly 524 configure the switch to separate all network interfaces from each other, that 525 is, they should be isolated by the switch hardware itself, typically by creating 526 a Port-based VLAN ID for each port and allowing only the CPU port and the 527 specific port to be in the forwarding vector. Ports that are unused by the 528 platform should be disabled. Past this function, the switch is expected to be 529 fully configured and ready to serve any kind of request. It is recommended 530 to issue a software reset of the switch during this setup function in order to 531 avoid relying on what a previous software agent such as a bootloader/firmware 532 may have previously configured. 533 534PHY devices and link management 535------------------------------- 536 537- ``get_phy_flags``: Some switches are interfaced to various kinds of Ethernet PHYs, 538 if the PHY library PHY driver needs to know about information it cannot obtain 539 on its own (e.g.: coming from switch memory mapped registers), this function 540 should return a 32-bits bitmask of "flags", that is private between the switch 541 driver and the Ethernet PHY driver in ``drivers/net/phy/\*``. 542 543- ``phy_read``: Function invoked by the DSA slave MDIO bus when attempting to read 544 the switch port MDIO registers. If unavailable, return 0xffff for each read. 545 For builtin switch Ethernet PHYs, this function should allow reading the link 546 status, auto-negotiation results, link partner pages etc.. 547 548- ``phy_write``: Function invoked by the DSA slave MDIO bus when attempting to write 549 to the switch port MDIO registers. If unavailable return a negative error 550 code. 551 552- ``adjust_link``: Function invoked by the PHY library when a slave network device 553 is attached to a PHY device. This function is responsible for appropriately 554 configuring the switch port link parameters: speed, duplex, pause based on 555 what the ``phy_device`` is providing. 556 557- ``fixed_link_update``: Function invoked by the PHY library, and specifically by 558 the fixed PHY driver asking the switch driver for link parameters that could 559 not be auto-negotiated, or obtained by reading the PHY registers through MDIO. 560 This is particularly useful for specific kinds of hardware such as QSGMII, 561 MoCA or other kinds of non-MDIO managed PHYs where out of band link 562 information is obtained 563 564Ethtool operations 565------------------ 566 567- ``get_strings``: ethtool function used to query the driver's strings, will 568 typically return statistics strings, private flags strings etc. 569 570- ``get_ethtool_stats``: ethtool function used to query per-port statistics and 571 return their values. DSA overlays slave network devices general statistics: 572 RX/TX counters from the network device, with switch driver specific statistics 573 per port 574 575- ``get_sset_count``: ethtool function used to query the number of statistics items 576 577- ``get_wol``: ethtool function used to obtain Wake-on-LAN settings per-port, this 578 function may, for certain implementations also query the master network device 579 Wake-on-LAN settings if this interface needs to participate in Wake-on-LAN 580 581- ``set_wol``: ethtool function used to configure Wake-on-LAN settings per-port, 582 direct counterpart to set_wol with similar restrictions 583 584- ``set_eee``: ethtool function which is used to configure a switch port EEE (Green 585 Ethernet) settings, can optionally invoke the PHY library to enable EEE at the 586 PHY level if relevant. This function should enable EEE at the switch port MAC 587 controller and data-processing logic 588 589- ``get_eee``: ethtool function which is used to query a switch port EEE settings, 590 this function should return the EEE state of the switch port MAC controller 591 and data-processing logic as well as query the PHY for its currently configured 592 EEE settings 593 594- ``get_eeprom_len``: ethtool function returning for a given switch the EEPROM 595 length/size in bytes 596 597- ``get_eeprom``: ethtool function returning for a given switch the EEPROM contents 598 599- ``set_eeprom``: ethtool function writing specified data to a given switch EEPROM 600 601- ``get_regs_len``: ethtool function returning the register length for a given 602 switch 603 604- ``get_regs``: ethtool function returning the Ethernet switch internal register 605 contents. This function might require user-land code in ethtool to 606 pretty-print register values and registers 607 608Power management 609---------------- 610 611- ``suspend``: function invoked by the DSA platform device when the system goes to 612 suspend, should quiesce all Ethernet switch activities, but keep ports 613 participating in Wake-on-LAN active as well as additional wake-up logic if 614 supported 615 616- ``resume``: function invoked by the DSA platform device when the system resumes, 617 should resume all Ethernet switch activities and re-configure the switch to be 618 in a fully active state 619 620- ``port_enable``: function invoked by the DSA slave network device ndo_open 621 function when a port is administratively brought up, this function should be 622 fully enabling a given switch port. DSA takes care of marking the port with 623 ``BR_STATE_BLOCKING`` if the port is a bridge member, or ``BR_STATE_FORWARDING`` if it 624 was not, and propagating these changes down to the hardware 625 626- ``port_disable``: function invoked by the DSA slave network device ndo_close 627 function when a port is administratively brought down, this function should be 628 fully disabling a given switch port. DSA takes care of marking the port with 629 ``BR_STATE_DISABLED`` and propagating changes to the hardware if this port is 630 disabled while being a bridge member 631 632Bridge layer 633------------ 634 635- ``port_bridge_join``: bridge layer function invoked when a given switch port is 636 added to a bridge, this function should be doing the necessary at the switch 637 level to permit the joining port from being added to the relevant logical 638 domain for it to ingress/egress traffic with other members of the bridge. 639 640- ``port_bridge_leave``: bridge layer function invoked when a given switch port is 641 removed from a bridge, this function should be doing the necessary at the 642 switch level to deny the leaving port from ingress/egress traffic from the 643 remaining bridge members. When the port leaves the bridge, it should be aged 644 out at the switch hardware for the switch to (re) learn MAC addresses behind 645 this port. 646 647- ``port_stp_state_set``: bridge layer function invoked when a given switch port STP 648 state is computed by the bridge layer and should be propagated to switch 649 hardware to forward/block/learn traffic. The switch driver is responsible for 650 computing a STP state change based on current and asked parameters and perform 651 the relevant ageing based on the intersection results 652 653- ``port_bridge_flags``: bridge layer function invoked when a port must 654 configure its settings for e.g. flooding of unknown traffic or source address 655 learning. The switch driver is responsible for initial setup of the 656 standalone ports with address learning disabled and egress flooding of all 657 types of traffic, then the DSA core notifies of any change to the bridge port 658 flags when the port joins and leaves a bridge. DSA does not currently manage 659 the bridge port flags for the CPU port. The assumption is that address 660 learning should be statically enabled (if supported by the hardware) on the 661 CPU port, and flooding towards the CPU port should also be enabled, due to a 662 lack of an explicit address filtering mechanism in the DSA core. 663 664Bridge VLAN filtering 665--------------------- 666 667- ``port_vlan_filtering``: bridge layer function invoked when the bridge gets 668 configured for turning on or off VLAN filtering. If nothing specific needs to 669 be done at the hardware level, this callback does not need to be implemented. 670 When VLAN filtering is turned on, the hardware must be programmed with 671 rejecting 802.1Q frames which have VLAN IDs outside of the programmed allowed 672 VLAN ID map/rules. If there is no PVID programmed into the switch port, 673 untagged frames must be rejected as well. When turned off the switch must 674 accept any 802.1Q frames irrespective of their VLAN ID, and untagged frames are 675 allowed. 676 677- ``port_vlan_add``: bridge layer function invoked when a VLAN is configured 678 (tagged or untagged) for the given switch port. If the operation is not 679 supported by the hardware, this function should return ``-EOPNOTSUPP`` to 680 inform the bridge code to fallback to a software implementation. 681 682- ``port_vlan_del``: bridge layer function invoked when a VLAN is removed from the 683 given switch port 684 685- ``port_vlan_dump``: bridge layer function invoked with a switchdev callback 686 function that the driver has to call for each VLAN the given port is a member 687 of. A switchdev object is used to carry the VID and bridge flags. 688 689- ``port_fdb_add``: bridge layer function invoked when the bridge wants to install a 690 Forwarding Database entry, the switch hardware should be programmed with the 691 specified address in the specified VLAN Id in the forwarding database 692 associated with this VLAN ID. If the operation is not supported, this 693 function should return ``-EOPNOTSUPP`` to inform the bridge code to fallback to 694 a software implementation. 695 696.. note:: VLAN ID 0 corresponds to the port private database, which, in the context 697 of DSA, would be its port-based VLAN, used by the associated bridge device. 698 699- ``port_fdb_del``: bridge layer function invoked when the bridge wants to remove a 700 Forwarding Database entry, the switch hardware should be programmed to delete 701 the specified MAC address from the specified VLAN ID if it was mapped into 702 this port forwarding database 703 704- ``port_fdb_dump``: bridge layer function invoked with a switchdev callback 705 function that the driver has to call for each MAC address known to be behind 706 the given port. A switchdev object is used to carry the VID and FDB info. 707 708- ``port_mdb_add``: bridge layer function invoked when the bridge wants to install 709 a multicast database entry. If the operation is not supported, this function 710 should return ``-EOPNOTSUPP`` to inform the bridge code to fallback to a 711 software implementation. The switch hardware should be programmed with the 712 specified address in the specified VLAN ID in the forwarding database 713 associated with this VLAN ID. 714 715.. note:: VLAN ID 0 corresponds to the port private database, which, in the context 716 of DSA, would be its port-based VLAN, used by the associated bridge device. 717 718- ``port_mdb_del``: bridge layer function invoked when the bridge wants to remove a 719 multicast database entry, the switch hardware should be programmed to delete 720 the specified MAC address from the specified VLAN ID if it was mapped into 721 this port forwarding database. 722 723- ``port_mdb_dump``: bridge layer function invoked with a switchdev callback 724 function that the driver has to call for each MAC address known to be behind 725 the given port. A switchdev object is used to carry the VID and MDB info. 726 727Link aggregation 728---------------- 729 730Link aggregation is implemented in the Linux networking stack by the bonding 731and team drivers, which are modeled as virtual, stackable network interfaces. 732DSA is capable of offloading a link aggregation group (LAG) to hardware that 733supports the feature, and supports bridging between physical ports and LAGs, 734as well as between LAGs. A bonding/team interface which holds multiple physical 735ports constitutes a logical port, although DSA has no explicit concept of a 736logical port at the moment. Due to this, events where a LAG joins/leaves a 737bridge are treated as if all individual physical ports that are members of that 738LAG join/leave the bridge. Switchdev port attributes (VLAN filtering, STP 739state, etc) and objects (VLANs, MDB entries) offloaded to a LAG as bridge port 740are treated similarly: DSA offloads the same switchdev object / port attribute 741on all members of the LAG. Static bridge FDB entries on a LAG are not yet 742supported, since the DSA driver API does not have the concept of a logical port 743ID. 744 745- ``port_lag_join``: function invoked when a given switch port is added to a 746 LAG. The driver may return ``-EOPNOTSUPP``, and in this case, DSA will fall 747 back to a software implementation where all traffic from this port is sent to 748 the CPU. 749- ``port_lag_leave``: function invoked when a given switch port leaves a LAG 750 and returns to operation as a standalone port. 751- ``port_lag_change``: function invoked when the link state of any member of 752 the LAG changes, and the hashing function needs rebalancing to only make use 753 of the subset of physical LAG member ports that are up. 754 755Drivers that benefit from having an ID associated with each offloaded LAG 756can optionally populate ``ds->num_lag_ids`` from the ``dsa_switch_ops::setup`` 757method. The LAG ID associated with a bonding/team interface can then be 758retrieved by a DSA switch driver using the ``dsa_lag_id`` function. 759 760IEC 62439-2 (MRP) 761----------------- 762 763The Media Redundancy Protocol is a topology management protocol optimized for 764fast fault recovery time for ring networks, which has some components 765implemented as a function of the bridge driver. MRP uses management PDUs 766(Test, Topology, LinkDown/Up, Option) sent at a multicast destination MAC 767address range of 01:15:4e:00:00:0x and with an EtherType of 0x88e3. 768Depending on the node's role in the ring (MRM: Media Redundancy Manager, 769MRC: Media Redundancy Client, MRA: Media Redundancy Automanager), certain MRP 770PDUs might need to be terminated locally and others might need to be forwarded. 771An MRM might also benefit from offloading to hardware the creation and 772transmission of certain MRP PDUs (Test). 773 774Normally an MRP instance can be created on top of any network interface, 775however in the case of a device with an offloaded data path such as DSA, it is 776necessary for the hardware, even if it is not MRP-aware, to be able to extract 777the MRP PDUs from the fabric before the driver can proceed with the software 778implementation. DSA today has no driver which is MRP-aware, therefore it only 779listens for the bare minimum switchdev objects required for the software assist 780to work properly. The operations are detailed below. 781 782- ``port_mrp_add`` and ``port_mrp_del``: notifies driver when an MRP instance 783 with a certain ring ID, priority, primary port and secondary port is 784 created/deleted. 785- ``port_mrp_add_ring_role`` and ``port_mrp_del_ring_role``: function invoked 786 when an MRP instance changes ring roles between MRM or MRC. This affects 787 which MRP PDUs should be trapped to software and which should be autonomously 788 forwarded. 789 790IEC 62439-3 (HSR/PRP) 791--------------------- 792 793The Parallel Redundancy Protocol (PRP) is a network redundancy protocol which 794works by duplicating and sequence numbering packets through two independent L2 795networks (which are unaware of the PRP tail tags carried in the packets), and 796eliminating the duplicates at the receiver. The High-availability Seamless 797Redundancy (HSR) protocol is similar in concept, except all nodes that carry 798the redundant traffic are aware of the fact that it is HSR-tagged (because HSR 799uses a header with an EtherType of 0x892f) and are physically connected in a 800ring topology. Both HSR and PRP use supervision frames for monitoring the 801health of the network and for discovery of other nodes. 802 803In Linux, both HSR and PRP are implemented in the hsr driver, which 804instantiates a virtual, stackable network interface with two member ports. 805The driver only implements the basic roles of DANH (Doubly Attached Node 806implementing HSR) and DANP (Doubly Attached Node implementing PRP); the roles 807of RedBox and QuadBox are not implemented (therefore, bridging a hsr network 808interface with a physical switch port does not produce the expected result). 809 810A driver which is able of offloading certain functions of a DANP or DANH should 811declare the corresponding netdev features as indicated by the documentation at 812``Documentation/networking/netdev-features.rst``. Additionally, the following 813methods must be implemented: 814 815- ``port_hsr_join``: function invoked when a given switch port is added to a 816 DANP/DANH. The driver may return ``-EOPNOTSUPP`` and in this case, DSA will 817 fall back to a software implementation where all traffic from this port is 818 sent to the CPU. 819- ``port_hsr_leave``: function invoked when a given switch port leaves a 820 DANP/DANH and returns to normal operation as a standalone port. 821 822TODO 823==== 824 825Making SWITCHDEV and DSA converge towards an unified codebase 826------------------------------------------------------------- 827 828SWITCHDEV properly takes care of abstracting the networking stack with offload 829capable hardware, but does not enforce a strict switch device driver model. On 830the other DSA enforces a fairly strict device driver model, and deals with most 831of the switch specific. At some point we should envision a merger between these 832two subsystems and get the best of both worlds. 833 834Other hanging fruits 835-------------------- 836 837- allowing more than one CPU/management interface: 838 http://comments.gmane.org/gmane.linux.network/365657 839