1============
2Architecture
3============
4
5This document describes the **Distributed Switch Architecture (DSA)** subsystem
6design principles, limitations, interactions with other subsystems, and how to
7develop drivers for this subsystem as well as a TODO for developers interested
8in joining the effort.
9
10Design principles
11=================
12
13The Distributed Switch Architecture is a subsystem which was primarily designed
14to support Marvell Ethernet switches (MV88E6xxx, a.k.a Linkstreet product line)
15using Linux, but has since evolved to support other vendors as well.
16
17The original philosophy behind this design was to be able to use unmodified
18Linux tools such as bridge, iproute2, ifconfig to work transparently whether
19they configured/queried a switch port network device or a regular network
20device.
21
22An Ethernet switch is typically comprised of multiple front-panel ports, and one
23or more CPU or management port. The DSA subsystem currently relies on the
24presence of a management port connected to an Ethernet controller capable of
25receiving Ethernet frames from the switch. This is a very common setup for all
26kinds of Ethernet switches found in Small Home and Office products: routers,
27gateways, or even top-of-the rack switches. This host Ethernet controller will
28be later referred to as "master" and "cpu" in DSA terminology and code.
29
30The D in DSA stands for Distributed, because the subsystem has been designed
31with the ability to configure and manage cascaded switches on top of each other
32using upstream and downstream Ethernet links between switches. These specific
33ports are referred to as "dsa" ports in DSA terminology and code. A collection
34of multiple switches connected to each other is called a "switch tree".
35
36For each front-panel port, DSA will create specialized network devices which are
37used as controlling and data-flowing endpoints for use by the Linux networking
38stack. These specialized network interfaces are referred to as "slave" network
39interfaces in DSA terminology and code.
40
41The ideal case for using DSA is when an Ethernet switch supports a "switch tag"
42which is a hardware feature making the switch insert a specific tag for each
43Ethernet frames it received to/from specific ports to help the management
44interface figure out:
45
46- what port is this frame coming from
47- what was the reason why this frame got forwarded
48- how to send CPU originated traffic to specific ports
49
50The subsystem does support switches not capable of inserting/stripping tags, but
51the features might be slightly limited in that case (traffic separation relies
52on Port-based VLAN IDs).
53
54Note that DSA does not currently create network interfaces for the "cpu" and
55"dsa" ports because:
56
57- the "cpu" port is the Ethernet switch facing side of the management
58  controller, and as such, would create a duplication of feature, since you
59  would get two interfaces for the same conduit: master netdev, and "cpu" netdev
60
61- the "dsa" port(s) are just conduits between two or more switches, and as such
62  cannot really be used as proper network interfaces either, only the
63  downstream, or the top-most upstream interface makes sense with that model
64
65Switch tagging protocols
66------------------------
67
68DSA supports many vendor-specific tagging protocols, one software-defined
69tagging protocol, and a tag-less mode as well (``DSA_TAG_PROTO_NONE``).
70
71The exact format of the tag protocol is vendor specific, but in general, they
72all contain something which:
73
74- identifies which port the Ethernet frame came from/should be sent to
75- provides a reason why this frame was forwarded to the management interface
76
77All tagging protocols are in ``net/dsa/tag_*.c`` files and implement the
78methods of the ``struct dsa_device_ops`` structure, which are detailed below.
79
80Tagging protocols generally fall in one of three categories:
81
821. The switch-specific frame header is located before the Ethernet header,
83   shifting to the right (from the perspective of the DSA master's frame
84   parser) the MAC DA, MAC SA, EtherType and the entire L2 payload.
852. The switch-specific frame header is located before the EtherType, keeping
86   the MAC DA and MAC SA in place from the DSA master's perspective, but
87   shifting the 'real' EtherType and L2 payload to the right.
883. The switch-specific frame header is located at the tail of the packet,
89   keeping all frame headers in place and not altering the view of the packet
90   that the DSA master's frame parser has.
91
92A tagging protocol may tag all packets with switch tags of the same length, or
93the tag length might vary (for example packets with PTP timestamps might
94require an extended switch tag, or there might be one tag length on TX and a
95different one on RX). Either way, the tagging protocol driver must populate the
96``struct dsa_device_ops::needed_headroom`` and/or ``struct dsa_device_ops::needed_tailroom``
97with the length in octets of the longest switch frame header/trailer. The DSA
98framework will automatically adjust the MTU of the master interface to
99accommodate for this extra size in order for DSA user ports to support the
100standard MTU (L2 payload length) of 1500 octets. The ``needed_headroom`` and
101``needed_tailroom`` properties are also used to request from the network stack,
102on a best-effort basis, the allocation of packets with enough extra space such
103that the act of pushing the switch tag on transmission of a packet does not
104cause it to reallocate due to lack of memory.
105
106Even though applications are not expected to parse DSA-specific frame headers,
107the format on the wire of the tagging protocol represents an Application Binary
108Interface exposed by the kernel towards user space, for decoders such as
109``libpcap``. The tagging protocol driver must populate the ``proto`` member of
110``struct dsa_device_ops`` with a value that uniquely describes the
111characteristics of the interaction required between the switch hardware and the
112data path driver: the offset of each bit field within the frame header and any
113stateful processing required to deal with the frames (as may be required for
114PTP timestamping).
115
116From the perspective of the network stack, all switches within the same DSA
117switch tree use the same tagging protocol. In case of a packet transiting a
118fabric with more than one switch, the switch-specific frame header is inserted
119by the first switch in the fabric that the packet was received on. This header
120typically contains information regarding its type (whether it is a control
121frame that must be trapped to the CPU, or a data frame to be forwarded).
122Control frames should be decapsulated only by the software data path, whereas
123data frames might also be autonomously forwarded towards other user ports of
124other switches from the same fabric, and in this case, the outermost switch
125ports must decapsulate the packet.
126
127Note that in certain cases, it might be the case that the tagging format used
128by a leaf switch (not connected directly to the CPU) to not be the same as what
129the network stack sees. This can be seen with Marvell switch trees, where the
130CPU port can be configured to use either the DSA or the Ethertype DSA (EDSA)
131format, but the DSA links are configured to use the shorter (without Ethertype)
132DSA frame header, in order to reduce the autonomous packet forwarding overhead.
133It still remains the case that, if the DSA switch tree is configured for the
134EDSA tagging protocol, the operating system sees EDSA-tagged packets from the
135leaf switches that tagged them with the shorter DSA header. This can be done
136because the Marvell switch connected directly to the CPU is configured to
137perform tag translation between DSA and EDSA (which is simply the operation of
138adding or removing the ``ETH_P_EDSA`` EtherType and some padding octets).
139
140It is possible to construct cascaded setups of DSA switches even if their
141tagging protocols are not compatible with one another. In this case, there are
142no DSA links in this fabric, and each switch constitutes a disjoint DSA switch
143tree. The DSA links are viewed as simply a pair of a DSA master (the out-facing
144port of the upstream DSA switch) and a CPU port (the in-facing port of the
145downstream DSA switch).
146
147The tagging protocol of the attached DSA switch tree can be viewed through the
148``dsa/tagging`` sysfs attribute of the DSA master::
149
150    cat /sys/class/net/eth0/dsa/tagging
151
152If the hardware and driver are capable, the tagging protocol of the DSA switch
153tree can be changed at runtime. This is done by writing the new tagging
154protocol name to the same sysfs device attribute as above (the DSA master and
155all attached switch ports must be down while doing this).
156
157It is desirable that all tagging protocols are testable with the ``dsa_loop``
158mockup driver, which can be attached to any network interface. The goal is that
159any network interface should be capable of transmitting the same packet in the
160same way, and the tagger should decode the same received packet in the same way
161regardless of the driver used for the switch control path, and the driver used
162for the DSA master.
163
164The transmission of a packet goes through the tagger's ``xmit`` function.
165The passed ``struct sk_buff *skb`` has ``skb->data`` pointing at
166``skb_mac_header(skb)``, i.e. at the destination MAC address, and the passed
167``struct net_device *dev`` represents the virtual DSA user network interface
168whose hardware counterpart the packet must be steered to (i.e. ``swp0``).
169The job of this method is to prepare the skb in a way that the switch will
170understand what egress port the packet is for (and not deliver it towards other
171ports). Typically this is fulfilled by pushing a frame header. Checking for
172insufficient size in the skb headroom or tailroom is unnecessary provided that
173the ``needed_headroom`` and ``needed_tailroom`` properties were filled out
174properly, because DSA ensures there is enough space before calling this method.
175
176The reception of a packet goes through the tagger's ``rcv`` function. The
177passed ``struct sk_buff *skb`` has ``skb->data`` pointing at
178``skb_mac_header(skb) + ETH_ALEN`` octets, i.e. to where the first octet after
179the EtherType would have been, were this frame not tagged. The role of this
180method is to consume the frame header, adjust ``skb->data`` to really point at
181the first octet after the EtherType, and to change ``skb->dev`` to point to the
182virtual DSA user network interface corresponding to the physical front-facing
183switch port that the packet was received on.
184
185Since tagging protocols in category 1 and 2 break software (and most often also
186hardware) packet dissection on the DSA master, features such as RPS (Receive
187Packet Steering) on the DSA master would be broken. The DSA framework deals
188with this by hooking into the flow dissector and shifting the offset at which
189the IP header is to be found in the tagged frame as seen by the DSA master.
190This behavior is automatic based on the ``overhead`` value of the tagging
191protocol. If not all packets are of equal size, the tagger can implement the
192``flow_dissect`` method of the ``struct dsa_device_ops`` and override this
193default behavior by specifying the correct offset incurred by each individual
194RX packet. Tail taggers do not cause issues to the flow dissector.
195
196Due to various reasons (most common being category 1 taggers being associated
197with DSA-unaware masters, mangling what the master perceives as MAC DA), the
198tagging protocol may require the DSA master to operate in promiscuous mode, to
199receive all frames regardless of the value of the MAC DA. This can be done by
200setting the ``promisc_on_master`` property of the ``struct dsa_device_ops``.
201Note that this assumes a DSA-unaware master driver, which is the norm.
202
203Master network devices
204----------------------
205
206Master network devices are regular, unmodified Linux network device drivers for
207the CPU/management Ethernet interface. Such a driver might occasionally need to
208know whether DSA is enabled (e.g.: to enable/disable specific offload features),
209but the DSA subsystem has been proven to work with industry standard drivers:
210``e1000e,`` ``mv643xx_eth`` etc. without having to introduce modifications to these
211drivers. Such network devices are also often referred to as conduit network
212devices since they act as a pipe between the host processor and the hardware
213Ethernet switch.
214
215Networking stack hooks
216----------------------
217
218When a master netdev is used with DSA, a small hook is placed in the
219networking stack is in order to have the DSA subsystem process the Ethernet
220switch specific tagging protocol. DSA accomplishes this by registering a
221specific (and fake) Ethernet type (later becoming ``skb->protocol``) with the
222networking stack, this is also known as a ``ptype`` or ``packet_type``. A typical
223Ethernet Frame receive sequence looks like this:
224
225Master network device (e.g.: e1000e):
226
2271. Receive interrupt fires:
228
229        - receive function is invoked
230        - basic packet processing is done: getting length, status etc.
231        - packet is prepared to be processed by the Ethernet layer by calling
232          ``eth_type_trans``
233
2342. net/ethernet/eth.c::
235
236          eth_type_trans(skb, dev)
237                  if (dev->dsa_ptr != NULL)
238                          -> skb->protocol = ETH_P_XDSA
239
2403. drivers/net/ethernet/\*::
241
242          netif_receive_skb(skb)
243                  -> iterate over registered packet_type
244                          -> invoke handler for ETH_P_XDSA, calls dsa_switch_rcv()
245
2464. net/dsa/dsa.c::
247
248          -> dsa_switch_rcv()
249                  -> invoke switch tag specific protocol handler in 'net/dsa/tag_*.c'
250
2515. net/dsa/tag_*.c:
252
253        - inspect and strip switch tag protocol to determine originating port
254        - locate per-port network device
255        - invoke ``eth_type_trans()`` with the DSA slave network device
256        - invoked ``netif_receive_skb()``
257
258Past this point, the DSA slave network devices get delivered regular Ethernet
259frames that can be processed by the networking stack.
260
261Slave network devices
262---------------------
263
264Slave network devices created by DSA are stacked on top of their master network
265device, each of these network interfaces will be responsible for being a
266controlling and data-flowing end-point for each front-panel port of the switch.
267These interfaces are specialized in order to:
268
269- insert/remove the switch tag protocol (if it exists) when sending traffic
270  to/from specific switch ports
271- query the switch for ethtool operations: statistics, link state,
272  Wake-on-LAN, register dumps...
273- external/internal PHY management: link, auto-negotiation etc.
274
275These slave network devices have custom net_device_ops and ethtool_ops function
276pointers which allow DSA to introduce a level of layering between the networking
277stack/ethtool, and the switch driver implementation.
278
279Upon frame transmission from these slave network devices, DSA will look up which
280switch tagging protocol is currently registered with these network devices, and
281invoke a specific transmit routine which takes care of adding the relevant
282switch tag in the Ethernet frames.
283
284These frames are then queued for transmission using the master network device
285``ndo_start_xmit()`` function, since they contain the appropriate switch tag, the
286Ethernet switch will be able to process these incoming frames from the
287management interface and delivers these frames to the physical switch port.
288
289Graphical representation
290------------------------
291
292Summarized, this is basically how DSA looks like from a network device
293perspective::
294
295                Unaware application
296              opens and binds socket
297                       |  ^
298                       |  |
299           +-----------v--|--------------------+
300           |+------+ +------+ +------+ +------+|
301           || swp0 | | swp1 | | swp2 | | swp3 ||
302           |+------+-+------+-+------+-+------+|
303           |          DSA switch driver        |
304           +-----------------------------------+
305                         |        ^
306            Tag added by |        | Tag consumed by
307           switch driver |        | switch driver
308                         v        |
309           +-----------------------------------+
310           | Unmodified host interface driver  | Software
311   --------+-----------------------------------+------------
312           |       Host interface (eth0)       | Hardware
313           +-----------------------------------+
314                         |        ^
315         Tag consumed by |        | Tag added by
316         switch hardware |        | switch hardware
317                         v        |
318           +-----------------------------------+
319           |               Switch              |
320           |+------+ +------+ +------+ +------+|
321           || swp0 | | swp1 | | swp2 | | swp3 ||
322           ++------+-+------+-+------+-+------++
323
324Slave MDIO bus
325--------------
326
327In order to be able to read to/from a switch PHY built into it, DSA creates a
328slave MDIO bus which allows a specific switch driver to divert and intercept
329MDIO reads/writes towards specific PHY addresses. In most MDIO-connected
330switches, these functions would utilize direct or indirect PHY addressing mode
331to return standard MII registers from the switch builtin PHYs, allowing the PHY
332library and/or to return link status, link partner pages, auto-negotiation
333results etc..
334
335For Ethernet switches which have both external and internal MDIO busses, the
336slave MII bus can be utilized to mux/demux MDIO reads and writes towards either
337internal or external MDIO devices this switch might be connected to: internal
338PHYs, external PHYs, or even external switches.
339
340Data structures
341---------------
342
343DSA data structures are defined in ``include/net/dsa.h`` as well as
344``net/dsa/dsa_priv.h``:
345
346- ``dsa_chip_data``: platform data configuration for a given switch device,
347  this structure describes a switch device's parent device, its address, as
348  well as various properties of its ports: names/labels, and finally a routing
349  table indication (when cascading switches)
350
351- ``dsa_platform_data``: platform device configuration data which can reference
352  a collection of dsa_chip_data structure if multiples switches are cascaded,
353  the master network device this switch tree is attached to needs to be
354  referenced
355
356- ``dsa_switch_tree``: structure assigned to the master network device under
357  ``dsa_ptr``, this structure references a dsa_platform_data structure as well as
358  the tagging protocol supported by the switch tree, and which receive/transmit
359  function hooks should be invoked, information about the directly attached
360  switch is also provided: CPU port. Finally, a collection of dsa_switch are
361  referenced to address individual switches in the tree.
362
363- ``dsa_switch``: structure describing a switch device in the tree, referencing
364  a ``dsa_switch_tree`` as a backpointer, slave network devices, master network
365  device, and a reference to the backing``dsa_switch_ops``
366
367- ``dsa_switch_ops``: structure referencing function pointers, see below for a
368  full description.
369
370Design limitations
371==================
372
373Lack of CPU/DSA network devices
374-------------------------------
375
376DSA does not currently create slave network devices for the CPU or DSA ports, as
377described before. This might be an issue in the following cases:
378
379- inability to fetch switch CPU port statistics counters using ethtool, which
380  can make it harder to debug MDIO switch connected using xMII interfaces
381
382- inability to configure the CPU port link parameters based on the Ethernet
383  controller capabilities attached to it: http://patchwork.ozlabs.org/patch/509806/
384
385- inability to configure specific VLAN IDs / trunking VLANs between switches
386  when using a cascaded setup
387
388Common pitfalls using DSA setups
389--------------------------------
390
391Once a master network device is configured to use DSA (dev->dsa_ptr becomes
392non-NULL), and the switch behind it expects a tagging protocol, this network
393interface can only exclusively be used as a conduit interface. Sending packets
394directly through this interface (e.g.: opening a socket using this interface)
395will not make us go through the switch tagging protocol transmit function, so
396the Ethernet switch on the other end, expecting a tag will typically drop this
397frame.
398
399Interactions with other subsystems
400==================================
401
402DSA currently leverages the following subsystems:
403
404- MDIO/PHY library: ``drivers/net/phy/phy.c``, ``mdio_bus.c``
405- Switchdev:``net/switchdev/*``
406- Device Tree for various of_* functions
407- Devlink: ``net/core/devlink.c``
408
409MDIO/PHY library
410----------------
411
412Slave network devices exposed by DSA may or may not be interfacing with PHY
413devices (``struct phy_device`` as defined in ``include/linux/phy.h)``, but the DSA
414subsystem deals with all possible combinations:
415
416- internal PHY devices, built into the Ethernet switch hardware
417- external PHY devices, connected via an internal or external MDIO bus
418- internal PHY devices, connected via an internal MDIO bus
419- special, non-autonegotiated or non MDIO-managed PHY devices: SFPs, MoCA; a.k.a
420  fixed PHYs
421
422The PHY configuration is done by the ``dsa_slave_phy_setup()`` function and the
423logic basically looks like this:
424
425- if Device Tree is used, the PHY device is looked up using the standard
426  "phy-handle" property, if found, this PHY device is created and registered
427  using ``of_phy_connect()``
428
429- if Device Tree is used, and the PHY device is "fixed", that is, conforms to
430  the definition of a non-MDIO managed PHY as defined in
431  ``Documentation/devicetree/bindings/net/fixed-link.txt``, the PHY is registered
432  and connected transparently using the special fixed MDIO bus driver
433
434- finally, if the PHY is built into the switch, as is very common with
435  standalone switch packages, the PHY is probed using the slave MII bus created
436  by DSA
437
438
439SWITCHDEV
440---------
441
442DSA directly utilizes SWITCHDEV when interfacing with the bridge layer, and
443more specifically with its VLAN filtering portion when configuring VLANs on top
444of per-port slave network devices. As of today, the only SWITCHDEV objects
445supported by DSA are the FDB and VLAN objects.
446
447Devlink
448-------
449
450DSA registers one devlink device per physical switch in the fabric.
451For each devlink device, every physical port (i.e. user ports, CPU ports, DSA
452links or unused ports) is exposed as a devlink port.
453
454DSA drivers can make use of the following devlink features:
455
456- Regions: debugging feature which allows user space to dump driver-defined
457  areas of hardware information in a low-level, binary format. Both global
458  regions as well as per-port regions are supported. It is possible to export
459  devlink regions even for pieces of data that are already exposed in some way
460  to the standard iproute2 user space programs (ip-link, bridge), like address
461  tables and VLAN tables. For example, this might be useful if the tables
462  contain additional hardware-specific details which are not visible through
463  the iproute2 abstraction, or it might be useful to inspect these tables on
464  the non-user ports too, which are invisible to iproute2 because no network
465  interface is registered for them.
466- Params: a feature which enables user to configure certain low-level tunable
467  knobs pertaining to the device. Drivers may implement applicable generic
468  devlink params, or may add new device-specific devlink params.
469- Resources: a monitoring feature which enables users to see the degree of
470  utilization of certain hardware tables in the device, such as FDB, VLAN, etc.
471- Shared buffers: a QoS feature for adjusting and partitioning memory and frame
472  reservations per port and per traffic class, in the ingress and egress
473  directions, such that low-priority bulk traffic does not impede the
474  processing of high-priority critical traffic.
475
476For more details, consult ``Documentation/networking/devlink/``.
477
478Device Tree
479-----------
480
481DSA features a standardized binding which is documented in
482``Documentation/devicetree/bindings/net/dsa/dsa.txt``. PHY/MDIO library helper
483functions such as ``of_get_phy_mode()``, ``of_phy_connect()`` are also used to query
484per-port PHY specific details: interface connection, MDIO bus location etc..
485
486Driver development
487==================
488
489DSA switch drivers need to implement a dsa_switch_ops structure which will
490contain the various members described below.
491
492``register_switch_driver()`` registers this dsa_switch_ops in its internal list
493of drivers to probe for. ``unregister_switch_driver()`` does the exact opposite.
494
495Unless requested differently by setting the priv_size member accordingly, DSA
496does not allocate any driver private context space.
497
498Switch configuration
499--------------------
500
501- ``tag_protocol``: this is to indicate what kind of tagging protocol is supported,
502  should be a valid value from the ``dsa_tag_protocol`` enum
503
504- ``probe``: probe routine which will be invoked by the DSA platform device upon
505  registration to test for the presence/absence of a switch device. For MDIO
506  devices, it is recommended to issue a read towards internal registers using
507  the switch pseudo-PHY and return whether this is a supported device. For other
508  buses, return a non-NULL string
509
510- ``setup``: setup function for the switch, this function is responsible for setting
511  up the ``dsa_switch_ops`` private structure with all it needs: register maps,
512  interrupts, mutexes, locks etc.. This function is also expected to properly
513  configure the switch to separate all network interfaces from each other, that
514  is, they should be isolated by the switch hardware itself, typically by creating
515  a Port-based VLAN ID for each port and allowing only the CPU port and the
516  specific port to be in the forwarding vector. Ports that are unused by the
517  platform should be disabled. Past this function, the switch is expected to be
518  fully configured and ready to serve any kind of request. It is recommended
519  to issue a software reset of the switch during this setup function in order to
520  avoid relying on what a previous software agent such as a bootloader/firmware
521  may have previously configured.
522
523PHY devices and link management
524-------------------------------
525
526- ``get_phy_flags``: Some switches are interfaced to various kinds of Ethernet PHYs,
527  if the PHY library PHY driver needs to know about information it cannot obtain
528  on its own (e.g.: coming from switch memory mapped registers), this function
529  should return a 32-bits bitmask of "flags", that is private between the switch
530  driver and the Ethernet PHY driver in ``drivers/net/phy/\*``.
531
532- ``phy_read``: Function invoked by the DSA slave MDIO bus when attempting to read
533  the switch port MDIO registers. If unavailable, return 0xffff for each read.
534  For builtin switch Ethernet PHYs, this function should allow reading the link
535  status, auto-negotiation results, link partner pages etc..
536
537- ``phy_write``: Function invoked by the DSA slave MDIO bus when attempting to write
538  to the switch port MDIO registers. If unavailable return a negative error
539  code.
540
541- ``adjust_link``: Function invoked by the PHY library when a slave network device
542  is attached to a PHY device. This function is responsible for appropriately
543  configuring the switch port link parameters: speed, duplex, pause based on
544  what the ``phy_device`` is providing.
545
546- ``fixed_link_update``: Function invoked by the PHY library, and specifically by
547  the fixed PHY driver asking the switch driver for link parameters that could
548  not be auto-negotiated, or obtained by reading the PHY registers through MDIO.
549  This is particularly useful for specific kinds of hardware such as QSGMII,
550  MoCA or other kinds of non-MDIO managed PHYs where out of band link
551  information is obtained
552
553Ethtool operations
554------------------
555
556- ``get_strings``: ethtool function used to query the driver's strings, will
557  typically return statistics strings, private flags strings etc.
558
559- ``get_ethtool_stats``: ethtool function used to query per-port statistics and
560  return their values. DSA overlays slave network devices general statistics:
561  RX/TX counters from the network device, with switch driver specific statistics
562  per port
563
564- ``get_sset_count``: ethtool function used to query the number of statistics items
565
566- ``get_wol``: ethtool function used to obtain Wake-on-LAN settings per-port, this
567  function may, for certain implementations also query the master network device
568  Wake-on-LAN settings if this interface needs to participate in Wake-on-LAN
569
570- ``set_wol``: ethtool function used to configure Wake-on-LAN settings per-port,
571  direct counterpart to set_wol with similar restrictions
572
573- ``set_eee``: ethtool function which is used to configure a switch port EEE (Green
574  Ethernet) settings, can optionally invoke the PHY library to enable EEE at the
575  PHY level if relevant. This function should enable EEE at the switch port MAC
576  controller and data-processing logic
577
578- ``get_eee``: ethtool function which is used to query a switch port EEE settings,
579  this function should return the EEE state of the switch port MAC controller
580  and data-processing logic as well as query the PHY for its currently configured
581  EEE settings
582
583- ``get_eeprom_len``: ethtool function returning for a given switch the EEPROM
584  length/size in bytes
585
586- ``get_eeprom``: ethtool function returning for a given switch the EEPROM contents
587
588- ``set_eeprom``: ethtool function writing specified data to a given switch EEPROM
589
590- ``get_regs_len``: ethtool function returning the register length for a given
591  switch
592
593- ``get_regs``: ethtool function returning the Ethernet switch internal register
594  contents. This function might require user-land code in ethtool to
595  pretty-print register values and registers
596
597Power management
598----------------
599
600- ``suspend``: function invoked by the DSA platform device when the system goes to
601  suspend, should quiesce all Ethernet switch activities, but keep ports
602  participating in Wake-on-LAN active as well as additional wake-up logic if
603  supported
604
605- ``resume``: function invoked by the DSA platform device when the system resumes,
606  should resume all Ethernet switch activities and re-configure the switch to be
607  in a fully active state
608
609- ``port_enable``: function invoked by the DSA slave network device ndo_open
610  function when a port is administratively brought up, this function should be
611  fully enabling a given switch port. DSA takes care of marking the port with
612  ``BR_STATE_BLOCKING`` if the port is a bridge member, or ``BR_STATE_FORWARDING`` if it
613  was not, and propagating these changes down to the hardware
614
615- ``port_disable``: function invoked by the DSA slave network device ndo_close
616  function when a port is administratively brought down, this function should be
617  fully disabling a given switch port. DSA takes care of marking the port with
618  ``BR_STATE_DISABLED`` and propagating changes to the hardware if this port is
619  disabled while being a bridge member
620
621Bridge layer
622------------
623
624- ``port_bridge_join``: bridge layer function invoked when a given switch port is
625  added to a bridge, this function should be doing the necessary at the switch
626  level to permit the joining port from being added to the relevant logical
627  domain for it to ingress/egress traffic with other members of the bridge.
628
629- ``port_bridge_leave``: bridge layer function invoked when a given switch port is
630  removed from a bridge, this function should be doing the necessary at the
631  switch level to deny the leaving port from ingress/egress traffic from the
632  remaining bridge members. When the port leaves the bridge, it should be aged
633  out at the switch hardware for the switch to (re) learn MAC addresses behind
634  this port.
635
636- ``port_stp_state_set``: bridge layer function invoked when a given switch port STP
637  state is computed by the bridge layer and should be propagated to switch
638  hardware to forward/block/learn traffic. The switch driver is responsible for
639  computing a STP state change based on current and asked parameters and perform
640  the relevant ageing based on the intersection results
641
642- ``port_bridge_flags``: bridge layer function invoked when a port must
643  configure its settings for e.g. flooding of unknown traffic or source address
644  learning. The switch driver is responsible for initial setup of the
645  standalone ports with address learning disabled and egress flooding of all
646  types of traffic, then the DSA core notifies of any change to the bridge port
647  flags when the port joins and leaves a bridge. DSA does not currently manage
648  the bridge port flags for the CPU port. The assumption is that address
649  learning should be statically enabled (if supported by the hardware) on the
650  CPU port, and flooding towards the CPU port should also be enabled, due to a
651  lack of an explicit address filtering mechanism in the DSA core.
652
653- ``port_bridge_tx_fwd_offload``: bridge layer function invoked after
654  ``port_bridge_join`` when a driver sets ``ds->num_fwd_offloading_bridges`` to
655  a non-zero value. Returning success in this function activates the TX
656  forwarding offload bridge feature for this port, which enables the tagging
657  protocol driver to inject data plane packets towards the bridging domain that
658  the port is a part of. Data plane packets are subject to FDB lookup, hardware
659  learning on the CPU port, and do not override the port STP state.
660  Additionally, replication of data plane packets (multicast, flooding) is
661  handled in hardware and the bridge driver will transmit a single skb for each
662  packet that needs replication. The method is provided as a configuration
663  point for drivers that need to configure the hardware for enabling this
664  feature.
665
666- ``port_bridge_tx_fwd_unoffload``: bridge layer function invoken when a driver
667  leaves a bridge port which had the TX forwarding offload feature enabled.
668
669Bridge VLAN filtering
670---------------------
671
672- ``port_vlan_filtering``: bridge layer function invoked when the bridge gets
673  configured for turning on or off VLAN filtering. If nothing specific needs to
674  be done at the hardware level, this callback does not need to be implemented.
675  When VLAN filtering is turned on, the hardware must be programmed with
676  rejecting 802.1Q frames which have VLAN IDs outside of the programmed allowed
677  VLAN ID map/rules.  If there is no PVID programmed into the switch port,
678  untagged frames must be rejected as well. When turned off the switch must
679  accept any 802.1Q frames irrespective of their VLAN ID, and untagged frames are
680  allowed.
681
682- ``port_vlan_add``: bridge layer function invoked when a VLAN is configured
683  (tagged or untagged) for the given switch port. If the operation is not
684  supported by the hardware, this function should return ``-EOPNOTSUPP`` to
685  inform the bridge code to fallback to a software implementation.
686
687- ``port_vlan_del``: bridge layer function invoked when a VLAN is removed from the
688  given switch port
689
690- ``port_vlan_dump``: bridge layer function invoked with a switchdev callback
691  function that the driver has to call for each VLAN the given port is a member
692  of. A switchdev object is used to carry the VID and bridge flags.
693
694- ``port_fdb_add``: bridge layer function invoked when the bridge wants to install a
695  Forwarding Database entry, the switch hardware should be programmed with the
696  specified address in the specified VLAN Id in the forwarding database
697  associated with this VLAN ID. If the operation is not supported, this
698  function should return ``-EOPNOTSUPP`` to inform the bridge code to fallback to
699  a software implementation.
700
701.. note:: VLAN ID 0 corresponds to the port private database, which, in the context
702        of DSA, would be its port-based VLAN, used by the associated bridge device.
703
704- ``port_fdb_del``: bridge layer function invoked when the bridge wants to remove a
705  Forwarding Database entry, the switch hardware should be programmed to delete
706  the specified MAC address from the specified VLAN ID if it was mapped into
707  this port forwarding database
708
709- ``port_fdb_dump``: bridge layer function invoked with a switchdev callback
710  function that the driver has to call for each MAC address known to be behind
711  the given port. A switchdev object is used to carry the VID and FDB info.
712
713- ``port_mdb_add``: bridge layer function invoked when the bridge wants to install
714  a multicast database entry. If the operation is not supported, this function
715  should return ``-EOPNOTSUPP`` to inform the bridge code to fallback to a
716  software implementation. The switch hardware should be programmed with the
717  specified address in the specified VLAN ID in the forwarding database
718  associated with this VLAN ID.
719
720.. note:: VLAN ID 0 corresponds to the port private database, which, in the context
721        of DSA, would be its port-based VLAN, used by the associated bridge device.
722
723- ``port_mdb_del``: bridge layer function invoked when the bridge wants to remove a
724  multicast database entry, the switch hardware should be programmed to delete
725  the specified MAC address from the specified VLAN ID if it was mapped into
726  this port forwarding database.
727
728- ``port_mdb_dump``: bridge layer function invoked with a switchdev callback
729  function that the driver has to call for each MAC address known to be behind
730  the given port. A switchdev object is used to carry the VID and MDB info.
731
732Link aggregation
733----------------
734
735Link aggregation is implemented in the Linux networking stack by the bonding
736and team drivers, which are modeled as virtual, stackable network interfaces.
737DSA is capable of offloading a link aggregation group (LAG) to hardware that
738supports the feature, and supports bridging between physical ports and LAGs,
739as well as between LAGs. A bonding/team interface which holds multiple physical
740ports constitutes a logical port, although DSA has no explicit concept of a
741logical port at the moment. Due to this, events where a LAG joins/leaves a
742bridge are treated as if all individual physical ports that are members of that
743LAG join/leave the bridge. Switchdev port attributes (VLAN filtering, STP
744state, etc) and objects (VLANs, MDB entries) offloaded to a LAG as bridge port
745are treated similarly: DSA offloads the same switchdev object / port attribute
746on all members of the LAG. Static bridge FDB entries on a LAG are not yet
747supported, since the DSA driver API does not have the concept of a logical port
748ID.
749
750- ``port_lag_join``: function invoked when a given switch port is added to a
751  LAG. The driver may return ``-EOPNOTSUPP``, and in this case, DSA will fall
752  back to a software implementation where all traffic from this port is sent to
753  the CPU.
754- ``port_lag_leave``: function invoked when a given switch port leaves a LAG
755  and returns to operation as a standalone port.
756- ``port_lag_change``: function invoked when the link state of any member of
757  the LAG changes, and the hashing function needs rebalancing to only make use
758  of the subset of physical LAG member ports that are up.
759
760Drivers that benefit from having an ID associated with each offloaded LAG
761can optionally populate ``ds->num_lag_ids`` from the ``dsa_switch_ops::setup``
762method. The LAG ID associated with a bonding/team interface can then be
763retrieved by a DSA switch driver using the ``dsa_lag_id`` function.
764
765IEC 62439-2 (MRP)
766-----------------
767
768The Media Redundancy Protocol is a topology management protocol optimized for
769fast fault recovery time for ring networks, which has some components
770implemented as a function of the bridge driver. MRP uses management PDUs
771(Test, Topology, LinkDown/Up, Option) sent at a multicast destination MAC
772address range of 01:15:4e:00:00:0x and with an EtherType of 0x88e3.
773Depending on the node's role in the ring (MRM: Media Redundancy Manager,
774MRC: Media Redundancy Client, MRA: Media Redundancy Automanager), certain MRP
775PDUs might need to be terminated locally and others might need to be forwarded.
776An MRM might also benefit from offloading to hardware the creation and
777transmission of certain MRP PDUs (Test).
778
779Normally an MRP instance can be created on top of any network interface,
780however in the case of a device with an offloaded data path such as DSA, it is
781necessary for the hardware, even if it is not MRP-aware, to be able to extract
782the MRP PDUs from the fabric before the driver can proceed with the software
783implementation. DSA today has no driver which is MRP-aware, therefore it only
784listens for the bare minimum switchdev objects required for the software assist
785to work properly. The operations are detailed below.
786
787- ``port_mrp_add`` and ``port_mrp_del``: notifies driver when an MRP instance
788  with a certain ring ID, priority, primary port and secondary port is
789  created/deleted.
790- ``port_mrp_add_ring_role`` and ``port_mrp_del_ring_role``: function invoked
791  when an MRP instance changes ring roles between MRM or MRC. This affects
792  which MRP PDUs should be trapped to software and which should be autonomously
793  forwarded.
794
795IEC 62439-3 (HSR/PRP)
796---------------------
797
798The Parallel Redundancy Protocol (PRP) is a network redundancy protocol which
799works by duplicating and sequence numbering packets through two independent L2
800networks (which are unaware of the PRP tail tags carried in the packets), and
801eliminating the duplicates at the receiver. The High-availability Seamless
802Redundancy (HSR) protocol is similar in concept, except all nodes that carry
803the redundant traffic are aware of the fact that it is HSR-tagged (because HSR
804uses a header with an EtherType of 0x892f) and are physically connected in a
805ring topology. Both HSR and PRP use supervision frames for monitoring the
806health of the network and for discovery of other nodes.
807
808In Linux, both HSR and PRP are implemented in the hsr driver, which
809instantiates a virtual, stackable network interface with two member ports.
810The driver only implements the basic roles of DANH (Doubly Attached Node
811implementing HSR) and DANP (Doubly Attached Node implementing PRP); the roles
812of RedBox and QuadBox are not implemented (therefore, bridging a hsr network
813interface with a physical switch port does not produce the expected result).
814
815A driver which is able of offloading certain functions of a DANP or DANH should
816declare the corresponding netdev features as indicated by the documentation at
817``Documentation/networking/netdev-features.rst``. Additionally, the following
818methods must be implemented:
819
820- ``port_hsr_join``: function invoked when a given switch port is added to a
821  DANP/DANH. The driver may return ``-EOPNOTSUPP`` and in this case, DSA will
822  fall back to a software implementation where all traffic from this port is
823  sent to the CPU.
824- ``port_hsr_leave``: function invoked when a given switch port leaves a
825  DANP/DANH and returns to normal operation as a standalone port.
826
827TODO
828====
829
830Making SWITCHDEV and DSA converge towards an unified codebase
831-------------------------------------------------------------
832
833SWITCHDEV properly takes care of abstracting the networking stack with offload
834capable hardware, but does not enforce a strict switch device driver model. On
835the other DSA enforces a fairly strict device driver model, and deals with most
836of the switch specific. At some point we should envision a merger between these
837two subsystems and get the best of both worlds.
838
839Other hanging fruits
840--------------------
841
842- allowing more than one CPU/management interface:
843  http://comments.gmane.org/gmane.linux.network/365657
844