1====================== 2Linux Kernel Makefiles 3====================== 4 5This document describes the Linux kernel Makefiles. 6 7.. Table of Contents 8 9 === 1 Overview 10 === 2 Who does what 11 === 3 The kbuild files 12 --- 3.1 Goal definitions 13 --- 3.2 Built-in object goals - obj-y 14 --- 3.3 Loadable module goals - obj-m 15 --- 3.4 Objects which export symbols 16 --- 3.5 Library file goals - lib-y 17 --- 3.6 Descending down in directories 18 --- 3.7 Compilation flags 19 --- 3.8 Command line dependency 20 --- 3.9 Dependency tracking 21 --- 3.10 Special Rules 22 --- 3.11 $(CC) support functions 23 --- 3.12 $(LD) support functions 24 25 === 4 Host Program support 26 --- 4.1 Simple Host Program 27 --- 4.2 Composite Host Programs 28 --- 4.3 Using C++ for host programs 29 --- 4.4 Controlling compiler options for host programs 30 --- 4.5 When host programs are actually built 31 32 === 5 Userspace Program support 33 --- 5.1 Simple Userspace Program 34 --- 5.2 Composite Userspace Programs 35 --- 5.3 Controlling compiler options for userspace programs 36 --- 5.4 When userspace programs are actually built 37 38 === 6 Kbuild clean infrastructure 39 40 === 7 Architecture Makefiles 41 --- 7.1 Set variables to tweak the build to the architecture 42 --- 7.2 Add prerequisites to archheaders: 43 --- 7.3 Add prerequisites to archprepare: 44 --- 7.4 List directories to visit when descending 45 --- 7.5 Architecture-specific boot images 46 --- 7.6 Building non-kbuild targets 47 --- 7.7 Commands useful for building a boot image 48 --- 7.8 Custom kbuild commands 49 --- 7.9 Preprocessing linker scripts 50 --- 7.10 Generic header files 51 --- 7.11 Post-link pass 52 53 === 8 Kbuild syntax for exported headers 54 --- 8.1 no-export-headers 55 --- 8.2 generic-y 56 --- 8.3 generated-y 57 --- 8.4 mandatory-y 58 59 === 9 Kbuild Variables 60 === 10 Makefile language 61 === 11 Credits 62 === 12 TODO 63 641 Overview 65========== 66 67The Makefiles have five parts:: 68 69 Makefile the top Makefile. 70 .config the kernel configuration file. 71 arch/$(ARCH)/Makefile the arch Makefile. 72 scripts/Makefile.* common rules etc. for all kbuild Makefiles. 73 kbuild Makefiles there are about 500 of these. 74 75The top Makefile reads the .config file, which comes from the kernel 76configuration process. 77 78The top Makefile is responsible for building two major products: vmlinux 79(the resident kernel image) and modules (any module files). 80It builds these goals by recursively descending into the subdirectories of 81the kernel source tree. 82The list of subdirectories which are visited depends upon the kernel 83configuration. The top Makefile textually includes an arch Makefile 84with the name arch/$(ARCH)/Makefile. The arch Makefile supplies 85architecture-specific information to the top Makefile. 86 87Each subdirectory has a kbuild Makefile which carries out the commands 88passed down from above. The kbuild Makefile uses information from the 89.config file to construct various file lists used by kbuild to build 90any built-in or modular targets. 91 92scripts/Makefile.* contains all the definitions/rules etc. that 93are used to build the kernel based on the kbuild makefiles. 94 95 962 Who does what 97=============== 98 99People have four different relationships with the kernel Makefiles. 100 101*Users* are people who build kernels. These people type commands such as 102"make menuconfig" or "make". They usually do not read or edit 103any kernel Makefiles (or any other source files). 104 105*Normal developers* are people who work on features such as device 106drivers, file systems, and network protocols. These people need to 107maintain the kbuild Makefiles for the subsystem they are 108working on. In order to do this effectively, they need some overall 109knowledge about the kernel Makefiles, plus detailed knowledge about the 110public interface for kbuild. 111 112*Arch developers* are people who work on an entire architecture, such 113as sparc or ia64. Arch developers need to know about the arch Makefile 114as well as kbuild Makefiles. 115 116*Kbuild developers* are people who work on the kernel build system itself. 117These people need to know about all aspects of the kernel Makefiles. 118 119This document is aimed towards normal developers and arch developers. 120 121 1223 The kbuild files 123================== 124 125Most Makefiles within the kernel are kbuild Makefiles that use the 126kbuild infrastructure. This chapter introduces the syntax used in the 127kbuild makefiles. 128The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can 129be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild' 130file will be used. 131 132Section 3.1 "Goal definitions" is a quick intro, further chapters provide 133more details, with real examples. 134 1353.1 Goal definitions 136-------------------- 137 138 Goal definitions are the main part (heart) of the kbuild Makefile. 139 These lines define the files to be built, any special compilation 140 options, and any subdirectories to be entered recursively. 141 142 The most simple kbuild makefile contains one line: 143 144 Example:: 145 146 obj-y += foo.o 147 148 This tells kbuild that there is one object in that directory, named 149 foo.o. foo.o will be built from foo.c or foo.S. 150 151 If foo.o shall be built as a module, the variable obj-m is used. 152 Therefore the following pattern is often used: 153 154 Example:: 155 156 obj-$(CONFIG_FOO) += foo.o 157 158 $(CONFIG_FOO) evaluates to either y (for built-in) or m (for module). 159 If CONFIG_FOO is neither y nor m, then the file will not be compiled 160 nor linked. 161 1623.2 Built-in object goals - obj-y 163--------------------------------- 164 165 The kbuild Makefile specifies object files for vmlinux 166 in the $(obj-y) lists. These lists depend on the kernel 167 configuration. 168 169 Kbuild compiles all the $(obj-y) files. It then calls 170 "$(AR) rcSTP" to merge these files into one built-in.a file. 171 This is a thin archive without a symbol table. It will be later 172 linked into vmlinux by scripts/link-vmlinux.sh 173 174 The order of files in $(obj-y) is significant. Duplicates in 175 the lists are allowed: the first instance will be linked into 176 built-in.a and succeeding instances will be ignored. 177 178 Link order is significant, because certain functions 179 (module_init() / __initcall) will be called during boot in the 180 order they appear. So keep in mind that changing the link 181 order may e.g. change the order in which your SCSI 182 controllers are detected, and thus your disks are renumbered. 183 184 Example:: 185 186 #drivers/isdn/i4l/Makefile 187 # Makefile for the kernel ISDN subsystem and device drivers. 188 # Each configuration option enables a list of files. 189 obj-$(CONFIG_ISDN_I4L) += isdn.o 190 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o 191 1923.3 Loadable module goals - obj-m 193--------------------------------- 194 195 $(obj-m) specifies object files which are built as loadable 196 kernel modules. 197 198 A module may be built from one source file or several source 199 files. In the case of one source file, the kbuild makefile 200 simply adds the file to $(obj-m). 201 202 Example:: 203 204 #drivers/isdn/i4l/Makefile 205 obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o 206 207 Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm' 208 209 If a kernel module is built from several source files, you specify 210 that you want to build a module in the same way as above; however, 211 kbuild needs to know which object files you want to build your 212 module from, so you have to tell it by setting a $(<module_name>-y) 213 variable. 214 215 Example:: 216 217 #drivers/isdn/i4l/Makefile 218 obj-$(CONFIG_ISDN_I4L) += isdn.o 219 isdn-y := isdn_net_lib.o isdn_v110.o isdn_common.o 220 221 In this example, the module name will be isdn.o. Kbuild will 222 compile the objects listed in $(isdn-y) and then run 223 "$(LD) -r" on the list of these files to generate isdn.o. 224 225 Due to kbuild recognizing $(<module_name>-y) for composite objects, 226 you can use the value of a `CONFIG_` symbol to optionally include an 227 object file as part of a composite object. 228 229 Example:: 230 231 #fs/ext2/Makefile 232 obj-$(CONFIG_EXT2_FS) += ext2.o 233 ext2-y := balloc.o dir.o file.o ialloc.o inode.o ioctl.o \ 234 namei.o super.o symlink.o 235 ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o xattr_user.o \ 236 xattr_trusted.o 237 238 In this example, xattr.o, xattr_user.o and xattr_trusted.o are only 239 part of the composite object ext2.o if $(CONFIG_EXT2_FS_XATTR) 240 evaluates to 'y'. 241 242 Note: Of course, when you are building objects into the kernel, 243 the syntax above will also work. So, if you have CONFIG_EXT2_FS=y, 244 kbuild will build an ext2.o file for you out of the individual 245 parts and then link this into built-in.a, as you would expect. 246 2473.4 Objects which export symbols 248-------------------------------- 249 250 No special notation is required in the makefiles for 251 modules exporting symbols. 252 2533.5 Library file goals - lib-y 254------------------------------ 255 256 Objects listed with obj-* are used for modules, or 257 combined in a built-in.a for that specific directory. 258 There is also the possibility to list objects that will 259 be included in a library, lib.a. 260 All objects listed with lib-y are combined in a single 261 library for that directory. 262 Objects that are listed in obj-y and additionally listed in 263 lib-y will not be included in the library, since they will 264 be accessible anyway. 265 For consistency, objects listed in lib-m will be included in lib.a. 266 267 Note that the same kbuild makefile may list files to be built-in 268 and to be part of a library. Therefore the same directory 269 may contain both a built-in.a and a lib.a file. 270 271 Example:: 272 273 #arch/x86/lib/Makefile 274 lib-y := delay.o 275 276 This will create a library lib.a based on delay.o. For kbuild to 277 actually recognize that there is a lib.a being built, the directory 278 shall be listed in libs-y. 279 280 See also "6.4 List directories to visit when descending". 281 282 Use of lib-y is normally restricted to `lib/` and `arch/*/lib`. 283 2843.6 Descending down in directories 285---------------------------------- 286 287 A Makefile is only responsible for building objects in its own 288 directory. Files in subdirectories should be taken care of by 289 Makefiles in these subdirs. The build system will automatically 290 invoke make recursively in subdirectories, provided you let it know of 291 them. 292 293 To do so, obj-y and obj-m are used. 294 ext2 lives in a separate directory, and the Makefile present in fs/ 295 tells kbuild to descend down using the following assignment. 296 297 Example:: 298 299 #fs/Makefile 300 obj-$(CONFIG_EXT2_FS) += ext2/ 301 302 If CONFIG_EXT2_FS is set to either 'y' (built-in) or 'm' (modular) 303 the corresponding obj- variable will be set, and kbuild will descend 304 down in the ext2 directory. 305 306 Kbuild uses this information not only to decide that it needs to visit 307 the directory, but also to decide whether or not to link objects from 308 the directory into vmlinux. 309 310 When Kbuild descends into the directory with 'y', all built-in objects 311 from that directory are combined into the built-in.a, which will be 312 eventually linked into vmlinux. 313 314 When Kbuild descends into the directory with 'm', in contrast, nothing 315 from that directory will be linked into vmlinux. If the Makefile in 316 that directory specifies obj-y, those objects will be left orphan. 317 It is very likely a bug of the Makefile or of dependencies in Kconfig. 318 319 It is good practice to use a `CONFIG_` variable when assigning directory 320 names. This allows kbuild to totally skip the directory if the 321 corresponding `CONFIG_` option is neither 'y' nor 'm'. 322 3233.7 Compilation flags 324--------------------- 325 326 ccflags-y, asflags-y and ldflags-y 327 These three flags apply only to the kbuild makefile in which they 328 are assigned. They are used for all the normal cc, as and ld 329 invocations happening during a recursive build. 330 Note: Flags with the same behaviour were previously named: 331 EXTRA_CFLAGS, EXTRA_AFLAGS and EXTRA_LDFLAGS. 332 They are still supported but their usage is deprecated. 333 334 ccflags-y specifies options for compiling with $(CC). 335 336 Example:: 337 338 # drivers/acpi/acpica/Makefile 339 ccflags-y := -Os -D_LINUX -DBUILDING_ACPICA 340 ccflags-$(CONFIG_ACPI_DEBUG) += -DACPI_DEBUG_OUTPUT 341 342 This variable is necessary because the top Makefile owns the 343 variable $(KBUILD_CFLAGS) and uses it for compilation flags for the 344 entire tree. 345 346 asflags-y specifies assembler options. 347 348 Example:: 349 350 #arch/sparc/kernel/Makefile 351 asflags-y := -ansi 352 353 ldflags-y specifies options for linking with $(LD). 354 355 Example:: 356 357 #arch/cris/boot/compressed/Makefile 358 ldflags-y += -T $(srctree)/$(src)/decompress_$(arch-y).lds 359 360 subdir-ccflags-y, subdir-asflags-y 361 The two flags listed above are similar to ccflags-y and asflags-y. 362 The difference is that the subdir- variants have effect for the kbuild 363 file where they are present and all subdirectories. 364 Options specified using subdir-* are added to the commandline before 365 the options specified using the non-subdir variants. 366 367 Example:: 368 369 subdir-ccflags-y := -Werror 370 371 ccflags-remove-y, asflags-remove-y 372 These flags are used to remove particular flags for the compiler, 373 assembler invocations. 374 375 Example:: 376 377 ccflags-remove-$(CONFIG_MCOUNT) += -pg 378 379 CFLAGS_$@, AFLAGS_$@ 380 CFLAGS_$@ and AFLAGS_$@ only apply to commands in current 381 kbuild makefile. 382 383 $(CFLAGS_$@) specifies per-file options for $(CC). The $@ 384 part has a literal value which specifies the file that it is for. 385 386 CFLAGS_$@ has the higher priority than ccflags-remove-y; CFLAGS_$@ 387 can re-add compiler flags that were removed by ccflags-remove-y. 388 389 Example:: 390 391 # drivers/scsi/Makefile 392 CFLAGS_aha152x.o = -DAHA152X_STAT -DAUTOCONF 393 CFLAGS_gdth.o = # -DDEBUG_GDTH=2 -D__SERIAL__ -D__COM2__ \ 394 -DGDTH_STATISTICS 395 396 These two lines specify compilation flags for aha152x.o and gdth.o. 397 398 $(AFLAGS_$@) is a similar feature for source files in assembly 399 languages. 400 401 AFLAGS_$@ has the higher priority than asflags-remove-y; AFLAGS_$@ 402 can re-add assembler flags that were removed by asflags-remove-y. 403 404 Example:: 405 406 # arch/arm/kernel/Makefile 407 AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET) 408 AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 409 AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt 410 411 4123.9 Dependency tracking 413----------------------- 414 415 Kbuild tracks dependencies on the following: 416 417 1) All prerequisite files (both `*.c` and `*.h`) 418 2) `CONFIG_` options used in all prerequisite files 419 3) Command-line used to compile target 420 421 Thus, if you change an option to $(CC) all affected files will 422 be re-compiled. 423 4243.10 Special Rules 425------------------ 426 427 Special rules are used when the kbuild infrastructure does 428 not provide the required support. A typical example is 429 header files generated during the build process. 430 Another example are the architecture-specific Makefiles which 431 need special rules to prepare boot images etc. 432 433 Special rules are written as normal Make rules. 434 Kbuild is not executing in the directory where the Makefile is 435 located, so all special rules shall provide a relative 436 path to prerequisite files and target files. 437 438 Two variables are used when defining special rules: 439 440 $(src) 441 $(src) is a relative path which points to the directory 442 where the Makefile is located. Always use $(src) when 443 referring to files located in the src tree. 444 445 $(obj) 446 $(obj) is a relative path which points to the directory 447 where the target is saved. Always use $(obj) when 448 referring to generated files. 449 450 Example:: 451 452 #drivers/scsi/Makefile 453 $(obj)/53c8xx_d.h: $(src)/53c7,8xx.scr $(src)/script_asm.pl 454 $(CPP) -DCHIP=810 - < $< | ... $(src)/script_asm.pl 455 456 This is a special rule, following the normal syntax 457 required by make. 458 459 The target file depends on two prerequisite files. References 460 to the target file are prefixed with $(obj), references 461 to prerequisites are referenced with $(src) (because they are not 462 generated files). 463 464 $(kecho) 465 echoing information to user in a rule is often a good practice 466 but when execution "make -s" one does not expect to see any output 467 except for warnings/errors. 468 To support this kbuild defines $(kecho) which will echo out the 469 text following $(kecho) to stdout except if "make -s" is used. 470 471 Example:: 472 473 #arch/blackfin/boot/Makefile 474 $(obj)/vmImage: $(obj)/vmlinux.gz 475 $(call if_changed,uimage) 476 @$(kecho) 'Kernel: $@ is ready' 477 478 4793.11 $(CC) support functions 480---------------------------- 481 482 The kernel may be built with several different versions of 483 $(CC), each supporting a unique set of features and options. 484 kbuild provides basic support to check for valid options for $(CC). 485 $(CC) is usually the gcc compiler, but other alternatives are 486 available. 487 488 as-option 489 as-option is used to check if $(CC) -- when used to compile 490 assembler (`*.S`) files -- supports the given option. An optional 491 second option may be specified if the first option is not supported. 492 493 Example:: 494 495 #arch/sh/Makefile 496 cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),) 497 498 In the above example, cflags-y will be assigned the option 499 -Wa$(comma)-isa=$(isa-y) if it is supported by $(CC). 500 The second argument is optional, and if supplied will be used 501 if first argument is not supported. 502 503 as-instr 504 as-instr checks if the assembler reports a specific instruction 505 and then outputs either option1 or option2 506 C escapes are supported in the test instruction 507 Note: as-instr-option uses KBUILD_AFLAGS for assembler options 508 509 cc-option 510 cc-option is used to check if $(CC) supports a given option, and if 511 not supported to use an optional second option. 512 513 Example:: 514 515 #arch/x86/Makefile 516 cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586) 517 518 In the above example, cflags-y will be assigned the option 519 -march=pentium-mmx if supported by $(CC), otherwise -march=i586. 520 The second argument to cc-option is optional, and if omitted, 521 cflags-y will be assigned no value if first option is not supported. 522 Note: cc-option uses KBUILD_CFLAGS for $(CC) options 523 524 cc-option-yn 525 cc-option-yn is used to check if gcc supports a given option 526 and return 'y' if supported, otherwise 'n'. 527 528 Example:: 529 530 #arch/ppc/Makefile 531 biarch := $(call cc-option-yn, -m32) 532 aflags-$(biarch) += -a32 533 cflags-$(biarch) += -m32 534 535 In the above example, $(biarch) is set to y if $(CC) supports the -m32 536 option. When $(biarch) equals 'y', the expanded variables $(aflags-y) 537 and $(cflags-y) will be assigned the values -a32 and -m32, 538 respectively. 539 Note: cc-option-yn uses KBUILD_CFLAGS for $(CC) options 540 541 cc-disable-warning 542 cc-disable-warning checks if gcc supports a given warning and returns 543 the commandline switch to disable it. This special function is needed, 544 because gcc 4.4 and later accept any unknown -Wno-* option and only 545 warn about it if there is another warning in the source file. 546 547 Example:: 548 549 KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable) 550 551 In the above example, -Wno-unused-but-set-variable will be added to 552 KBUILD_CFLAGS only if gcc really accepts it. 553 554 cc-ifversion 555 cc-ifversion tests the version of $(CC) and equals the fourth parameter 556 if version expression is true, or the fifth (if given) if the version 557 expression is false. 558 559 Example:: 560 561 #fs/reiserfs/Makefile 562 ccflags-y := $(call cc-ifversion, -lt, 0402, -O1) 563 564 In this example, ccflags-y will be assigned the value -O1 if the 565 $(CC) version is less than 4.2. 566 cc-ifversion takes all the shell operators: 567 -eq, -ne, -lt, -le, -gt, and -ge 568 The third parameter may be a text as in this example, but it may also 569 be an expanded variable or a macro. 570 571 cc-cross-prefix 572 cc-cross-prefix is used to check if there exists a $(CC) in path with 573 one of the listed prefixes. The first prefix where there exist a 574 prefix$(CC) in the PATH is returned - and if no prefix$(CC) is found 575 then nothing is returned. 576 Additional prefixes are separated by a single space in the 577 call of cc-cross-prefix. 578 This functionality is useful for architecture Makefiles that try 579 to set CROSS_COMPILE to well-known values but may have several 580 values to select between. 581 It is recommended only to try to set CROSS_COMPILE if it is a cross 582 build (host arch is different from target arch). And if CROSS_COMPILE 583 is already set then leave it with the old value. 584 585 Example:: 586 587 #arch/m68k/Makefile 588 ifneq ($(SUBARCH),$(ARCH)) 589 ifeq ($(CROSS_COMPILE),) 590 CROSS_COMPILE := $(call cc-cross-prefix, m68k-linux-gnu-) 591 endif 592 endif 593 5943.12 $(LD) support functions 595---------------------------- 596 597 ld-option 598 ld-option is used to check if $(LD) supports the supplied option. 599 ld-option takes two options as arguments. 600 The second argument is an optional option that can be used if the 601 first option is not supported by $(LD). 602 603 Example:: 604 605 #Makefile 606 LDFLAGS_vmlinux += $(call ld-option, -X) 607 608 6094 Host Program support 610====================== 611 612Kbuild supports building executables on the host for use during the 613compilation stage. 614Two steps are required in order to use a host executable. 615 616The first step is to tell kbuild that a host program exists. This is 617done utilising the variable "hostprogs". 618 619The second step is to add an explicit dependency to the executable. 620This can be done in two ways. Either add the dependency in a rule, 621or utilise the variable "always-y". 622Both possibilities are described in the following. 623 6244.1 Simple Host Program 625----------------------- 626 627 In some cases there is a need to compile and run a program on the 628 computer where the build is running. 629 The following line tells kbuild that the program bin2hex shall be 630 built on the build host. 631 632 Example:: 633 634 hostprogs := bin2hex 635 636 Kbuild assumes in the above example that bin2hex is made from a single 637 c-source file named bin2hex.c located in the same directory as 638 the Makefile. 639 6404.2 Composite Host Programs 641--------------------------- 642 643 Host programs can be made up based on composite objects. 644 The syntax used to define composite objects for host programs is 645 similar to the syntax used for kernel objects. 646 $(<executable>-objs) lists all objects used to link the final 647 executable. 648 649 Example:: 650 651 #scripts/lxdialog/Makefile 652 hostprogs := lxdialog 653 lxdialog-objs := checklist.o lxdialog.o 654 655 Objects with extension .o are compiled from the corresponding .c 656 files. In the above example, checklist.c is compiled to checklist.o 657 and lxdialog.c is compiled to lxdialog.o. 658 659 Finally, the two .o files are linked to the executable, lxdialog. 660 Note: The syntax <executable>-y is not permitted for host-programs. 661 6624.3 Using C++ for host programs 663------------------------------- 664 665 kbuild offers support for host programs written in C++. This was 666 introduced solely to support kconfig, and is not recommended 667 for general use. 668 669 Example:: 670 671 #scripts/kconfig/Makefile 672 hostprogs := qconf 673 qconf-cxxobjs := qconf.o 674 675 In the example above the executable is composed of the C++ file 676 qconf.cc - identified by $(qconf-cxxobjs). 677 678 If qconf is composed of a mixture of .c and .cc files, then an 679 additional line can be used to identify this. 680 681 Example:: 682 683 #scripts/kconfig/Makefile 684 hostprogs := qconf 685 qconf-cxxobjs := qconf.o 686 qconf-objs := check.o 687 6884.4 Controlling compiler options for host programs 689-------------------------------------------------- 690 691 When compiling host programs, it is possible to set specific flags. 692 The programs will always be compiled utilising $(HOSTCC) passed 693 the options specified in $(KBUILD_HOSTCFLAGS). 694 To set flags that will take effect for all host programs created 695 in that Makefile, use the variable HOST_EXTRACFLAGS. 696 697 Example:: 698 699 #scripts/lxdialog/Makefile 700 HOST_EXTRACFLAGS += -I/usr/include/ncurses 701 702 To set specific flags for a single file the following construction 703 is used: 704 705 Example:: 706 707 #arch/ppc64/boot/Makefile 708 HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE) 709 710 It is also possible to specify additional options to the linker. 711 712 Example:: 713 714 #scripts/kconfig/Makefile 715 HOSTLDLIBS_qconf := -L$(QTDIR)/lib 716 717 When linking qconf, it will be passed the extra option 718 "-L$(QTDIR)/lib". 719 7204.5 When host programs are actually built 721----------------------------------------- 722 723 Kbuild will only build host-programs when they are referenced 724 as a prerequisite. 725 This is possible in two ways: 726 727 (1) List the prerequisite explicitly in a special rule. 728 729 Example:: 730 731 #drivers/pci/Makefile 732 hostprogs := gen-devlist 733 $(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist 734 ( cd $(obj); ./gen-devlist ) < $< 735 736 The target $(obj)/devlist.h will not be built before 737 $(obj)/gen-devlist is updated. Note that references to 738 the host programs in special rules must be prefixed with $(obj). 739 740 (2) Use always-y 741 742 When there is no suitable special rule, and the host program 743 shall be built when a makefile is entered, the always-y 744 variable shall be used. 745 746 Example:: 747 748 #scripts/lxdialog/Makefile 749 hostprogs := lxdialog 750 always-y := $(hostprogs) 751 752 This will tell kbuild to build lxdialog even if not referenced in 753 any rule. 754 7555 Userspace Program support 756=========================== 757 758Just like host programs, Kbuild also supports building userspace executables 759for the target architecture (i.e. the same architecture as you are building 760the kernel for). 761 762The syntax is quite similar. The difference is to use "userprogs" instead of 763"hostprogs". 764 7655.1 Simple Userspace Program 766---------------------------- 767 768 The following line tells kbuild that the program bpf-direct shall be 769 built for the target architecture. 770 771 Example:: 772 773 userprogs := bpf-direct 774 775 Kbuild assumes in the above example that bpf-direct is made from a 776 single C source file named bpf-direct.c located in the same directory 777 as the Makefile. 778 7795.2 Composite Userspace Programs 780-------------------------------- 781 782 Userspace programs can be made up based on composite objects. 783 The syntax used to define composite objects for userspace programs is 784 similar to the syntax used for kernel objects. 785 $(<executable>-objs) lists all objects used to link the final 786 executable. 787 788 Example:: 789 790 #samples/seccomp/Makefile 791 userprogs := bpf-fancy 792 bpf-fancy-objs := bpf-fancy.o bpf-helper.o 793 794 Objects with extension .o are compiled from the corresponding .c 795 files. In the above example, bpf-fancy.c is compiled to bpf-fancy.o 796 and bpf-helper.c is compiled to bpf-helper.o. 797 798 Finally, the two .o files are linked to the executable, bpf-fancy. 799 Note: The syntax <executable>-y is not permitted for userspace programs. 800 8015.3 Controlling compiler options for userspace programs 802------------------------------------------------------- 803 804 When compiling userspace programs, it is possible to set specific flags. 805 The programs will always be compiled utilising $(CC) passed 806 the options specified in $(KBUILD_USERCFLAGS). 807 To set flags that will take effect for all userspace programs created 808 in that Makefile, use the variable userccflags. 809 810 Example:: 811 812 # samples/seccomp/Makefile 813 userccflags += -I usr/include 814 815 To set specific flags for a single file the following construction 816 is used: 817 818 Example:: 819 820 bpf-helper-userccflags += -I user/include 821 822 It is also possible to specify additional options to the linker. 823 824 Example:: 825 826 # net/bpfilter/Makefile 827 bpfilter_umh-userldflags += -static 828 829 When linking bpfilter_umh, it will be passed the extra option -static. 830 8315.4 When userspace programs are actually built 832---------------------------------------------- 833 834 Same as "When host programs are actually built". 835 8366 Kbuild clean infrastructure 837============================= 838 839"make clean" deletes most generated files in the obj tree where the kernel 840is compiled. This includes generated files such as host programs. 841Kbuild knows targets listed in $(hostprogs), $(always-y), $(always-m), 842$(always-), $(extra-y), $(extra-) and $(targets). They are all deleted 843during "make clean". Files matching the patterns "*.[oas]", "*.ko", plus 844some additional files generated by kbuild are deleted all over the kernel 845source tree when "make clean" is executed. 846 847Additional files or directories can be specified in kbuild makefiles by use of 848$(clean-files). 849 850 Example:: 851 852 #lib/Makefile 853 clean-files := crc32table.h 854 855When executing "make clean", the file "crc32table.h" will be deleted. 856Kbuild will assume files to be in the same relative directory as the 857Makefile, except if prefixed with $(objtree). 858 859To exclude certain files or directories from make clean, use the 860$(no-clean-files) variable. 861 862Usually kbuild descends down in subdirectories due to "obj-* := dir/", 863but in the architecture makefiles where the kbuild infrastructure 864is not sufficient this sometimes needs to be explicit. 865 866 Example:: 867 868 #arch/x86/boot/Makefile 869 subdir- := compressed 870 871The above assignment instructs kbuild to descend down in the 872directory compressed/ when "make clean" is executed. 873 874To support the clean infrastructure in the Makefiles that build the 875final bootimage there is an optional target named archclean: 876 877 Example:: 878 879 #arch/x86/Makefile 880 archclean: 881 $(Q)$(MAKE) $(clean)=arch/x86/boot 882 883When "make clean" is executed, make will descend down in arch/x86/boot, 884and clean as usual. The Makefile located in arch/x86/boot/ may use 885the subdir- trick to descend further down. 886 887Note 1: arch/$(ARCH)/Makefile cannot use "subdir-", because that file is 888included in the top level makefile, and the kbuild infrastructure 889is not operational at that point. 890 891Note 2: All directories listed in core-y, libs-y, drivers-y and net-y will 892be visited during "make clean". 893 8947 Architecture Makefiles 895======================== 896 897The top level Makefile sets up the environment and does the preparation, 898before starting to descend down in the individual directories. 899The top level makefile contains the generic part, whereas 900arch/$(ARCH)/Makefile contains what is required to set up kbuild 901for said architecture. 902To do so, arch/$(ARCH)/Makefile sets up a number of variables and defines 903a few targets. 904 905When kbuild executes, the following steps are followed (roughly): 906 9071) Configuration of the kernel => produce .config 9082) Store kernel version in include/linux/version.h 9093) Updating all other prerequisites to the target prepare: 910 - Additional prerequisites are specified in arch/$(ARCH)/Makefile 9114) Recursively descend down in all directories listed in 912 init-* core* drivers-* net-* libs-* and build all targets. 913 - The values of the above variables are expanded in arch/$(ARCH)/Makefile. 9145) All object files are then linked and the resulting file vmlinux is 915 located at the root of the obj tree. 916 The very first objects linked are listed in head-y, assigned by 917 arch/$(ARCH)/Makefile. 9186) Finally, the architecture-specific part does any required post processing 919 and builds the final bootimage. 920 - This includes building boot records 921 - Preparing initrd images and the like 922 923 9247.1 Set variables to tweak the build to the architecture 925-------------------------------------------------------- 926 927 KBUILD_LDFLAGS 928 Generic $(LD) options 929 930 Flags used for all invocations of the linker. 931 Often specifying the emulation is sufficient. 932 933 Example:: 934 935 #arch/s390/Makefile 936 KBUILD_LDFLAGS := -m elf_s390 937 938 Note: ldflags-y can be used to further customise 939 the flags used. See chapter 3.7. 940 941 LDFLAGS_vmlinux 942 Options for $(LD) when linking vmlinux 943 944 LDFLAGS_vmlinux is used to specify additional flags to pass to 945 the linker when linking the final vmlinux image. 946 LDFLAGS_vmlinux uses the LDFLAGS_$@ support. 947 948 Example:: 949 950 #arch/x86/Makefile 951 LDFLAGS_vmlinux := -e stext 952 953 OBJCOPYFLAGS 954 objcopy flags 955 956 When $(call if_changed,objcopy) is used to translate a .o file, 957 the flags specified in OBJCOPYFLAGS will be used. 958 $(call if_changed,objcopy) is often used to generate raw binaries on 959 vmlinux. 960 961 Example:: 962 963 #arch/s390/Makefile 964 OBJCOPYFLAGS := -O binary 965 966 #arch/s390/boot/Makefile 967 $(obj)/image: vmlinux FORCE 968 $(call if_changed,objcopy) 969 970 In this example, the binary $(obj)/image is a binary version of 971 vmlinux. The usage of $(call if_changed,xxx) will be described later. 972 973 KBUILD_AFLAGS 974 Assembler flags 975 976 Default value - see top level Makefile 977 Append or modify as required per architecture. 978 979 Example:: 980 981 #arch/sparc64/Makefile 982 KBUILD_AFLAGS += -m64 -mcpu=ultrasparc 983 984 KBUILD_CFLAGS 985 $(CC) compiler flags 986 987 Default value - see top level Makefile 988 Append or modify as required per architecture. 989 990 Often, the KBUILD_CFLAGS variable depends on the configuration. 991 992 Example:: 993 994 #arch/x86/boot/compressed/Makefile 995 cflags-$(CONFIG_X86_32) := -march=i386 996 cflags-$(CONFIG_X86_64) := -mcmodel=small 997 KBUILD_CFLAGS += $(cflags-y) 998 999 Many arch Makefiles dynamically run the target C compiler to 1000 probe supported options:: 1001 1002 #arch/x86/Makefile 1003 1004 ... 1005 cflags-$(CONFIG_MPENTIUMII) += $(call cc-option,\ 1006 -march=pentium2,-march=i686) 1007 ... 1008 # Disable unit-at-a-time mode ... 1009 KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time) 1010 ... 1011 1012 1013 The first example utilises the trick that a config option expands 1014 to 'y' when selected. 1015 1016 KBUILD_AFLAGS_KERNEL 1017 Assembler options specific for built-in 1018 1019 $(KBUILD_AFLAGS_KERNEL) contains extra C compiler flags used to compile 1020 resident kernel code. 1021 1022 KBUILD_AFLAGS_MODULE 1023 Assembler options specific for modules 1024 1025 $(KBUILD_AFLAGS_MODULE) is used to add arch-specific options that 1026 are used for assembler. 1027 1028 From commandline AFLAGS_MODULE shall be used (see kbuild.rst). 1029 1030 KBUILD_CFLAGS_KERNEL 1031 $(CC) options specific for built-in 1032 1033 $(KBUILD_CFLAGS_KERNEL) contains extra C compiler flags used to compile 1034 resident kernel code. 1035 1036 KBUILD_CFLAGS_MODULE 1037 Options for $(CC) when building modules 1038 1039 $(KBUILD_CFLAGS_MODULE) is used to add arch-specific options that 1040 are used for $(CC). 1041 From commandline CFLAGS_MODULE shall be used (see kbuild.rst). 1042 1043 KBUILD_LDFLAGS_MODULE 1044 Options for $(LD) when linking modules 1045 1046 $(KBUILD_LDFLAGS_MODULE) is used to add arch-specific options 1047 used when linking modules. This is often a linker script. 1048 1049 From commandline LDFLAGS_MODULE shall be used (see kbuild.rst). 1050 1051 KBUILD_LDS 1052 1053 The linker script with full path. Assigned by the top-level Makefile. 1054 1055 KBUILD_LDS_MODULE 1056 1057 The module linker script with full path. Assigned by the top-level 1058 Makefile and additionally by the arch Makefile. 1059 1060 KBUILD_VMLINUX_OBJS 1061 1062 All object files for vmlinux. They are linked to vmlinux in the same 1063 order as listed in KBUILD_VMLINUX_OBJS. 1064 1065 KBUILD_VMLINUX_LIBS 1066 1067 All .a "lib" files for vmlinux. KBUILD_VMLINUX_OBJS and 1068 KBUILD_VMLINUX_LIBS together specify all the object files used to 1069 link vmlinux. 1070 10717.2 Add prerequisites to archheaders 1072------------------------------------ 1073 1074 The archheaders: rule is used to generate header files that 1075 may be installed into user space by "make header_install". 1076 1077 It is run before "make archprepare" when run on the 1078 architecture itself. 1079 1080 10817.3 Add prerequisites to archprepare 1082------------------------------------ 1083 1084 The archprepare: rule is used to list prerequisites that need to be 1085 built before starting to descend down in the subdirectories. 1086 This is usually used for header files containing assembler constants. 1087 1088 Example:: 1089 1090 #arch/arm/Makefile 1091 archprepare: maketools 1092 1093 In this example, the file target maketools will be processed 1094 before descending down in the subdirectories. 1095 See also chapter XXX-TODO that describe how kbuild supports 1096 generating offset header files. 1097 1098 10997.4 List directories to visit when descending 1100--------------------------------------------- 1101 1102 An arch Makefile cooperates with the top Makefile to define variables 1103 which specify how to build the vmlinux file. Note that there is no 1104 corresponding arch-specific section for modules; the module-building 1105 machinery is all architecture-independent. 1106 1107 1108 head-y, init-y, core-y, libs-y, drivers-y, net-y 1109 $(head-y) lists objects to be linked first in vmlinux. 1110 1111 $(libs-y) lists directories where a lib.a archive can be located. 1112 1113 The rest list directories where a built-in.a object file can be 1114 located. 1115 1116 $(init-y) objects will be located after $(head-y). 1117 1118 Then the rest follows in this order: 1119 1120 $(core-y), $(libs-y), $(drivers-y) and $(net-y). 1121 1122 The top level Makefile defines values for all generic directories, 1123 and arch/$(ARCH)/Makefile only adds architecture-specific 1124 directories. 1125 1126 Example:: 1127 1128 #arch/sparc64/Makefile 1129 core-y += arch/sparc64/kernel/ 1130 libs-y += arch/sparc64/prom/ arch/sparc64/lib/ 1131 drivers-$(CONFIG_OPROFILE) += arch/sparc64/oprofile/ 1132 1133 11347.5 Architecture-specific boot images 1135------------------------------------- 1136 1137 An arch Makefile specifies goals that take the vmlinux file, compress 1138 it, wrap it in bootstrapping code, and copy the resulting files 1139 somewhere. This includes various kinds of installation commands. 1140 The actual goals are not standardized across architectures. 1141 1142 It is common to locate any additional processing in a boot/ 1143 directory below arch/$(ARCH)/. 1144 1145 Kbuild does not provide any smart way to support building a 1146 target specified in boot/. Therefore arch/$(ARCH)/Makefile shall 1147 call make manually to build a target in boot/. 1148 1149 The recommended approach is to include shortcuts in 1150 arch/$(ARCH)/Makefile, and use the full path when calling down 1151 into the arch/$(ARCH)/boot/Makefile. 1152 1153 Example:: 1154 1155 #arch/x86/Makefile 1156 boot := arch/x86/boot 1157 bzImage: vmlinux 1158 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ 1159 1160 "$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke 1161 make in a subdirectory. 1162 1163 There are no rules for naming architecture-specific targets, 1164 but executing "make help" will list all relevant targets. 1165 To support this, $(archhelp) must be defined. 1166 1167 Example:: 1168 1169 #arch/x86/Makefile 1170 define archhelp 1171 echo '* bzImage - Image (arch/$(ARCH)/boot/bzImage)' 1172 endif 1173 1174 When make is executed without arguments, the first goal encountered 1175 will be built. In the top level Makefile the first goal present 1176 is all:. 1177 An architecture shall always, per default, build a bootable image. 1178 In "make help", the default goal is highlighted with a '*'. 1179 Add a new prerequisite to all: to select a default goal different 1180 from vmlinux. 1181 1182 Example:: 1183 1184 #arch/x86/Makefile 1185 all: bzImage 1186 1187 When "make" is executed without arguments, bzImage will be built. 1188 11897.6 Building non-kbuild targets 1190------------------------------- 1191 1192 extra-y 1193 extra-y specifies additional targets created in the current 1194 directory, in addition to any targets specified by `obj-*`. 1195 1196 Listing all targets in extra-y is required for two purposes: 1197 1198 1) Enable kbuild to check changes in command lines 1199 1200 - When $(call if_changed,xxx) is used 1201 1202 2) kbuild knows what files to delete during "make clean" 1203 1204 Example:: 1205 1206 #arch/x86/kernel/Makefile 1207 extra-y := head.o init_task.o 1208 1209 In this example, extra-y is used to list object files that 1210 shall be built, but shall not be linked as part of built-in.a. 1211 12127.7 Commands useful for building a boot image 1213--------------------------------------------- 1214 1215 Kbuild provides a few macros that are useful when building a 1216 boot image. 1217 1218 if_changed 1219 if_changed is the infrastructure used for the following commands. 1220 1221 Usage:: 1222 1223 target: source(s) FORCE 1224 $(call if_changed,ld/objcopy/gzip/...) 1225 1226 When the rule is evaluated, it is checked to see if any files 1227 need an update, or the command line has changed since the last 1228 invocation. The latter will force a rebuild if any options 1229 to the executable have changed. 1230 Any target that utilises if_changed must be listed in $(targets), 1231 otherwise the command line check will fail, and the target will 1232 always be built. 1233 Assignments to $(targets) are without $(obj)/ prefix. 1234 if_changed may be used in conjunction with custom commands as 1235 defined in 6.8 "Custom kbuild commands". 1236 1237 Note: It is a typical mistake to forget the FORCE prerequisite. 1238 Another common pitfall is that whitespace is sometimes 1239 significant; for instance, the below will fail (note the extra space 1240 after the comma):: 1241 1242 target: source(s) FORCE 1243 1244 **WRONG!** $(call if_changed, ld/objcopy/gzip/...) 1245 1246 Note: 1247 if_changed should not be used more than once per target. 1248 It stores the executed command in a corresponding .cmd 1249 1250 file and multiple calls would result in overwrites and 1251 unwanted results when the target is up to date and only the 1252 tests on changed commands trigger execution of commands. 1253 1254 ld 1255 Link target. Often, LDFLAGS_$@ is used to set specific options to ld. 1256 1257 Example:: 1258 1259 #arch/x86/boot/Makefile 1260 LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary 1261 LDFLAGS_setup := -Ttext 0x0 -s --oformat binary -e begtext 1262 1263 targets += setup setup.o bootsect bootsect.o 1264 $(obj)/setup $(obj)/bootsect: %: %.o FORCE 1265 $(call if_changed,ld) 1266 1267 In this example, there are two possible targets, requiring different 1268 options to the linker. The linker options are specified using the 1269 LDFLAGS_$@ syntax - one for each potential target. 1270 $(targets) are assigned all potential targets, by which kbuild knows 1271 the targets and will: 1272 1273 1) check for commandline changes 1274 2) delete target during make clean 1275 1276 The ": %: %.o" part of the prerequisite is a shorthand that 1277 frees us from listing the setup.o and bootsect.o files. 1278 1279 Note: 1280 It is a common mistake to forget the "targets :=" assignment, 1281 resulting in the target file being recompiled for no 1282 obvious reason. 1283 1284 objcopy 1285 Copy binary. Uses OBJCOPYFLAGS usually specified in 1286 arch/$(ARCH)/Makefile. 1287 OBJCOPYFLAGS_$@ may be used to set additional options. 1288 1289 gzip 1290 Compress target. Use maximum compression to compress target. 1291 1292 Example:: 1293 1294 #arch/x86/boot/compressed/Makefile 1295 $(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE 1296 $(call if_changed,gzip) 1297 1298 dtc 1299 Create flattened device tree blob object suitable for linking 1300 into vmlinux. Device tree blobs linked into vmlinux are placed 1301 in an init section in the image. Platform code *must* copy the 1302 blob to non-init memory prior to calling unflatten_device_tree(). 1303 1304 To use this command, simply add `*.dtb` into obj-y or targets, or make 1305 some other target depend on `%.dtb` 1306 1307 A central rule exists to create `$(obj)/%.dtb` from `$(src)/%.dts`; 1308 architecture Makefiles do no need to explicitly write out that rule. 1309 1310 Example:: 1311 1312 targets += $(dtb-y) 1313 DTC_FLAGS ?= -p 1024 1314 13157.8 Custom kbuild commands 1316-------------------------- 1317 1318 When kbuild is executing with KBUILD_VERBOSE=0, then only a shorthand 1319 of a command is normally displayed. 1320 To enable this behaviour for custom commands kbuild requires 1321 two variables to be set:: 1322 1323 quiet_cmd_<command> - what shall be echoed 1324 cmd_<command> - the command to execute 1325 1326 Example:: 1327 1328 # 1329 quiet_cmd_image = BUILD $@ 1330 cmd_image = $(obj)/tools/build $(BUILDFLAGS) \ 1331 $(obj)/vmlinux.bin > $@ 1332 1333 targets += bzImage 1334 $(obj)/bzImage: $(obj)/vmlinux.bin $(obj)/tools/build FORCE 1335 $(call if_changed,image) 1336 @echo 'Kernel: $@ is ready' 1337 1338 When updating the $(obj)/bzImage target, the line: 1339 1340 BUILD arch/x86/boot/bzImage 1341 1342 will be displayed with "make KBUILD_VERBOSE=0". 1343 1344 13457.9 Preprocessing linker scripts 1346-------------------------------- 1347 1348 When the vmlinux image is built, the linker script 1349 arch/$(ARCH)/kernel/vmlinux.lds is used. 1350 The script is a preprocessed variant of the file vmlinux.lds.S 1351 located in the same directory. 1352 kbuild knows .lds files and includes a rule `*lds.S` -> `*lds`. 1353 1354 Example:: 1355 1356 #arch/x86/kernel/Makefile 1357 extra-y := vmlinux.lds 1358 1359 #Makefile 1360 export CPPFLAGS_vmlinux.lds += -P -C -U$(ARCH) 1361 1362 The assignment to extra-y is used to tell kbuild to build the 1363 target vmlinux.lds. 1364 The assignment to $(CPPFLAGS_vmlinux.lds) tells kbuild to use the 1365 specified options when building the target vmlinux.lds. 1366 1367 When building the `*.lds` target, kbuild uses the variables:: 1368 1369 KBUILD_CPPFLAGS : Set in top-level Makefile 1370 cppflags-y : May be set in the kbuild makefile 1371 CPPFLAGS_$(@F) : Target-specific flags. 1372 Note that the full filename is used in this 1373 assignment. 1374 1375 The kbuild infrastructure for `*lds` files is used in several 1376 architecture-specific files. 1377 13787.10 Generic header files 1379------------------------- 1380 1381 The directory include/asm-generic contains the header files 1382 that may be shared between individual architectures. 1383 The recommended approach how to use a generic header file is 1384 to list the file in the Kbuild file. 1385 See "7.2 generic-y" for further info on syntax etc. 1386 13877.11 Post-link pass 1388------------------- 1389 1390 If the file arch/xxx/Makefile.postlink exists, this makefile 1391 will be invoked for post-link objects (vmlinux and modules.ko) 1392 for architectures to run post-link passes on. Must also handle 1393 the clean target. 1394 1395 This pass runs after kallsyms generation. If the architecture 1396 needs to modify symbol locations, rather than manipulate the 1397 kallsyms, it may be easier to add another postlink target for 1398 .tmp_vmlinux? targets to be called from link-vmlinux.sh. 1399 1400 For example, powerpc uses this to check relocation sanity of 1401 the linked vmlinux file. 1402 14038 Kbuild syntax for exported headers 1404------------------------------------ 1405 1406The kernel includes a set of headers that is exported to userspace. 1407Many headers can be exported as-is but other headers require a 1408minimal pre-processing before they are ready for user-space. 1409The pre-processing does: 1410 1411- drop kernel-specific annotations 1412- drop include of compiler.h 1413- drop all sections that are kernel internal (guarded by `ifdef __KERNEL__`) 1414 1415All headers under include/uapi/, include/generated/uapi/, 1416arch/<arch>/include/uapi/ and arch/<arch>/include/generated/uapi/ 1417are exported. 1418 1419A Kbuild file may be defined under arch/<arch>/include/uapi/asm/ and 1420arch/<arch>/include/asm/ to list asm files coming from asm-generic. 1421See subsequent chapter for the syntax of the Kbuild file. 1422 14238.1 no-export-headers 1424--------------------- 1425 1426 no-export-headers is essentially used by include/uapi/linux/Kbuild to 1427 avoid exporting specific headers (e.g. kvm.h) on architectures that do 1428 not support it. It should be avoided as much as possible. 1429 14308.2 generic-y 1431------------- 1432 1433 If an architecture uses a verbatim copy of a header from 1434 include/asm-generic then this is listed in the file 1435 arch/$(ARCH)/include/asm/Kbuild like this: 1436 1437 Example:: 1438 1439 #arch/x86/include/asm/Kbuild 1440 generic-y += termios.h 1441 generic-y += rtc.h 1442 1443 During the prepare phase of the build a wrapper include 1444 file is generated in the directory:: 1445 1446 arch/$(ARCH)/include/generated/asm 1447 1448 When a header is exported where the architecture uses 1449 the generic header a similar wrapper is generated as part 1450 of the set of exported headers in the directory:: 1451 1452 usr/include/asm 1453 1454 The generated wrapper will in both cases look like the following: 1455 1456 Example: termios.h:: 1457 1458 #include <asm-generic/termios.h> 1459 14608.3 generated-y 1461--------------- 1462 1463 If an architecture generates other header files alongside generic-y 1464 wrappers, generated-y specifies them. 1465 1466 This prevents them being treated as stale asm-generic wrappers and 1467 removed. 1468 1469 Example:: 1470 1471 #arch/x86/include/asm/Kbuild 1472 generated-y += syscalls_32.h 1473 14748.4 mandatory-y 1475--------------- 1476 1477 mandatory-y is essentially used by include/(uapi/)asm-generic/Kbuild 1478 to define the minimum set of ASM headers that all architectures must have. 1479 1480 This works like optional generic-y. If a mandatory header is missing 1481 in arch/$(ARCH)/include/(uapi/)/asm, Kbuild will automatically generate 1482 a wrapper of the asm-generic one. 1483 14849 Kbuild Variables 1485================== 1486 1487The top Makefile exports the following variables: 1488 1489 VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION 1490 These variables define the current kernel version. A few arch 1491 Makefiles actually use these values directly; they should use 1492 $(KERNELRELEASE) instead. 1493 1494 $(VERSION), $(PATCHLEVEL), and $(SUBLEVEL) define the basic 1495 three-part version number, such as "2", "4", and "0". These three 1496 values are always numeric. 1497 1498 $(EXTRAVERSION) defines an even tinier sublevel for pre-patches 1499 or additional patches. It is usually some non-numeric string 1500 such as "-pre4", and is often blank. 1501 1502 KERNELRELEASE 1503 $(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable 1504 for constructing installation directory names or showing in 1505 version strings. Some arch Makefiles use it for this purpose. 1506 1507 ARCH 1508 This variable defines the target architecture, such as "i386", 1509 "arm", or "sparc". Some kbuild Makefiles test $(ARCH) to 1510 determine which files to compile. 1511 1512 By default, the top Makefile sets $(ARCH) to be the same as the 1513 host system architecture. For a cross build, a user may 1514 override the value of $(ARCH) on the command line:: 1515 1516 make ARCH=m68k ... 1517 1518 1519 INSTALL_PATH 1520 This variable defines a place for the arch Makefiles to install 1521 the resident kernel image and System.map file. 1522 Use this for architecture-specific install targets. 1523 1524 INSTALL_MOD_PATH, MODLIB 1525 $(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module 1526 installation. This variable is not defined in the Makefile but 1527 may be passed in by the user if desired. 1528 1529 $(MODLIB) specifies the directory for module installation. 1530 The top Makefile defines $(MODLIB) to 1531 $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE). The user may 1532 override this value on the command line if desired. 1533 1534 INSTALL_MOD_STRIP 1535 If this variable is specified, it will cause modules to be stripped 1536 after they are installed. If INSTALL_MOD_STRIP is '1', then the 1537 default option --strip-debug will be used. Otherwise, the 1538 INSTALL_MOD_STRIP value will be used as the option(s) to the strip 1539 command. 1540 1541 154210 Makefile language 1543==================== 1544 1545The kernel Makefiles are designed to be run with GNU Make. The Makefiles 1546use only the documented features of GNU Make, but they do use many 1547GNU extensions. 1548 1549GNU Make supports elementary list-processing functions. The kernel 1550Makefiles use a novel style of list building and manipulation with few 1551"if" statements. 1552 1553GNU Make has two assignment operators, ":=" and "=". ":=" performs 1554immediate evaluation of the right-hand side and stores an actual string 1555into the left-hand side. "=" is like a formula definition; it stores the 1556right-hand side in an unevaluated form and then evaluates this form each 1557time the left-hand side is used. 1558 1559There are some cases where "=" is appropriate. Usually, though, ":=" 1560is the right choice. 1561 156211 Credits 1563========== 1564 1565- Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net> 1566- Updates by Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de> 1567- Updates by Sam Ravnborg <sam@ravnborg.org> 1568- Language QA by Jan Engelhardt <jengelh@gmx.de> 1569 157012 TODO 1571======= 1572 1573- Describe how kbuild supports shipped files with _shipped. 1574- Generating offset header files. 1575- Add more variables to section 7? 1576