1======================
2SMBus Protocol Summary
3======================
4
5The following is a summary of the SMBus protocol. It applies to
6all revisions of the protocol (1.0, 1.1, and 2.0).
7Certain protocol features which are not supported by
8this package are briefly described at the end of this document.
9
10Some adapters understand only the SMBus (System Management Bus) protocol,
11which is a subset from the I2C protocol. Fortunately, many devices use
12only the same subset, which makes it possible to put them on an SMBus.
13
14If you write a driver for some I2C device, please try to use the SMBus
15commands if at all possible (if the device uses only that subset of the
16I2C protocol). This makes it possible to use the device driver on both
17SMBus adapters and I2C adapters (the SMBus command set is automatically
18translated to I2C on I2C adapters, but plain I2C commands can not be
19handled at all on most pure SMBus adapters).
20
21Below is a list of SMBus protocol operations, and the functions executing
22them.  Note that the names used in the SMBus protocol specifications usually
23don't match these function names.  For some of the operations which pass a
24single data byte, the functions using SMBus protocol operation names execute
25a different protocol operation entirely.
26
27Each transaction type corresponds to a functionality flag. Before calling a
28transaction function, a device driver should always check (just once) for
29the corresponding functionality flag to ensure that the underlying I2C
30adapter supports the transaction in question. See
31<file:Documentation/i2c/functionality.rst> for the details.
32
33
34Key to symbols
35==============
36
37=============== =============================================================
38S     (1 bit) : Start bit
39P     (1 bit) : Stop bit
40Rd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0.
41A, NA (1 bit) : Accept and reverse accept bit.
42Addr  (7 bits): I2C 7 bit address. Note that this can be expanded as usual to
43                get a 10 bit I2C address.
44Comm  (8 bits): Command byte, a data byte which often selects a register on
45                the device.
46Data  (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh
47                for 16 bit data.
48Count (8 bits): A data byte containing the length of a block operation.
49
50[..]:           Data sent by I2C device, as opposed to data sent by the host
51                adapter.
52=============== =============================================================
53
54
55SMBus Quick Command
56===================
57
58This sends a single bit to the device, at the place of the Rd/Wr bit::
59
60  A Addr Rd/Wr [A] P
61
62Functionality flag: I2C_FUNC_SMBUS_QUICK
63
64
65SMBus Receive Byte:  i2c_smbus_read_byte()
66==========================================
67
68This reads a single byte from a device, without specifying a device
69register. Some devices are so simple that this interface is enough; for
70others, it is a shorthand if you want to read the same register as in
71the previous SMBus command::
72
73  S Addr Rd [A] [Data] NA P
74
75Functionality flag: I2C_FUNC_SMBUS_READ_BYTE
76
77
78SMBus Send Byte:  i2c_smbus_write_byte()
79========================================
80
81This operation is the reverse of Receive Byte: it sends a single byte
82to a device.  See Receive Byte for more information.
83
84::
85
86  S Addr Wr [A] Data [A] P
87
88Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE
89
90
91SMBus Read Byte:  i2c_smbus_read_byte_data()
92============================================
93
94This reads a single byte from a device, from a designated register.
95The register is specified through the Comm byte::
96
97  S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P
98
99Functionality flag: I2C_FUNC_SMBUS_READ_BYTE_DATA
100
101
102SMBus Read Word:  i2c_smbus_read_word_data()
103============================================
104
105This operation is very like Read Byte; again, data is read from a
106device, from a designated register that is specified through the Comm
107byte. But this time, the data is a complete word (16 bits)::
108
109  S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P
110
111Functionality flag: I2C_FUNC_SMBUS_READ_WORD_DATA
112
113Note the convenience function i2c_smbus_read_word_swapped is
114available for reads where the two data bytes are the other way
115around (not SMBus compliant, but very popular.)
116
117
118SMBus Write Byte:  i2c_smbus_write_byte_data()
119==============================================
120
121This writes a single byte to a device, to a designated register. The
122register is specified through the Comm byte. This is the opposite of
123the Read Byte operation.
124
125::
126
127  S Addr Wr [A] Comm [A] Data [A] P
128
129Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_DATA
130
131
132SMBus Write Word:  i2c_smbus_write_word_data()
133==============================================
134
135This is the opposite of the Read Word operation. 16 bits
136of data is written to a device, to the designated register that is
137specified through the Comm byte.::
138
139  S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P
140
141Functionality flag: I2C_FUNC_SMBUS_WRITE_WORD_DATA
142
143Note the convenience function i2c_smbus_write_word_swapped is
144available for writes where the two data bytes are the other way
145around (not SMBus compliant, but very popular.)
146
147
148SMBus Process Call:
149===================
150
151This command selects a device register (through the Comm byte), sends
15216 bits of data to it, and reads 16 bits of data in return::
153
154  S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A]
155                               S Addr Rd [A] [DataLow] A [DataHigh] NA P
156
157Functionality flag: I2C_FUNC_SMBUS_PROC_CALL
158
159
160SMBus Block Read:  i2c_smbus_read_block_data()
161==============================================
162
163This command reads a block of up to 32 bytes from a device, from a
164designated register that is specified through the Comm byte. The amount
165of data is specified by the device in the Count byte.
166
167::
168
169  S Addr Wr [A] Comm [A]
170             S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P
171
172Functionality flag: I2C_FUNC_SMBUS_READ_BLOCK_DATA
173
174
175SMBus Block Write:  i2c_smbus_write_block_data()
176================================================
177
178The opposite of the Block Read command, this writes up to 32 bytes to
179a device, to a designated register that is specified through the
180Comm byte. The amount of data is specified in the Count byte.
181
182::
183
184  S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P
185
186Functionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK_DATA
187
188
189SMBus Block Write - Block Read Process Call
190===========================================
191
192SMBus Block Write - Block Read Process Call was introduced in
193Revision 2.0 of the specification.
194
195This command selects a device register (through the Comm byte), sends
1961 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return::
197
198  S Addr Wr [A] Comm [A] Count [A] Data [A] ...
199                               S Addr Rd [A] [Count] A [Data] ... A P
200
201Functionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_CALL
202
203
204SMBus Host Notify
205=================
206
207This command is sent from a SMBus device acting as a master to the
208SMBus host acting as a slave.
209It is the same form as Write Word, with the command code replaced by the
210alerting device's address.
211
212::
213
214  [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P]
215
216This is implemented in the following way in the Linux kernel:
217
218* I2C bus drivers which support SMBus Host Notify should report
219  I2C_FUNC_SMBUS_HOST_NOTIFY.
220* I2C bus drivers trigger SMBus Host Notify by a call to
221  i2c_handle_smbus_host_notify().
222* I2C drivers for devices which can trigger SMBus Host Notify will have
223  client->irq assigned to a Host Notify IRQ if noone else specified an other.
224
225There is currently no way to retrieve the data parameter from the client.
226
227
228Packet Error Checking (PEC)
229===========================
230
231Packet Error Checking was introduced in Revision 1.1 of the specification.
232
233PEC adds a CRC-8 error-checking byte to transfers using it, immediately
234before the terminating STOP.
235
236
237Address Resolution Protocol (ARP)
238=================================
239
240The Address Resolution Protocol was introduced in Revision 2.0 of
241the specification. It is a higher-layer protocol which uses the
242messages above.
243
244ARP adds device enumeration and dynamic address assignment to
245the protocol. All ARP communications use slave address 0x61 and
246require PEC checksums.
247
248
249SMBus Alert
250===========
251
252SMBus Alert was introduced in Revision 1.0 of the specification.
253
254The SMBus alert protocol allows several SMBus slave devices to share a
255single interrupt pin on the SMBus master, while still allowing the master
256to know which slave triggered the interrupt.
257
258This is implemented the following way in the Linux kernel:
259
260* I2C bus drivers which support SMBus alert should call
261  i2c_setup_smbus_alert() to setup SMBus alert support.
262* I2C drivers for devices which can trigger SMBus alerts should implement
263  the optional alert() callback.
264
265
266I2C Block Transactions
267======================
268
269The following I2C block transactions are supported by the
270SMBus layer and are described here for completeness.
271They are *NOT* defined by the SMBus specification.
272
273I2C block transactions do not limit the number of bytes transferred
274but the SMBus layer places a limit of 32 bytes.
275
276
277I2C Block Read:  i2c_smbus_read_i2c_block_data()
278================================================
279
280This command reads a block of bytes from a device, from a
281designated register that is specified through the Comm byte::
282
283  S Addr Wr [A] Comm [A]
284             S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
285
286Functionality flag: I2C_FUNC_SMBUS_READ_I2C_BLOCK
287
288
289I2C Block Write:  i2c_smbus_write_i2c_block_data()
290==================================================
291
292The opposite of the Block Read command, this writes bytes to
293a device, to a designated register that is specified through the
294Comm byte. Note that command lengths of 0, 2, or more bytes are
295supported as they are indistinguishable from data.
296
297::
298
299  S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P
300
301Functionality flag: I2C_FUNC_SMBUS_WRITE_I2C_BLOCK
302