1f6fcefa1SLuca Ceresoli================== 2f6fcefa1SLuca CeresoliThe SMBus Protocol 3f6fcefa1SLuca Ceresoli================== 4ccf988b6SMauro Carvalho Chehab 5ccf988b6SMauro Carvalho ChehabThe following is a summary of the SMBus protocol. It applies to 6ccf988b6SMauro Carvalho Chehaball revisions of the protocol (1.0, 1.1, and 2.0). 7ccf988b6SMauro Carvalho ChehabCertain protocol features which are not supported by 8ccf988b6SMauro Carvalho Chehabthis package are briefly described at the end of this document. 9ccf988b6SMauro Carvalho Chehab 10ccf988b6SMauro Carvalho ChehabSome adapters understand only the SMBus (System Management Bus) protocol, 11ccf988b6SMauro Carvalho Chehabwhich is a subset from the I2C protocol. Fortunately, many devices use 12ccf988b6SMauro Carvalho Chehabonly the same subset, which makes it possible to put them on an SMBus. 13ccf988b6SMauro Carvalho Chehab 14ccf988b6SMauro Carvalho ChehabIf you write a driver for some I2C device, please try to use the SMBus 15ccf988b6SMauro Carvalho Chehabcommands if at all possible (if the device uses only that subset of the 16ccf988b6SMauro Carvalho ChehabI2C protocol). This makes it possible to use the device driver on both 17ccf988b6SMauro Carvalho ChehabSMBus adapters and I2C adapters (the SMBus command set is automatically 18ccf988b6SMauro Carvalho Chehabtranslated to I2C on I2C adapters, but plain I2C commands can not be 19ccf988b6SMauro Carvalho Chehabhandled at all on most pure SMBus adapters). 20ccf988b6SMauro Carvalho Chehab 21ccf988b6SMauro Carvalho ChehabBelow is a list of SMBus protocol operations, and the functions executing 22ccf988b6SMauro Carvalho Chehabthem. Note that the names used in the SMBus protocol specifications usually 23ccf988b6SMauro Carvalho Chehabdon't match these function names. For some of the operations which pass a 24ccf988b6SMauro Carvalho Chehabsingle data byte, the functions using SMBus protocol operation names execute 25ccf988b6SMauro Carvalho Chehaba different protocol operation entirely. 26ccf988b6SMauro Carvalho Chehab 27ccf988b6SMauro Carvalho ChehabEach transaction type corresponds to a functionality flag. Before calling a 28ccf988b6SMauro Carvalho Chehabtransaction function, a device driver should always check (just once) for 29ccf988b6SMauro Carvalho Chehabthe corresponding functionality flag to ensure that the underlying I2C 30924fbb4dSLuca Ceresoliadapter supports the transaction in question. See :doc:`functionality` for 31924fbb4dSLuca Ceresolithe details. 32ccf988b6SMauro Carvalho Chehab 33ccf988b6SMauro Carvalho Chehab 34ccf988b6SMauro Carvalho ChehabKey to symbols 35ccf988b6SMauro Carvalho Chehab============== 36ccf988b6SMauro Carvalho Chehab 37ccf988b6SMauro Carvalho Chehab=============== ============================================================= 38026c0fe6SLuca CeresoliS Start condition 39026c0fe6SLuca CeresoliP Stop condition 40026c0fe6SLuca CeresoliRd/Wr (1 bit) Read/Write bit. Rd equals 1, Wr equals 0. 419e89d618SLuca CeresoliA, NA (1 bit) Acknowledge (ACK) and Not Acknowledge (NACK) bit 42026c0fe6SLuca CeresoliAddr (7 bits) I2C 7 bit address. Note that this can be expanded as usual to 43ccf988b6SMauro Carvalho Chehab get a 10 bit I2C address. 44026c0fe6SLuca CeresoliComm (8 bits) Command byte, a data byte which often selects a register on 45ccf988b6SMauro Carvalho Chehab the device. 46026c0fe6SLuca CeresoliData (8 bits) A plain data byte. Sometimes, I write DataLow, DataHigh 47ccf988b6SMauro Carvalho Chehab for 16 bit data. 48026c0fe6SLuca CeresoliCount (8 bits) A data byte containing the length of a block operation. 49ccf988b6SMauro Carvalho Chehab 50026c0fe6SLuca Ceresoli[..] Data sent by I2C device, as opposed to data sent by the host 51ccf988b6SMauro Carvalho Chehab adapter. 52ccf988b6SMauro Carvalho Chehab=============== ============================================================= 53ccf988b6SMauro Carvalho Chehab 54ccf988b6SMauro Carvalho Chehab 55ccf988b6SMauro Carvalho ChehabSMBus Quick Command 56ccf988b6SMauro Carvalho Chehab=================== 57ccf988b6SMauro Carvalho Chehab 58ccf988b6SMauro Carvalho ChehabThis sends a single bit to the device, at the place of the Rd/Wr bit:: 59ccf988b6SMauro Carvalho Chehab 60ccf988b6SMauro Carvalho Chehab A Addr Rd/Wr [A] P 61ccf988b6SMauro Carvalho Chehab 62ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_QUICK 63ccf988b6SMauro Carvalho Chehab 64ccf988b6SMauro Carvalho Chehab 653c13f1fbSLuca CeresoliSMBus Receive Byte 663c13f1fbSLuca Ceresoli================== 673c13f1fbSLuca Ceresoli 683c13f1fbSLuca CeresoliImplemented by i2c_smbus_read_byte() 69ccf988b6SMauro Carvalho Chehab 70ccf988b6SMauro Carvalho ChehabThis reads a single byte from a device, without specifying a device 71ccf988b6SMauro Carvalho Chehabregister. Some devices are so simple that this interface is enough; for 72ccf988b6SMauro Carvalho Chehabothers, it is a shorthand if you want to read the same register as in 73ccf988b6SMauro Carvalho Chehabthe previous SMBus command:: 74ccf988b6SMauro Carvalho Chehab 75ccf988b6SMauro Carvalho Chehab S Addr Rd [A] [Data] NA P 76ccf988b6SMauro Carvalho Chehab 77ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_READ_BYTE 78ccf988b6SMauro Carvalho Chehab 79ccf988b6SMauro Carvalho Chehab 803c13f1fbSLuca CeresoliSMBus Send Byte 813c13f1fbSLuca Ceresoli=============== 823c13f1fbSLuca Ceresoli 833c13f1fbSLuca CeresoliImplemented by i2c_smbus_write_byte() 84ccf988b6SMauro Carvalho Chehab 85ccf988b6SMauro Carvalho ChehabThis operation is the reverse of Receive Byte: it sends a single byte 86ccf988b6SMauro Carvalho Chehabto a device. See Receive Byte for more information. 87ccf988b6SMauro Carvalho Chehab 88ccf988b6SMauro Carvalho Chehab:: 89ccf988b6SMauro Carvalho Chehab 90ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Data [A] P 91ccf988b6SMauro Carvalho Chehab 92ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_WRITE_BYTE 93ccf988b6SMauro Carvalho Chehab 94ccf988b6SMauro Carvalho Chehab 953c13f1fbSLuca CeresoliSMBus Read Byte 963c13f1fbSLuca Ceresoli=============== 973c13f1fbSLuca Ceresoli 983c13f1fbSLuca CeresoliImplemented by i2c_smbus_read_byte_data() 99ccf988b6SMauro Carvalho Chehab 100ccf988b6SMauro Carvalho ChehabThis reads a single byte from a device, from a designated register. 101ccf988b6SMauro Carvalho ChehabThe register is specified through the Comm byte:: 102ccf988b6SMauro Carvalho Chehab 103ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P 104ccf988b6SMauro Carvalho Chehab 105ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_READ_BYTE_DATA 106ccf988b6SMauro Carvalho Chehab 107ccf988b6SMauro Carvalho Chehab 1083c13f1fbSLuca CeresoliSMBus Read Word 1093c13f1fbSLuca Ceresoli=============== 1103c13f1fbSLuca Ceresoli 1113c13f1fbSLuca CeresoliImplemented by i2c_smbus_read_word_data() 112ccf988b6SMauro Carvalho Chehab 113ccf988b6SMauro Carvalho ChehabThis operation is very like Read Byte; again, data is read from a 114ccf988b6SMauro Carvalho Chehabdevice, from a designated register that is specified through the Comm 115ccf988b6SMauro Carvalho Chehabbyte. But this time, the data is a complete word (16 bits):: 116ccf988b6SMauro Carvalho Chehab 117ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P 118ccf988b6SMauro Carvalho Chehab 119ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_READ_WORD_DATA 120ccf988b6SMauro Carvalho Chehab 121b36cbb70SLuca CeresoliNote the convenience function i2c_smbus_read_word_swapped() is 122ccf988b6SMauro Carvalho Chehabavailable for reads where the two data bytes are the other way 123ccf988b6SMauro Carvalho Chehabaround (not SMBus compliant, but very popular.) 124ccf988b6SMauro Carvalho Chehab 125ccf988b6SMauro Carvalho Chehab 1263c13f1fbSLuca CeresoliSMBus Write Byte 1273c13f1fbSLuca Ceresoli================ 1283c13f1fbSLuca Ceresoli 1293c13f1fbSLuca CeresoliImplemented by i2c_smbus_write_byte_data() 130ccf988b6SMauro Carvalho Chehab 131ccf988b6SMauro Carvalho ChehabThis writes a single byte to a device, to a designated register. The 132ccf988b6SMauro Carvalho Chehabregister is specified through the Comm byte. This is the opposite of 133ccf988b6SMauro Carvalho Chehabthe Read Byte operation. 134ccf988b6SMauro Carvalho Chehab 135ccf988b6SMauro Carvalho Chehab:: 136ccf988b6SMauro Carvalho Chehab 137ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] Data [A] P 138ccf988b6SMauro Carvalho Chehab 139ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_DATA 140ccf988b6SMauro Carvalho Chehab 141ccf988b6SMauro Carvalho Chehab 1423c13f1fbSLuca CeresoliSMBus Write Word 1433c13f1fbSLuca Ceresoli================ 1443c13f1fbSLuca Ceresoli 1453c13f1fbSLuca CeresoliImplemented by i2c_smbus_write_word_data() 146ccf988b6SMauro Carvalho Chehab 147ccf988b6SMauro Carvalho ChehabThis is the opposite of the Read Word operation. 16 bits 148414a5964SLuca Ceresoliof data are written to a device, to the designated register that is 149c7148b05SLuca Ceresolispecified through the Comm byte:: 150ccf988b6SMauro Carvalho Chehab 151ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P 152ccf988b6SMauro Carvalho Chehab 153ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_WRITE_WORD_DATA 154ccf988b6SMauro Carvalho Chehab 155b36cbb70SLuca CeresoliNote the convenience function i2c_smbus_write_word_swapped() is 156ccf988b6SMauro Carvalho Chehabavailable for writes where the two data bytes are the other way 157ccf988b6SMauro Carvalho Chehabaround (not SMBus compliant, but very popular.) 158ccf988b6SMauro Carvalho Chehab 159ccf988b6SMauro Carvalho Chehab 1603c13f1fbSLuca CeresoliSMBus Process Call 1613c13f1fbSLuca Ceresoli================== 162ccf988b6SMauro Carvalho Chehab 163ccf988b6SMauro Carvalho ChehabThis command selects a device register (through the Comm byte), sends 164ccf988b6SMauro Carvalho Chehab16 bits of data to it, and reads 16 bits of data in return:: 165ccf988b6SMauro Carvalho Chehab 166ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] 167ccf988b6SMauro Carvalho Chehab S Addr Rd [A] [DataLow] A [DataHigh] NA P 168ccf988b6SMauro Carvalho Chehab 169ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_PROC_CALL 170ccf988b6SMauro Carvalho Chehab 171ccf988b6SMauro Carvalho Chehab 1723c13f1fbSLuca CeresoliSMBus Block Read 1733c13f1fbSLuca Ceresoli================ 1743c13f1fbSLuca Ceresoli 1753c13f1fbSLuca CeresoliImplemented by i2c_smbus_read_block_data() 176ccf988b6SMauro Carvalho Chehab 177ccf988b6SMauro Carvalho ChehabThis command reads a block of up to 32 bytes from a device, from a 178ccf988b6SMauro Carvalho Chehabdesignated register that is specified through the Comm byte. The amount 179ccf988b6SMauro Carvalho Chehabof data is specified by the device in the Count byte. 180ccf988b6SMauro Carvalho Chehab 181ccf988b6SMauro Carvalho Chehab:: 182ccf988b6SMauro Carvalho Chehab 183ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] 184ccf988b6SMauro Carvalho Chehab S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P 185ccf988b6SMauro Carvalho Chehab 186ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_READ_BLOCK_DATA 187ccf988b6SMauro Carvalho Chehab 188ccf988b6SMauro Carvalho Chehab 1893c13f1fbSLuca CeresoliSMBus Block Write 1903c13f1fbSLuca Ceresoli================= 1913c13f1fbSLuca Ceresoli 1923c13f1fbSLuca CeresoliImplemented by i2c_smbus_write_block_data() 193ccf988b6SMauro Carvalho Chehab 194ccf988b6SMauro Carvalho ChehabThe opposite of the Block Read command, this writes up to 32 bytes to 195ccf988b6SMauro Carvalho Chehaba device, to a designated register that is specified through the 196ccf988b6SMauro Carvalho ChehabComm byte. The amount of data is specified in the Count byte. 197ccf988b6SMauro Carvalho Chehab 198ccf988b6SMauro Carvalho Chehab:: 199ccf988b6SMauro Carvalho Chehab 200ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P 201ccf988b6SMauro Carvalho Chehab 202ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 203ccf988b6SMauro Carvalho Chehab 204ccf988b6SMauro Carvalho Chehab 205ccf988b6SMauro Carvalho ChehabSMBus Block Write - Block Read Process Call 206ccf988b6SMauro Carvalho Chehab=========================================== 207ccf988b6SMauro Carvalho Chehab 208ccf988b6SMauro Carvalho ChehabSMBus Block Write - Block Read Process Call was introduced in 209ccf988b6SMauro Carvalho ChehabRevision 2.0 of the specification. 210ccf988b6SMauro Carvalho Chehab 211ccf988b6SMauro Carvalho ChehabThis command selects a device register (through the Comm byte), sends 212ccf988b6SMauro Carvalho Chehab1 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return:: 213ccf988b6SMauro Carvalho Chehab 214ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] Count [A] Data [A] ... 215ccf988b6SMauro Carvalho Chehab S Addr Rd [A] [Count] A [Data] ... A P 216ccf988b6SMauro Carvalho Chehab 217ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_CALL 218ccf988b6SMauro Carvalho Chehab 219ccf988b6SMauro Carvalho Chehab 220ccf988b6SMauro Carvalho ChehabSMBus Host Notify 221ccf988b6SMauro Carvalho Chehab================= 222ccf988b6SMauro Carvalho Chehab 223ccf988b6SMauro Carvalho ChehabThis command is sent from a SMBus device acting as a master to the 224ccf988b6SMauro Carvalho ChehabSMBus host acting as a slave. 225ccf988b6SMauro Carvalho ChehabIt is the same form as Write Word, with the command code replaced by the 226ccf988b6SMauro Carvalho Chehabalerting device's address. 227ccf988b6SMauro Carvalho Chehab 228ccf988b6SMauro Carvalho Chehab:: 229ccf988b6SMauro Carvalho Chehab 230ccf988b6SMauro Carvalho Chehab [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P] 231ccf988b6SMauro Carvalho Chehab 232ccf988b6SMauro Carvalho ChehabThis is implemented in the following way in the Linux kernel: 233ccf988b6SMauro Carvalho Chehab 234ccf988b6SMauro Carvalho Chehab* I2C bus drivers which support SMBus Host Notify should report 235ccf988b6SMauro Carvalho Chehab I2C_FUNC_SMBUS_HOST_NOTIFY. 236ccf988b6SMauro Carvalho Chehab* I2C bus drivers trigger SMBus Host Notify by a call to 237ccf988b6SMauro Carvalho Chehab i2c_handle_smbus_host_notify(). 238ccf988b6SMauro Carvalho Chehab* I2C drivers for devices which can trigger SMBus Host Notify will have 239ccf988b6SMauro Carvalho Chehab client->irq assigned to a Host Notify IRQ if noone else specified an other. 240ccf988b6SMauro Carvalho Chehab 241ccf988b6SMauro Carvalho ChehabThere is currently no way to retrieve the data parameter from the client. 242ccf988b6SMauro Carvalho Chehab 243ccf988b6SMauro Carvalho Chehab 244ccf988b6SMauro Carvalho ChehabPacket Error Checking (PEC) 245ccf988b6SMauro Carvalho Chehab=========================== 246ccf988b6SMauro Carvalho Chehab 247ccf988b6SMauro Carvalho ChehabPacket Error Checking was introduced in Revision 1.1 of the specification. 248ccf988b6SMauro Carvalho Chehab 249ccf988b6SMauro Carvalho ChehabPEC adds a CRC-8 error-checking byte to transfers using it, immediately 250ccf988b6SMauro Carvalho Chehabbefore the terminating STOP. 251ccf988b6SMauro Carvalho Chehab 252ccf988b6SMauro Carvalho Chehab 253ccf988b6SMauro Carvalho ChehabAddress Resolution Protocol (ARP) 254ccf988b6SMauro Carvalho Chehab================================= 255ccf988b6SMauro Carvalho Chehab 256ccf988b6SMauro Carvalho ChehabThe Address Resolution Protocol was introduced in Revision 2.0 of 257ccf988b6SMauro Carvalho Chehabthe specification. It is a higher-layer protocol which uses the 258ccf988b6SMauro Carvalho Chehabmessages above. 259ccf988b6SMauro Carvalho Chehab 260ccf988b6SMauro Carvalho ChehabARP adds device enumeration and dynamic address assignment to 261ccf988b6SMauro Carvalho Chehabthe protocol. All ARP communications use slave address 0x61 and 262ccf988b6SMauro Carvalho Chehabrequire PEC checksums. 263ccf988b6SMauro Carvalho Chehab 264ccf988b6SMauro Carvalho Chehab 265ccf988b6SMauro Carvalho ChehabSMBus Alert 266ccf988b6SMauro Carvalho Chehab=========== 267ccf988b6SMauro Carvalho Chehab 268ccf988b6SMauro Carvalho ChehabSMBus Alert was introduced in Revision 1.0 of the specification. 269ccf988b6SMauro Carvalho Chehab 270ccf988b6SMauro Carvalho ChehabThe SMBus alert protocol allows several SMBus slave devices to share a 271ccf988b6SMauro Carvalho Chehabsingle interrupt pin on the SMBus master, while still allowing the master 272ccf988b6SMauro Carvalho Chehabto know which slave triggered the interrupt. 273ccf988b6SMauro Carvalho Chehab 274ccf988b6SMauro Carvalho ChehabThis is implemented the following way in the Linux kernel: 275ccf988b6SMauro Carvalho Chehab 276ccf988b6SMauro Carvalho Chehab* I2C bus drivers which support SMBus alert should call 277ccf988b6SMauro Carvalho Chehab i2c_setup_smbus_alert() to setup SMBus alert support. 278ccf988b6SMauro Carvalho Chehab* I2C drivers for devices which can trigger SMBus alerts should implement 279ccf988b6SMauro Carvalho Chehab the optional alert() callback. 280ccf988b6SMauro Carvalho Chehab 281ccf988b6SMauro Carvalho Chehab 282ccf988b6SMauro Carvalho ChehabI2C Block Transactions 283ccf988b6SMauro Carvalho Chehab====================== 284ccf988b6SMauro Carvalho Chehab 28595b83774SLuca CeresoliThe following I2C block transactions are similar to the SMBus Block Read 28695b83774SLuca Ceresoliand Write operations, except these do not have a Count byte. They are 28795b83774SLuca Ceresolisupported by the SMBus layer and are described here for completeness, but 28895b83774SLuca Ceresolithey are *NOT* defined by the SMBus specification. 289ccf988b6SMauro Carvalho Chehab 290ccf988b6SMauro Carvalho ChehabI2C block transactions do not limit the number of bytes transferred 291ccf988b6SMauro Carvalho Chehabbut the SMBus layer places a limit of 32 bytes. 292ccf988b6SMauro Carvalho Chehab 293ccf988b6SMauro Carvalho Chehab 2943c13f1fbSLuca CeresoliI2C Block Read 2953c13f1fbSLuca Ceresoli============== 2963c13f1fbSLuca Ceresoli 2973c13f1fbSLuca CeresoliImplemented by i2c_smbus_read_i2c_block_data() 298ccf988b6SMauro Carvalho Chehab 299ccf988b6SMauro Carvalho ChehabThis command reads a block of bytes from a device, from a 300ccf988b6SMauro Carvalho Chehabdesignated register that is specified through the Comm byte:: 301ccf988b6SMauro Carvalho Chehab 302ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] 303ccf988b6SMauro Carvalho Chehab S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P 304ccf988b6SMauro Carvalho Chehab 305ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_READ_I2C_BLOCK 306ccf988b6SMauro Carvalho Chehab 307ccf988b6SMauro Carvalho Chehab 3083c13f1fbSLuca CeresoliI2C Block Write 3093c13f1fbSLuca Ceresoli=============== 3103c13f1fbSLuca Ceresoli 3113c13f1fbSLuca CeresoliImplemented by i2c_smbus_write_i2c_block_data() 312ccf988b6SMauro Carvalho Chehab 313ccf988b6SMauro Carvalho ChehabThe opposite of the Block Read command, this writes bytes to 314ccf988b6SMauro Carvalho Chehaba device, to a designated register that is specified through the 315ccf988b6SMauro Carvalho ChehabComm byte. Note that command lengths of 0, 2, or more bytes are 316ccf988b6SMauro Carvalho Chehabsupported as they are indistinguishable from data. 317ccf988b6SMauro Carvalho Chehab 318ccf988b6SMauro Carvalho Chehab:: 319ccf988b6SMauro Carvalho Chehab 320ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P 321ccf988b6SMauro Carvalho Chehab 322ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 323