1ccf988b6SMauro Carvalho Chehab====================== 2ccf988b6SMauro Carvalho ChehabSMBus Protocol Summary 3ccf988b6SMauro Carvalho Chehab====================== 4ccf988b6SMauro Carvalho Chehab 5ccf988b6SMauro Carvalho ChehabThe following is a summary of the SMBus protocol. It applies to 6ccf988b6SMauro Carvalho Chehaball revisions of the protocol (1.0, 1.1, and 2.0). 7ccf988b6SMauro Carvalho ChehabCertain protocol features which are not supported by 8ccf988b6SMauro Carvalho Chehabthis package are briefly described at the end of this document. 9ccf988b6SMauro Carvalho Chehab 10ccf988b6SMauro Carvalho ChehabSome adapters understand only the SMBus (System Management Bus) protocol, 11ccf988b6SMauro Carvalho Chehabwhich is a subset from the I2C protocol. Fortunately, many devices use 12ccf988b6SMauro Carvalho Chehabonly the same subset, which makes it possible to put them on an SMBus. 13ccf988b6SMauro Carvalho Chehab 14ccf988b6SMauro Carvalho ChehabIf you write a driver for some I2C device, please try to use the SMBus 15ccf988b6SMauro Carvalho Chehabcommands if at all possible (if the device uses only that subset of the 16ccf988b6SMauro Carvalho ChehabI2C protocol). This makes it possible to use the device driver on both 17ccf988b6SMauro Carvalho ChehabSMBus adapters and I2C adapters (the SMBus command set is automatically 18ccf988b6SMauro Carvalho Chehabtranslated to I2C on I2C adapters, but plain I2C commands can not be 19ccf988b6SMauro Carvalho Chehabhandled at all on most pure SMBus adapters). 20ccf988b6SMauro Carvalho Chehab 21ccf988b6SMauro Carvalho ChehabBelow is a list of SMBus protocol operations, and the functions executing 22ccf988b6SMauro Carvalho Chehabthem. Note that the names used in the SMBus protocol specifications usually 23ccf988b6SMauro Carvalho Chehabdon't match these function names. For some of the operations which pass a 24ccf988b6SMauro Carvalho Chehabsingle data byte, the functions using SMBus protocol operation names execute 25ccf988b6SMauro Carvalho Chehaba different protocol operation entirely. 26ccf988b6SMauro Carvalho Chehab 27ccf988b6SMauro Carvalho ChehabEach transaction type corresponds to a functionality flag. Before calling a 28ccf988b6SMauro Carvalho Chehabtransaction function, a device driver should always check (just once) for 29ccf988b6SMauro Carvalho Chehabthe corresponding functionality flag to ensure that the underlying I2C 30ccf988b6SMauro Carvalho Chehabadapter supports the transaction in question. See 31ccf988b6SMauro Carvalho Chehab<file:Documentation/i2c/functionality.rst> for the details. 32ccf988b6SMauro Carvalho Chehab 33ccf988b6SMauro Carvalho Chehab 34ccf988b6SMauro Carvalho ChehabKey to symbols 35ccf988b6SMauro Carvalho Chehab============== 36ccf988b6SMauro Carvalho Chehab 37ccf988b6SMauro Carvalho Chehab=============== ============================================================= 38ccf988b6SMauro Carvalho ChehabS (1 bit) : Start bit 39ccf988b6SMauro Carvalho ChehabP (1 bit) : Stop bit 40ccf988b6SMauro Carvalho ChehabRd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0. 41ccf988b6SMauro Carvalho ChehabA, NA (1 bit) : Accept and reverse accept bit. 42ccf988b6SMauro Carvalho ChehabAddr (7 bits): I2C 7 bit address. Note that this can be expanded as usual to 43ccf988b6SMauro Carvalho Chehab get a 10 bit I2C address. 44ccf988b6SMauro Carvalho ChehabComm (8 bits): Command byte, a data byte which often selects a register on 45ccf988b6SMauro Carvalho Chehab the device. 46ccf988b6SMauro Carvalho ChehabData (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh 47ccf988b6SMauro Carvalho Chehab for 16 bit data. 48ccf988b6SMauro Carvalho ChehabCount (8 bits): A data byte containing the length of a block operation. 49ccf988b6SMauro Carvalho Chehab 50ccf988b6SMauro Carvalho Chehab[..]: Data sent by I2C device, as opposed to data sent by the host 51ccf988b6SMauro Carvalho Chehab adapter. 52ccf988b6SMauro Carvalho Chehab=============== ============================================================= 53ccf988b6SMauro Carvalho Chehab 54ccf988b6SMauro Carvalho Chehab 55ccf988b6SMauro Carvalho ChehabSMBus Quick Command 56ccf988b6SMauro Carvalho Chehab=================== 57ccf988b6SMauro Carvalho Chehab 58ccf988b6SMauro Carvalho ChehabThis sends a single bit to the device, at the place of the Rd/Wr bit:: 59ccf988b6SMauro Carvalho Chehab 60ccf988b6SMauro Carvalho Chehab A Addr Rd/Wr [A] P 61ccf988b6SMauro Carvalho Chehab 62ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_QUICK 63ccf988b6SMauro Carvalho Chehab 64ccf988b6SMauro Carvalho Chehab 65ccf988b6SMauro Carvalho ChehabSMBus Receive Byte: i2c_smbus_read_byte() 66ccf988b6SMauro Carvalho Chehab========================================== 67ccf988b6SMauro Carvalho Chehab 68ccf988b6SMauro Carvalho ChehabThis reads a single byte from a device, without specifying a device 69ccf988b6SMauro Carvalho Chehabregister. Some devices are so simple that this interface is enough; for 70ccf988b6SMauro Carvalho Chehabothers, it is a shorthand if you want to read the same register as in 71ccf988b6SMauro Carvalho Chehabthe previous SMBus command:: 72ccf988b6SMauro Carvalho Chehab 73ccf988b6SMauro Carvalho Chehab S Addr Rd [A] [Data] NA P 74ccf988b6SMauro Carvalho Chehab 75ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_READ_BYTE 76ccf988b6SMauro Carvalho Chehab 77ccf988b6SMauro Carvalho Chehab 78ccf988b6SMauro Carvalho ChehabSMBus Send Byte: i2c_smbus_write_byte() 79ccf988b6SMauro Carvalho Chehab======================================== 80ccf988b6SMauro Carvalho Chehab 81ccf988b6SMauro Carvalho ChehabThis operation is the reverse of Receive Byte: it sends a single byte 82ccf988b6SMauro Carvalho Chehabto a device. See Receive Byte for more information. 83ccf988b6SMauro Carvalho Chehab 84ccf988b6SMauro Carvalho Chehab:: 85ccf988b6SMauro Carvalho Chehab 86ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Data [A] P 87ccf988b6SMauro Carvalho Chehab 88ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_WRITE_BYTE 89ccf988b6SMauro Carvalho Chehab 90ccf988b6SMauro Carvalho Chehab 91ccf988b6SMauro Carvalho ChehabSMBus Read Byte: i2c_smbus_read_byte_data() 92ccf988b6SMauro Carvalho Chehab============================================ 93ccf988b6SMauro Carvalho Chehab 94ccf988b6SMauro Carvalho ChehabThis reads a single byte from a device, from a designated register. 95ccf988b6SMauro Carvalho ChehabThe register is specified through the Comm byte:: 96ccf988b6SMauro Carvalho Chehab 97ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P 98ccf988b6SMauro Carvalho Chehab 99ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_READ_BYTE_DATA 100ccf988b6SMauro Carvalho Chehab 101ccf988b6SMauro Carvalho Chehab 102ccf988b6SMauro Carvalho ChehabSMBus Read Word: i2c_smbus_read_word_data() 103ccf988b6SMauro Carvalho Chehab============================================ 104ccf988b6SMauro Carvalho Chehab 105ccf988b6SMauro Carvalho ChehabThis operation is very like Read Byte; again, data is read from a 106ccf988b6SMauro Carvalho Chehabdevice, from a designated register that is specified through the Comm 107ccf988b6SMauro Carvalho Chehabbyte. But this time, the data is a complete word (16 bits):: 108ccf988b6SMauro Carvalho Chehab 109ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P 110ccf988b6SMauro Carvalho Chehab 111ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_READ_WORD_DATA 112ccf988b6SMauro Carvalho Chehab 113ccf988b6SMauro Carvalho ChehabNote the convenience function i2c_smbus_read_word_swapped is 114ccf988b6SMauro Carvalho Chehabavailable for reads where the two data bytes are the other way 115ccf988b6SMauro Carvalho Chehabaround (not SMBus compliant, but very popular.) 116ccf988b6SMauro Carvalho Chehab 117ccf988b6SMauro Carvalho Chehab 118ccf988b6SMauro Carvalho ChehabSMBus Write Byte: i2c_smbus_write_byte_data() 119ccf988b6SMauro Carvalho Chehab============================================== 120ccf988b6SMauro Carvalho Chehab 121ccf988b6SMauro Carvalho ChehabThis writes a single byte to a device, to a designated register. The 122ccf988b6SMauro Carvalho Chehabregister is specified through the Comm byte. This is the opposite of 123ccf988b6SMauro Carvalho Chehabthe Read Byte operation. 124ccf988b6SMauro Carvalho Chehab 125ccf988b6SMauro Carvalho Chehab:: 126ccf988b6SMauro Carvalho Chehab 127ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] Data [A] P 128ccf988b6SMauro Carvalho Chehab 129ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_DATA 130ccf988b6SMauro Carvalho Chehab 131ccf988b6SMauro Carvalho Chehab 132ccf988b6SMauro Carvalho ChehabSMBus Write Word: i2c_smbus_write_word_data() 133ccf988b6SMauro Carvalho Chehab============================================== 134ccf988b6SMauro Carvalho Chehab 135ccf988b6SMauro Carvalho ChehabThis is the opposite of the Read Word operation. 16 bits 136ccf988b6SMauro Carvalho Chehabof data is written to a device, to the designated register that is 137ccf988b6SMauro Carvalho Chehabspecified through the Comm byte.:: 138ccf988b6SMauro Carvalho Chehab 139ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P 140ccf988b6SMauro Carvalho Chehab 141ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_WRITE_WORD_DATA 142ccf988b6SMauro Carvalho Chehab 143ccf988b6SMauro Carvalho ChehabNote the convenience function i2c_smbus_write_word_swapped is 144ccf988b6SMauro Carvalho Chehabavailable for writes where the two data bytes are the other way 145ccf988b6SMauro Carvalho Chehabaround (not SMBus compliant, but very popular.) 146ccf988b6SMauro Carvalho Chehab 147ccf988b6SMauro Carvalho Chehab 148ccf988b6SMauro Carvalho ChehabSMBus Process Call: 149ccf988b6SMauro Carvalho Chehab=================== 150ccf988b6SMauro Carvalho Chehab 151ccf988b6SMauro Carvalho ChehabThis command selects a device register (through the Comm byte), sends 152ccf988b6SMauro Carvalho Chehab16 bits of data to it, and reads 16 bits of data in return:: 153ccf988b6SMauro Carvalho Chehab 154ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] 155ccf988b6SMauro Carvalho Chehab S Addr Rd [A] [DataLow] A [DataHigh] NA P 156ccf988b6SMauro Carvalho Chehab 157ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_PROC_CALL 158ccf988b6SMauro Carvalho Chehab 159ccf988b6SMauro Carvalho Chehab 160ccf988b6SMauro Carvalho ChehabSMBus Block Read: i2c_smbus_read_block_data() 161ccf988b6SMauro Carvalho Chehab============================================== 162ccf988b6SMauro Carvalho Chehab 163ccf988b6SMauro Carvalho ChehabThis command reads a block of up to 32 bytes from a device, from a 164ccf988b6SMauro Carvalho Chehabdesignated register that is specified through the Comm byte. The amount 165ccf988b6SMauro Carvalho Chehabof data is specified by the device in the Count byte. 166ccf988b6SMauro Carvalho Chehab 167ccf988b6SMauro Carvalho Chehab:: 168ccf988b6SMauro Carvalho Chehab 169ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] 170ccf988b6SMauro Carvalho Chehab S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P 171ccf988b6SMauro Carvalho Chehab 172ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_READ_BLOCK_DATA 173ccf988b6SMauro Carvalho Chehab 174ccf988b6SMauro Carvalho Chehab 175ccf988b6SMauro Carvalho ChehabSMBus Block Write: i2c_smbus_write_block_data() 176ccf988b6SMauro Carvalho Chehab================================================ 177ccf988b6SMauro Carvalho Chehab 178ccf988b6SMauro Carvalho ChehabThe opposite of the Block Read command, this writes up to 32 bytes to 179ccf988b6SMauro Carvalho Chehaba device, to a designated register that is specified through the 180ccf988b6SMauro Carvalho ChehabComm byte. The amount of data is specified in the Count byte. 181ccf988b6SMauro Carvalho Chehab 182ccf988b6SMauro Carvalho Chehab:: 183ccf988b6SMauro Carvalho Chehab 184ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P 185ccf988b6SMauro Carvalho Chehab 186ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 187ccf988b6SMauro Carvalho Chehab 188ccf988b6SMauro Carvalho Chehab 189ccf988b6SMauro Carvalho ChehabSMBus Block Write - Block Read Process Call 190ccf988b6SMauro Carvalho Chehab=========================================== 191ccf988b6SMauro Carvalho Chehab 192ccf988b6SMauro Carvalho ChehabSMBus Block Write - Block Read Process Call was introduced in 193ccf988b6SMauro Carvalho ChehabRevision 2.0 of the specification. 194ccf988b6SMauro Carvalho Chehab 195ccf988b6SMauro Carvalho ChehabThis command selects a device register (through the Comm byte), sends 196ccf988b6SMauro Carvalho Chehab1 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return:: 197ccf988b6SMauro Carvalho Chehab 198ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] Count [A] Data [A] ... 199ccf988b6SMauro Carvalho Chehab S Addr Rd [A] [Count] A [Data] ... A P 200ccf988b6SMauro Carvalho Chehab 201ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_CALL 202ccf988b6SMauro Carvalho Chehab 203ccf988b6SMauro Carvalho Chehab 204ccf988b6SMauro Carvalho ChehabSMBus Host Notify 205ccf988b6SMauro Carvalho Chehab================= 206ccf988b6SMauro Carvalho Chehab 207ccf988b6SMauro Carvalho ChehabThis command is sent from a SMBus device acting as a master to the 208ccf988b6SMauro Carvalho ChehabSMBus host acting as a slave. 209ccf988b6SMauro Carvalho ChehabIt is the same form as Write Word, with the command code replaced by the 210ccf988b6SMauro Carvalho Chehabalerting device's address. 211ccf988b6SMauro Carvalho Chehab 212ccf988b6SMauro Carvalho Chehab:: 213ccf988b6SMauro Carvalho Chehab 214ccf988b6SMauro Carvalho Chehab [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P] 215ccf988b6SMauro Carvalho Chehab 216ccf988b6SMauro Carvalho ChehabThis is implemented in the following way in the Linux kernel: 217ccf988b6SMauro Carvalho Chehab 218ccf988b6SMauro Carvalho Chehab* I2C bus drivers which support SMBus Host Notify should report 219ccf988b6SMauro Carvalho Chehab I2C_FUNC_SMBUS_HOST_NOTIFY. 220ccf988b6SMauro Carvalho Chehab* I2C bus drivers trigger SMBus Host Notify by a call to 221ccf988b6SMauro Carvalho Chehab i2c_handle_smbus_host_notify(). 222ccf988b6SMauro Carvalho Chehab* I2C drivers for devices which can trigger SMBus Host Notify will have 223ccf988b6SMauro Carvalho Chehab client->irq assigned to a Host Notify IRQ if noone else specified an other. 224ccf988b6SMauro Carvalho Chehab 225ccf988b6SMauro Carvalho ChehabThere is currently no way to retrieve the data parameter from the client. 226ccf988b6SMauro Carvalho Chehab 227ccf988b6SMauro Carvalho Chehab 228ccf988b6SMauro Carvalho ChehabPacket Error Checking (PEC) 229ccf988b6SMauro Carvalho Chehab=========================== 230ccf988b6SMauro Carvalho Chehab 231ccf988b6SMauro Carvalho ChehabPacket Error Checking was introduced in Revision 1.1 of the specification. 232ccf988b6SMauro Carvalho Chehab 233ccf988b6SMauro Carvalho ChehabPEC adds a CRC-8 error-checking byte to transfers using it, immediately 234ccf988b6SMauro Carvalho Chehabbefore the terminating STOP. 235ccf988b6SMauro Carvalho Chehab 236ccf988b6SMauro Carvalho Chehab 237ccf988b6SMauro Carvalho ChehabAddress Resolution Protocol (ARP) 238ccf988b6SMauro Carvalho Chehab================================= 239ccf988b6SMauro Carvalho Chehab 240ccf988b6SMauro Carvalho ChehabThe Address Resolution Protocol was introduced in Revision 2.0 of 241ccf988b6SMauro Carvalho Chehabthe specification. It is a higher-layer protocol which uses the 242ccf988b6SMauro Carvalho Chehabmessages above. 243ccf988b6SMauro Carvalho Chehab 244ccf988b6SMauro Carvalho ChehabARP adds device enumeration and dynamic address assignment to 245ccf988b6SMauro Carvalho Chehabthe protocol. All ARP communications use slave address 0x61 and 246ccf988b6SMauro Carvalho Chehabrequire PEC checksums. 247ccf988b6SMauro Carvalho Chehab 248ccf988b6SMauro Carvalho Chehab 249ccf988b6SMauro Carvalho ChehabSMBus Alert 250ccf988b6SMauro Carvalho Chehab=========== 251ccf988b6SMauro Carvalho Chehab 252ccf988b6SMauro Carvalho ChehabSMBus Alert was introduced in Revision 1.0 of the specification. 253ccf988b6SMauro Carvalho Chehab 254ccf988b6SMauro Carvalho ChehabThe SMBus alert protocol allows several SMBus slave devices to share a 255ccf988b6SMauro Carvalho Chehabsingle interrupt pin on the SMBus master, while still allowing the master 256ccf988b6SMauro Carvalho Chehabto know which slave triggered the interrupt. 257ccf988b6SMauro Carvalho Chehab 258ccf988b6SMauro Carvalho ChehabThis is implemented the following way in the Linux kernel: 259ccf988b6SMauro Carvalho Chehab 260ccf988b6SMauro Carvalho Chehab* I2C bus drivers which support SMBus alert should call 261ccf988b6SMauro Carvalho Chehab i2c_setup_smbus_alert() to setup SMBus alert support. 262ccf988b6SMauro Carvalho Chehab* I2C drivers for devices which can trigger SMBus alerts should implement 263ccf988b6SMauro Carvalho Chehab the optional alert() callback. 264ccf988b6SMauro Carvalho Chehab 265ccf988b6SMauro Carvalho Chehab 266ccf988b6SMauro Carvalho ChehabI2C Block Transactions 267ccf988b6SMauro Carvalho Chehab====================== 268ccf988b6SMauro Carvalho Chehab 269ccf988b6SMauro Carvalho ChehabThe following I2C block transactions are supported by the 270ccf988b6SMauro Carvalho ChehabSMBus layer and are described here for completeness. 271ccf988b6SMauro Carvalho ChehabThey are *NOT* defined by the SMBus specification. 272ccf988b6SMauro Carvalho Chehab 273ccf988b6SMauro Carvalho ChehabI2C block transactions do not limit the number of bytes transferred 274ccf988b6SMauro Carvalho Chehabbut the SMBus layer places a limit of 32 bytes. 275ccf988b6SMauro Carvalho Chehab 276ccf988b6SMauro Carvalho Chehab 277ccf988b6SMauro Carvalho ChehabI2C Block Read: i2c_smbus_read_i2c_block_data() 278ccf988b6SMauro Carvalho Chehab================================================ 279ccf988b6SMauro Carvalho Chehab 280ccf988b6SMauro Carvalho ChehabThis command reads a block of bytes from a device, from a 281ccf988b6SMauro Carvalho Chehabdesignated register that is specified through the Comm byte:: 282ccf988b6SMauro Carvalho Chehab 283ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] 284ccf988b6SMauro Carvalho Chehab S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P 285ccf988b6SMauro Carvalho Chehab 286ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_READ_I2C_BLOCK 287ccf988b6SMauro Carvalho Chehab 288ccf988b6SMauro Carvalho Chehab 289ccf988b6SMauro Carvalho ChehabI2C Block Write: i2c_smbus_write_i2c_block_data() 290ccf988b6SMauro Carvalho Chehab================================================== 291ccf988b6SMauro Carvalho Chehab 292ccf988b6SMauro Carvalho ChehabThe opposite of the Block Read command, this writes bytes to 293ccf988b6SMauro Carvalho Chehaba device, to a designated register that is specified through the 294ccf988b6SMauro Carvalho ChehabComm byte. Note that command lengths of 0, 2, or more bytes are 295ccf988b6SMauro Carvalho Chehabsupported as they are indistinguishable from data. 296ccf988b6SMauro Carvalho Chehab 297ccf988b6SMauro Carvalho Chehab:: 298ccf988b6SMauro Carvalho Chehab 299ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P 300ccf988b6SMauro Carvalho Chehab 301ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 302