1f6fcefa1SLuca Ceresoli================== 2f6fcefa1SLuca CeresoliThe SMBus Protocol 3f6fcefa1SLuca Ceresoli================== 4ccf988b6SMauro Carvalho Chehab 5ccf988b6SMauro Carvalho ChehabThe following is a summary of the SMBus protocol. It applies to 6ccf988b6SMauro Carvalho Chehaball revisions of the protocol (1.0, 1.1, and 2.0). 7ccf988b6SMauro Carvalho ChehabCertain protocol features which are not supported by 8ccf988b6SMauro Carvalho Chehabthis package are briefly described at the end of this document. 9ccf988b6SMauro Carvalho Chehab 10ccf988b6SMauro Carvalho ChehabSome adapters understand only the SMBus (System Management Bus) protocol, 11ccf988b6SMauro Carvalho Chehabwhich is a subset from the I2C protocol. Fortunately, many devices use 12ccf988b6SMauro Carvalho Chehabonly the same subset, which makes it possible to put them on an SMBus. 13ccf988b6SMauro Carvalho Chehab 14ccf988b6SMauro Carvalho ChehabIf you write a driver for some I2C device, please try to use the SMBus 15ccf988b6SMauro Carvalho Chehabcommands if at all possible (if the device uses only that subset of the 16ccf988b6SMauro Carvalho ChehabI2C protocol). This makes it possible to use the device driver on both 17ccf988b6SMauro Carvalho ChehabSMBus adapters and I2C adapters (the SMBus command set is automatically 18ccf988b6SMauro Carvalho Chehabtranslated to I2C on I2C adapters, but plain I2C commands can not be 19ccf988b6SMauro Carvalho Chehabhandled at all on most pure SMBus adapters). 20ccf988b6SMauro Carvalho Chehab 21ccf988b6SMauro Carvalho ChehabBelow is a list of SMBus protocol operations, and the functions executing 22ccf988b6SMauro Carvalho Chehabthem. Note that the names used in the SMBus protocol specifications usually 23ccf988b6SMauro Carvalho Chehabdon't match these function names. For some of the operations which pass a 24ccf988b6SMauro Carvalho Chehabsingle data byte, the functions using SMBus protocol operation names execute 25ccf988b6SMauro Carvalho Chehaba different protocol operation entirely. 26ccf988b6SMauro Carvalho Chehab 27ccf988b6SMauro Carvalho ChehabEach transaction type corresponds to a functionality flag. Before calling a 28ccf988b6SMauro Carvalho Chehabtransaction function, a device driver should always check (just once) for 29ccf988b6SMauro Carvalho Chehabthe corresponding functionality flag to ensure that the underlying I2C 3025edd3a1SMauro Carvalho Chehabadapter supports the transaction in question. See 3125edd3a1SMauro Carvalho ChehabDocumentation/i2c/functionality.rst for the details. 32ccf988b6SMauro Carvalho Chehab 33ccf988b6SMauro Carvalho Chehab 34ccf988b6SMauro Carvalho ChehabKey to symbols 35ccf988b6SMauro Carvalho Chehab============== 36ccf988b6SMauro Carvalho Chehab 37ccf988b6SMauro Carvalho Chehab=============== ============================================================= 38026c0fe6SLuca CeresoliS Start condition 39bed68f4fSMiquel RaynalSr Repeated start condition, used to switch from write to 40bed68f4fSMiquel Raynal read mode. 41026c0fe6SLuca CeresoliP Stop condition 42026c0fe6SLuca CeresoliRd/Wr (1 bit) Read/Write bit. Rd equals 1, Wr equals 0. 439e89d618SLuca CeresoliA, NA (1 bit) Acknowledge (ACK) and Not Acknowledge (NACK) bit 4424d129d4SLuca CeresoliAddr (7 bits) I2C 7 bit address. Note that this can be expanded to 45ccf988b6SMauro Carvalho Chehab get a 10 bit I2C address. 46026c0fe6SLuca CeresoliComm (8 bits) Command byte, a data byte which often selects a register on 47ccf988b6SMauro Carvalho Chehab the device. 48*6c12ec27SLuca CeresoliData (8 bits) A plain data byte. DataLow and DataHigh represent the low and 49*6c12ec27SLuca Ceresoli high byte of a 16 bit word. 50026c0fe6SLuca CeresoliCount (8 bits) A data byte containing the length of a block operation. 51ccf988b6SMauro Carvalho Chehab 52026c0fe6SLuca Ceresoli[..] Data sent by I2C device, as opposed to data sent by the host 53ccf988b6SMauro Carvalho Chehab adapter. 54ccf988b6SMauro Carvalho Chehab=============== ============================================================= 55ccf988b6SMauro Carvalho Chehab 56ccf988b6SMauro Carvalho Chehab 57ccf988b6SMauro Carvalho ChehabSMBus Quick Command 58ccf988b6SMauro Carvalho Chehab=================== 59ccf988b6SMauro Carvalho Chehab 60ccf988b6SMauro Carvalho ChehabThis sends a single bit to the device, at the place of the Rd/Wr bit:: 61ccf988b6SMauro Carvalho Chehab 62a5765124SDaniel Schaefer S Addr Rd/Wr [A] P 63ccf988b6SMauro Carvalho Chehab 64ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_QUICK 65ccf988b6SMauro Carvalho Chehab 66ccf988b6SMauro Carvalho Chehab 673c13f1fbSLuca CeresoliSMBus Receive Byte 683c13f1fbSLuca Ceresoli================== 693c13f1fbSLuca Ceresoli 703c13f1fbSLuca CeresoliImplemented by i2c_smbus_read_byte() 71ccf988b6SMauro Carvalho Chehab 72ccf988b6SMauro Carvalho ChehabThis reads a single byte from a device, without specifying a device 73ccf988b6SMauro Carvalho Chehabregister. Some devices are so simple that this interface is enough; for 74ccf988b6SMauro Carvalho Chehabothers, it is a shorthand if you want to read the same register as in 75ccf988b6SMauro Carvalho Chehabthe previous SMBus command:: 76ccf988b6SMauro Carvalho Chehab 77ccf988b6SMauro Carvalho Chehab S Addr Rd [A] [Data] NA P 78ccf988b6SMauro Carvalho Chehab 79ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_READ_BYTE 80ccf988b6SMauro Carvalho Chehab 81ccf988b6SMauro Carvalho Chehab 823c13f1fbSLuca CeresoliSMBus Send Byte 833c13f1fbSLuca Ceresoli=============== 843c13f1fbSLuca Ceresoli 853c13f1fbSLuca CeresoliImplemented by i2c_smbus_write_byte() 86ccf988b6SMauro Carvalho Chehab 87ccf988b6SMauro Carvalho ChehabThis operation is the reverse of Receive Byte: it sends a single byte 88ccf988b6SMauro Carvalho Chehabto a device. See Receive Byte for more information. 89ccf988b6SMauro Carvalho Chehab 90ccf988b6SMauro Carvalho Chehab:: 91ccf988b6SMauro Carvalho Chehab 92ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Data [A] P 93ccf988b6SMauro Carvalho Chehab 94ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_WRITE_BYTE 95ccf988b6SMauro Carvalho Chehab 96ccf988b6SMauro Carvalho Chehab 973c13f1fbSLuca CeresoliSMBus Read Byte 983c13f1fbSLuca Ceresoli=============== 993c13f1fbSLuca Ceresoli 1003c13f1fbSLuca CeresoliImplemented by i2c_smbus_read_byte_data() 101ccf988b6SMauro Carvalho Chehab 102ccf988b6SMauro Carvalho ChehabThis reads a single byte from a device, from a designated register. 103ccf988b6SMauro Carvalho ChehabThe register is specified through the Comm byte:: 104ccf988b6SMauro Carvalho Chehab 105bed68f4fSMiquel Raynal S Addr Wr [A] Comm [A] Sr Addr Rd [A] [Data] NA P 106ccf988b6SMauro Carvalho Chehab 107ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_READ_BYTE_DATA 108ccf988b6SMauro Carvalho Chehab 109ccf988b6SMauro Carvalho Chehab 1103c13f1fbSLuca CeresoliSMBus Read Word 1113c13f1fbSLuca Ceresoli=============== 1123c13f1fbSLuca Ceresoli 1133c13f1fbSLuca CeresoliImplemented by i2c_smbus_read_word_data() 114ccf988b6SMauro Carvalho Chehab 115ccf988b6SMauro Carvalho ChehabThis operation is very like Read Byte; again, data is read from a 116ccf988b6SMauro Carvalho Chehabdevice, from a designated register that is specified through the Comm 117ccf988b6SMauro Carvalho Chehabbyte. But this time, the data is a complete word (16 bits):: 118ccf988b6SMauro Carvalho Chehab 119bed68f4fSMiquel Raynal S Addr Wr [A] Comm [A] Sr Addr Rd [A] [DataLow] A [DataHigh] NA P 120ccf988b6SMauro Carvalho Chehab 121ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_READ_WORD_DATA 122ccf988b6SMauro Carvalho Chehab 123b36cbb70SLuca CeresoliNote the convenience function i2c_smbus_read_word_swapped() is 124ccf988b6SMauro Carvalho Chehabavailable for reads where the two data bytes are the other way 125ccf988b6SMauro Carvalho Chehabaround (not SMBus compliant, but very popular.) 126ccf988b6SMauro Carvalho Chehab 127ccf988b6SMauro Carvalho Chehab 1283c13f1fbSLuca CeresoliSMBus Write Byte 1293c13f1fbSLuca Ceresoli================ 1303c13f1fbSLuca Ceresoli 1313c13f1fbSLuca CeresoliImplemented by i2c_smbus_write_byte_data() 132ccf988b6SMauro Carvalho Chehab 133ccf988b6SMauro Carvalho ChehabThis writes a single byte to a device, to a designated register. The 134ccf988b6SMauro Carvalho Chehabregister is specified through the Comm byte. This is the opposite of 135ccf988b6SMauro Carvalho Chehabthe Read Byte operation. 136ccf988b6SMauro Carvalho Chehab 137ccf988b6SMauro Carvalho Chehab:: 138ccf988b6SMauro Carvalho Chehab 139ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] Data [A] P 140ccf988b6SMauro Carvalho Chehab 141ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_DATA 142ccf988b6SMauro Carvalho Chehab 143ccf988b6SMauro Carvalho Chehab 1443c13f1fbSLuca CeresoliSMBus Write Word 1453c13f1fbSLuca Ceresoli================ 1463c13f1fbSLuca Ceresoli 1473c13f1fbSLuca CeresoliImplemented by i2c_smbus_write_word_data() 148ccf988b6SMauro Carvalho Chehab 149ccf988b6SMauro Carvalho ChehabThis is the opposite of the Read Word operation. 16 bits 150414a5964SLuca Ceresoliof data are written to a device, to the designated register that is 151c7148b05SLuca Ceresolispecified through the Comm byte:: 152ccf988b6SMauro Carvalho Chehab 153ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P 154ccf988b6SMauro Carvalho Chehab 155ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_WRITE_WORD_DATA 156ccf988b6SMauro Carvalho Chehab 157b36cbb70SLuca CeresoliNote the convenience function i2c_smbus_write_word_swapped() is 158ccf988b6SMauro Carvalho Chehabavailable for writes where the two data bytes are the other way 159ccf988b6SMauro Carvalho Chehabaround (not SMBus compliant, but very popular.) 160ccf988b6SMauro Carvalho Chehab 161ccf988b6SMauro Carvalho Chehab 1623c13f1fbSLuca CeresoliSMBus Process Call 1633c13f1fbSLuca Ceresoli================== 164ccf988b6SMauro Carvalho Chehab 165ccf988b6SMauro Carvalho ChehabThis command selects a device register (through the Comm byte), sends 166ccf988b6SMauro Carvalho Chehab16 bits of data to it, and reads 16 bits of data in return:: 167ccf988b6SMauro Carvalho Chehab 168ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] 169bed68f4fSMiquel Raynal Sr Addr Rd [A] [DataLow] A [DataHigh] NA P 170ccf988b6SMauro Carvalho Chehab 171ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_PROC_CALL 172ccf988b6SMauro Carvalho Chehab 173ccf988b6SMauro Carvalho Chehab 1743c13f1fbSLuca CeresoliSMBus Block Read 1753c13f1fbSLuca Ceresoli================ 1763c13f1fbSLuca Ceresoli 1773c13f1fbSLuca CeresoliImplemented by i2c_smbus_read_block_data() 178ccf988b6SMauro Carvalho Chehab 179ccf988b6SMauro Carvalho ChehabThis command reads a block of up to 32 bytes from a device, from a 180ccf988b6SMauro Carvalho Chehabdesignated register that is specified through the Comm byte. The amount 181ccf988b6SMauro Carvalho Chehabof data is specified by the device in the Count byte. 182ccf988b6SMauro Carvalho Chehab 183ccf988b6SMauro Carvalho Chehab:: 184ccf988b6SMauro Carvalho Chehab 185ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] 186bed68f4fSMiquel Raynal Sr Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P 187ccf988b6SMauro Carvalho Chehab 188ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_READ_BLOCK_DATA 189ccf988b6SMauro Carvalho Chehab 190ccf988b6SMauro Carvalho Chehab 1913c13f1fbSLuca CeresoliSMBus Block Write 1923c13f1fbSLuca Ceresoli================= 1933c13f1fbSLuca Ceresoli 1943c13f1fbSLuca CeresoliImplemented by i2c_smbus_write_block_data() 195ccf988b6SMauro Carvalho Chehab 196ccf988b6SMauro Carvalho ChehabThe opposite of the Block Read command, this writes up to 32 bytes to 197ccf988b6SMauro Carvalho Chehaba device, to a designated register that is specified through the 198ccf988b6SMauro Carvalho ChehabComm byte. The amount of data is specified in the Count byte. 199ccf988b6SMauro Carvalho Chehab 200ccf988b6SMauro Carvalho Chehab:: 201ccf988b6SMauro Carvalho Chehab 202ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P 203ccf988b6SMauro Carvalho Chehab 204ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 205ccf988b6SMauro Carvalho Chehab 206ccf988b6SMauro Carvalho Chehab 207ccf988b6SMauro Carvalho ChehabSMBus Block Write - Block Read Process Call 208ccf988b6SMauro Carvalho Chehab=========================================== 209ccf988b6SMauro Carvalho Chehab 210ccf988b6SMauro Carvalho ChehabSMBus Block Write - Block Read Process Call was introduced in 211ccf988b6SMauro Carvalho ChehabRevision 2.0 of the specification. 212ccf988b6SMauro Carvalho Chehab 213ccf988b6SMauro Carvalho ChehabThis command selects a device register (through the Comm byte), sends 214ccf988b6SMauro Carvalho Chehab1 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return:: 215ccf988b6SMauro Carvalho Chehab 216ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] Count [A] Data [A] ... 217bed68f4fSMiquel Raynal Sr Addr Rd [A] [Count] A [Data] ... A P 218ccf988b6SMauro Carvalho Chehab 219ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_CALL 220ccf988b6SMauro Carvalho Chehab 221ccf988b6SMauro Carvalho Chehab 222ccf988b6SMauro Carvalho ChehabSMBus Host Notify 223ccf988b6SMauro Carvalho Chehab================= 224ccf988b6SMauro Carvalho Chehab 225ccf988b6SMauro Carvalho ChehabThis command is sent from a SMBus device acting as a master to the 226ccf988b6SMauro Carvalho ChehabSMBus host acting as a slave. 227ccf988b6SMauro Carvalho ChehabIt is the same form as Write Word, with the command code replaced by the 228ccf988b6SMauro Carvalho Chehabalerting device's address. 229ccf988b6SMauro Carvalho Chehab 230ccf988b6SMauro Carvalho Chehab:: 231ccf988b6SMauro Carvalho Chehab 232ccf988b6SMauro Carvalho Chehab [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P] 233ccf988b6SMauro Carvalho Chehab 234ccf988b6SMauro Carvalho ChehabThis is implemented in the following way in the Linux kernel: 235ccf988b6SMauro Carvalho Chehab 236ccf988b6SMauro Carvalho Chehab* I2C bus drivers which support SMBus Host Notify should report 237ccf988b6SMauro Carvalho Chehab I2C_FUNC_SMBUS_HOST_NOTIFY. 238ccf988b6SMauro Carvalho Chehab* I2C bus drivers trigger SMBus Host Notify by a call to 239ccf988b6SMauro Carvalho Chehab i2c_handle_smbus_host_notify(). 240ccf988b6SMauro Carvalho Chehab* I2C drivers for devices which can trigger SMBus Host Notify will have 241ccf988b6SMauro Carvalho Chehab client->irq assigned to a Host Notify IRQ if no one else specified another. 242ccf988b6SMauro Carvalho Chehab 243ccf988b6SMauro Carvalho ChehabThere is currently no way to retrieve the data parameter from the client. 244ccf988b6SMauro Carvalho Chehab 245ccf988b6SMauro Carvalho Chehab 246ccf988b6SMauro Carvalho ChehabPacket Error Checking (PEC) 247ccf988b6SMauro Carvalho Chehab=========================== 248ccf988b6SMauro Carvalho Chehab 249ccf988b6SMauro Carvalho ChehabPacket Error Checking was introduced in Revision 1.1 of the specification. 250ccf988b6SMauro Carvalho Chehab 251ccf988b6SMauro Carvalho ChehabPEC adds a CRC-8 error-checking byte to transfers using it, immediately 252ccf988b6SMauro Carvalho Chehabbefore the terminating STOP. 253ccf988b6SMauro Carvalho Chehab 254ccf988b6SMauro Carvalho Chehab 255ccf988b6SMauro Carvalho ChehabAddress Resolution Protocol (ARP) 256ccf988b6SMauro Carvalho Chehab================================= 257ccf988b6SMauro Carvalho Chehab 258ccf988b6SMauro Carvalho ChehabThe Address Resolution Protocol was introduced in Revision 2.0 of 259ccf988b6SMauro Carvalho Chehabthe specification. It is a higher-layer protocol which uses the 260ccf988b6SMauro Carvalho Chehabmessages above. 261ccf988b6SMauro Carvalho Chehab 262ccf988b6SMauro Carvalho ChehabARP adds device enumeration and dynamic address assignment to 263ccf988b6SMauro Carvalho Chehabthe protocol. All ARP communications use slave address 0x61 and 264ccf988b6SMauro Carvalho Chehabrequire PEC checksums. 265ccf988b6SMauro Carvalho Chehab 266ccf988b6SMauro Carvalho Chehab 267ccf988b6SMauro Carvalho ChehabSMBus Alert 268ccf988b6SMauro Carvalho Chehab=========== 269ccf988b6SMauro Carvalho Chehab 270ccf988b6SMauro Carvalho ChehabSMBus Alert was introduced in Revision 1.0 of the specification. 271ccf988b6SMauro Carvalho Chehab 272ccf988b6SMauro Carvalho ChehabThe SMBus alert protocol allows several SMBus slave devices to share a 273ccf988b6SMauro Carvalho Chehabsingle interrupt pin on the SMBus master, while still allowing the master 274ccf988b6SMauro Carvalho Chehabto know which slave triggered the interrupt. 275ccf988b6SMauro Carvalho Chehab 276ccf988b6SMauro Carvalho ChehabThis is implemented the following way in the Linux kernel: 277ccf988b6SMauro Carvalho Chehab 278ccf988b6SMauro Carvalho Chehab* I2C bus drivers which support SMBus alert should call 279ed680522SWolfram Sang i2c_new_smbus_alert_device() to install SMBus alert support. 280ccf988b6SMauro Carvalho Chehab* I2C drivers for devices which can trigger SMBus alerts should implement 281ccf988b6SMauro Carvalho Chehab the optional alert() callback. 282ccf988b6SMauro Carvalho Chehab 283ccf988b6SMauro Carvalho Chehab 284ccf988b6SMauro Carvalho ChehabI2C Block Transactions 285ccf988b6SMauro Carvalho Chehab====================== 286ccf988b6SMauro Carvalho Chehab 28795b83774SLuca CeresoliThe following I2C block transactions are similar to the SMBus Block Read 28895b83774SLuca Ceresoliand Write operations, except these do not have a Count byte. They are 28995b83774SLuca Ceresolisupported by the SMBus layer and are described here for completeness, but 29095b83774SLuca Ceresolithey are *NOT* defined by the SMBus specification. 291ccf988b6SMauro Carvalho Chehab 292ccf988b6SMauro Carvalho ChehabI2C block transactions do not limit the number of bytes transferred 293ccf988b6SMauro Carvalho Chehabbut the SMBus layer places a limit of 32 bytes. 294ccf988b6SMauro Carvalho Chehab 295ccf988b6SMauro Carvalho Chehab 2963c13f1fbSLuca CeresoliI2C Block Read 2973c13f1fbSLuca Ceresoli============== 2983c13f1fbSLuca Ceresoli 2993c13f1fbSLuca CeresoliImplemented by i2c_smbus_read_i2c_block_data() 300ccf988b6SMauro Carvalho Chehab 301ccf988b6SMauro Carvalho ChehabThis command reads a block of bytes from a device, from a 302ccf988b6SMauro Carvalho Chehabdesignated register that is specified through the Comm byte:: 303ccf988b6SMauro Carvalho Chehab 304ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] 305bed68f4fSMiquel Raynal Sr Addr Rd [A] [Data] A [Data] A ... A [Data] NA P 306ccf988b6SMauro Carvalho Chehab 307ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_READ_I2C_BLOCK 308ccf988b6SMauro Carvalho Chehab 309ccf988b6SMauro Carvalho Chehab 3103c13f1fbSLuca CeresoliI2C Block Write 3113c13f1fbSLuca Ceresoli=============== 3123c13f1fbSLuca Ceresoli 3133c13f1fbSLuca CeresoliImplemented by i2c_smbus_write_i2c_block_data() 314ccf988b6SMauro Carvalho Chehab 315ccf988b6SMauro Carvalho ChehabThe opposite of the Block Read command, this writes bytes to 316ccf988b6SMauro Carvalho Chehaba device, to a designated register that is specified through the 317ccf988b6SMauro Carvalho ChehabComm byte. Note that command lengths of 0, 2, or more bytes are 318ccf988b6SMauro Carvalho Chehabsupported as they are indistinguishable from data. 319ccf988b6SMauro Carvalho Chehab 320ccf988b6SMauro Carvalho Chehab:: 321ccf988b6SMauro Carvalho Chehab 322ccf988b6SMauro Carvalho Chehab S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P 323ccf988b6SMauro Carvalho Chehab 324ccf988b6SMauro Carvalho ChehabFunctionality flag: I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 325