1================ 2The I2C Protocol 3================ 4 5This document is an overview of the basic I2C transactions and the kernel 6APIs to perform them. 7 8Key to symbols 9============== 10 11=============== ============================================================= 12S Start condition 13P Stop condition 14Rd/Wr (1 bit) Read/Write bit. Rd equals 1, Wr equals 0. 15A, NA (1 bit) Acknowledge (ACK) and Not Acknowledge (NACK) bit 16Addr (7 bits) I2C 7 bit address. Note that this can be expanded as usual to 17 get a 10 bit I2C address. 18Comm (8 bits) Command byte, a data byte which often selects a register on 19 the device. 20Data (8 bits) A plain data byte. Sometimes, I write DataLow, DataHigh 21 for 16 bit data. 22Count (8 bits) A data byte containing the length of a block operation. 23 24[..] Data sent by I2C device, as opposed to data sent by the 25 host adapter. 26=============== ============================================================= 27 28 29Simple send transaction 30======================= 31 32Implemented by i2c_master_send():: 33 34 S Addr Wr [A] Data [A] Data [A] ... [A] Data [A] P 35 36 37Simple receive transaction 38========================== 39 40Implemented by i2c_master_recv():: 41 42 S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P 43 44 45Combined transactions 46===================== 47 48Implemented by i2c_transfer(). 49 50They are just like the above transactions, but instead of a stop 51condition P a start condition S is sent and the transaction continues. 52An example of a byte read, followed by a byte write:: 53 54 S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P 55 56 57Modified transactions 58===================== 59 60The following modifications to the I2C protocol can also be generated by 61setting these flags for I2C messages. With the exception of I2C_M_NOSTART, they 62are usually only needed to work around device issues: 63 64I2C_M_IGNORE_NAK: 65 Normally message is interrupted immediately if there is [NA] from the 66 client. Setting this flag treats any [NA] as [A], and all of 67 message is sent. 68 These messages may still fail to SCL lo->hi timeout. 69 70I2C_M_NO_RD_ACK: 71 In a read message, master A/NA bit is skipped. 72 73I2C_M_NOSTART: 74 In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some 75 point. For example, setting I2C_M_NOSTART on the second partial message 76 generates something like:: 77 78 S Addr Rd [A] [Data] NA Data [A] P 79 80 If you set the I2C_M_NOSTART variable for the first partial message, 81 we do not generate Addr, but we do generate the start condition S. 82 This will probably confuse all other clients on your bus, so don't 83 try this. 84 85 This is often used to gather transmits from multiple data buffers in 86 system memory into something that appears as a single transfer to the 87 I2C device but may also be used between direction changes by some 88 rare devices. 89 90I2C_M_REV_DIR_ADDR: 91 This toggles the Rd/Wr flag. That is, if you want to do a write, but 92 need to emit an Rd instead of a Wr, or vice versa, you set this 93 flag. For example:: 94 95 S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P 96 97I2C_M_STOP: 98 Force a stop condition (P) after the message. Some I2C related protocols 99 like SCCB require that. Normally, you really don't want to get interrupted 100 between the messages of one transfer. 101