1ccf988b6SMauro Carvalho Chehab============
2ccf988b6SMauro Carvalho ChehabI2C Protocol
3ccf988b6SMauro Carvalho Chehab============
4ccf988b6SMauro Carvalho Chehab
5ccf988b6SMauro Carvalho ChehabThis document describes the i2c protocol. Or will, when it is finished :-)
6ccf988b6SMauro Carvalho Chehab
7ccf988b6SMauro Carvalho ChehabKey to symbols
8ccf988b6SMauro Carvalho Chehab==============
9ccf988b6SMauro Carvalho Chehab
10ccf988b6SMauro Carvalho Chehab=============== =============================================================
11ccf988b6SMauro Carvalho ChehabS     (1 bit) : Start bit
12ccf988b6SMauro Carvalho ChehabP     (1 bit) : Stop bit
13ccf988b6SMauro Carvalho ChehabRd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0.
14ccf988b6SMauro Carvalho ChehabA, NA (1 bit) : Accept and reverse accept bit.
15ccf988b6SMauro Carvalho ChehabAddr  (7 bits): I2C 7 bit address. Note that this can be expanded as usual to
16ccf988b6SMauro Carvalho Chehab                get a 10 bit I2C address.
17ccf988b6SMauro Carvalho ChehabComm  (8 bits): Command byte, a data byte which often selects a register on
18ccf988b6SMauro Carvalho Chehab                the device.
19ccf988b6SMauro Carvalho ChehabData  (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh
20ccf988b6SMauro Carvalho Chehab                for 16 bit data.
21ccf988b6SMauro Carvalho ChehabCount (8 bits): A data byte containing the length of a block operation.
22ccf988b6SMauro Carvalho Chehab
23ccf988b6SMauro Carvalho Chehab[..]:           Data sent by I2C device, as opposed to data sent by the
24ccf988b6SMauro Carvalho Chehab                host adapter.
25ccf988b6SMauro Carvalho Chehab=============== =============================================================
26ccf988b6SMauro Carvalho Chehab
27ccf988b6SMauro Carvalho Chehab
28ccf988b6SMauro Carvalho ChehabSimple send transaction
29ccf988b6SMauro Carvalho Chehab=======================
30ccf988b6SMauro Carvalho Chehab
31ccf988b6SMauro Carvalho ChehabThis corresponds to i2c_master_send::
32ccf988b6SMauro Carvalho Chehab
33ccf988b6SMauro Carvalho Chehab  S Addr Wr [A] Data [A] Data [A] ... [A] Data [A] P
34ccf988b6SMauro Carvalho Chehab
35ccf988b6SMauro Carvalho Chehab
36ccf988b6SMauro Carvalho ChehabSimple receive transaction
37ccf988b6SMauro Carvalho Chehab==========================
38ccf988b6SMauro Carvalho Chehab
39ccf988b6SMauro Carvalho ChehabThis corresponds to i2c_master_recv::
40ccf988b6SMauro Carvalho Chehab
41ccf988b6SMauro Carvalho Chehab  S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
42ccf988b6SMauro Carvalho Chehab
43ccf988b6SMauro Carvalho Chehab
44ccf988b6SMauro Carvalho ChehabCombined transactions
45ccf988b6SMauro Carvalho Chehab=====================
46ccf988b6SMauro Carvalho Chehab
47ccf988b6SMauro Carvalho ChehabThis corresponds to i2c_transfer
48ccf988b6SMauro Carvalho Chehab
49ccf988b6SMauro Carvalho ChehabThey are just like the above transactions, but instead of a stop bit P
50ccf988b6SMauro Carvalho Chehaba start bit S is sent and the transaction continues. An example of
51ccf988b6SMauro Carvalho Chehaba byte read, followed by a byte write::
52ccf988b6SMauro Carvalho Chehab
53ccf988b6SMauro Carvalho Chehab  S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P
54ccf988b6SMauro Carvalho Chehab
55ccf988b6SMauro Carvalho Chehab
56ccf988b6SMauro Carvalho ChehabModified transactions
57ccf988b6SMauro Carvalho Chehab=====================
58ccf988b6SMauro Carvalho Chehab
59ccf988b6SMauro Carvalho ChehabThe following modifications to the I2C protocol can also be generated by
60ccf988b6SMauro Carvalho Chehabsetting these flags for i2c messages. With the exception of I2C_M_NOSTART, they
61ccf988b6SMauro Carvalho Chehabare usually only needed to work around device issues:
62ccf988b6SMauro Carvalho Chehab
63ccf988b6SMauro Carvalho ChehabI2C_M_IGNORE_NAK:
64ccf988b6SMauro Carvalho Chehab    Normally message is interrupted immediately if there is [NA] from the
65ccf988b6SMauro Carvalho Chehab    client. Setting this flag treats any [NA] as [A], and all of
66ccf988b6SMauro Carvalho Chehab    message is sent.
67ccf988b6SMauro Carvalho Chehab    These messages may still fail to SCL lo->hi timeout.
68ccf988b6SMauro Carvalho Chehab
69ccf988b6SMauro Carvalho ChehabI2C_M_NO_RD_ACK:
70ccf988b6SMauro Carvalho Chehab    In a read message, master A/NA bit is skipped.
71ccf988b6SMauro Carvalho Chehab
72ccf988b6SMauro Carvalho ChehabI2C_M_NOSTART:
73ccf988b6SMauro Carvalho Chehab    In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
74ccf988b6SMauro Carvalho Chehab    point. For example, setting I2C_M_NOSTART on the second partial message
75ccf988b6SMauro Carvalho Chehab    generates something like::
76ccf988b6SMauro Carvalho Chehab
77ccf988b6SMauro Carvalho Chehab      S Addr Rd [A] [Data] NA Data [A] P
78ccf988b6SMauro Carvalho Chehab
79ccf988b6SMauro Carvalho Chehab    If you set the I2C_M_NOSTART variable for the first partial message,
80ccf988b6SMauro Carvalho Chehab    we do not generate Addr, but we do generate the startbit S. This will
81ccf988b6SMauro Carvalho Chehab    probably confuse all other clients on your bus, so don't try this.
82ccf988b6SMauro Carvalho Chehab
83ccf988b6SMauro Carvalho Chehab    This is often used to gather transmits from multiple data buffers in
84ccf988b6SMauro Carvalho Chehab    system memory into something that appears as a single transfer to the
85ccf988b6SMauro Carvalho Chehab    I2C device but may also be used between direction changes by some
86ccf988b6SMauro Carvalho Chehab    rare devices.
87ccf988b6SMauro Carvalho Chehab
88ccf988b6SMauro Carvalho ChehabI2C_M_REV_DIR_ADDR:
89ccf988b6SMauro Carvalho Chehab    This toggles the Rd/Wr flag. That is, if you want to do a write, but
90ccf988b6SMauro Carvalho Chehab    need to emit an Rd instead of a Wr, or vice versa, you set this
91ccf988b6SMauro Carvalho Chehab    flag. For example::
92ccf988b6SMauro Carvalho Chehab
93ccf988b6SMauro Carvalho Chehab      S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P
94ccf988b6SMauro Carvalho Chehab
95ccf988b6SMauro Carvalho ChehabI2C_M_STOP:
96ccf988b6SMauro Carvalho Chehab    Force a stop condition (P) after the message. Some I2C related protocols
97ccf988b6SMauro Carvalho Chehab    like SCCB require that. Normally, you really don't want to get interrupted
98ccf988b6SMauro Carvalho Chehab    between the messages of one transfer.
99