1f6fcefa1SLuca Ceresoli================
2f6fcefa1SLuca CeresoliThe I2C Protocol
3f6fcefa1SLuca Ceresoli================
4ccf988b6SMauro Carvalho Chehab
5*9bbebdf7SLuca CeresoliThis document is an overview of the basic I2C transactions and the kernel
6*9bbebdf7SLuca CeresoliAPIs to perform them.
7ccf988b6SMauro Carvalho Chehab
8ccf988b6SMauro Carvalho ChehabKey to symbols
9ccf988b6SMauro Carvalho Chehab==============
10ccf988b6SMauro Carvalho Chehab
11ccf988b6SMauro Carvalho Chehab=============== =============================================================
1202622c88SLuca CeresoliS               Start condition
1302622c88SLuca CeresoliP               Stop condition
1402622c88SLuca CeresoliRd/Wr (1 bit)   Read/Write bit. Rd equals 1, Wr equals 0.
15db0d7424SLuca CeresoliA, NA (1 bit)   Acknowledge (ACK) and Not Acknowledge (NACK) bit
1602622c88SLuca CeresoliAddr  (7 bits)  I2C 7 bit address. Note that this can be expanded as usual to
17ccf988b6SMauro Carvalho Chehab                get a 10 bit I2C address.
1802622c88SLuca CeresoliComm  (8 bits)  Command byte, a data byte which often selects a register on
19ccf988b6SMauro Carvalho Chehab                the device.
2002622c88SLuca CeresoliData  (8 bits)  A plain data byte. Sometimes, I write DataLow, DataHigh
21ccf988b6SMauro Carvalho Chehab                for 16 bit data.
2202622c88SLuca CeresoliCount (8 bits)  A data byte containing the length of a block operation.
23ccf988b6SMauro Carvalho Chehab
2402622c88SLuca Ceresoli[..]            Data sent by I2C device, as opposed to data sent by the
25ccf988b6SMauro Carvalho Chehab                host adapter.
26ccf988b6SMauro Carvalho Chehab=============== =============================================================
27ccf988b6SMauro Carvalho Chehab
28ccf988b6SMauro Carvalho Chehab
29ccf988b6SMauro Carvalho ChehabSimple send transaction
30ccf988b6SMauro Carvalho Chehab=======================
31ccf988b6SMauro Carvalho Chehab
32ca5dbb02SLuca CeresoliImplemented by i2c_master_send()::
33ccf988b6SMauro Carvalho Chehab
34ccf988b6SMauro Carvalho Chehab  S Addr Wr [A] Data [A] Data [A] ... [A] Data [A] P
35ccf988b6SMauro Carvalho Chehab
36ccf988b6SMauro Carvalho Chehab
37ccf988b6SMauro Carvalho ChehabSimple receive transaction
38ccf988b6SMauro Carvalho Chehab==========================
39ccf988b6SMauro Carvalho Chehab
40ca5dbb02SLuca CeresoliImplemented by i2c_master_recv()::
41ccf988b6SMauro Carvalho Chehab
42ccf988b6SMauro Carvalho Chehab  S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
43ccf988b6SMauro Carvalho Chehab
44ccf988b6SMauro Carvalho Chehab
45ccf988b6SMauro Carvalho ChehabCombined transactions
46ccf988b6SMauro Carvalho Chehab=====================
47ccf988b6SMauro Carvalho Chehab
48ca5dbb02SLuca CeresoliImplemented by i2c_transfer().
49ccf988b6SMauro Carvalho Chehab
50f954731dSLuca CeresoliThey are just like the above transactions, but instead of a stop
51f954731dSLuca Ceresolicondition P a start condition S is sent and the transaction continues.
52f954731dSLuca CeresoliAn example of a byte read, followed by a byte write::
53ccf988b6SMauro Carvalho Chehab
54ccf988b6SMauro Carvalho Chehab  S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P
55ccf988b6SMauro Carvalho Chehab
56ccf988b6SMauro Carvalho Chehab
57ccf988b6SMauro Carvalho ChehabModified transactions
58ccf988b6SMauro Carvalho Chehab=====================
59ccf988b6SMauro Carvalho Chehab
60ccf988b6SMauro Carvalho ChehabThe following modifications to the I2C protocol can also be generated by
612f07c05fSLuca Ceresolisetting these flags for I2C messages. With the exception of I2C_M_NOSTART, they
62ccf988b6SMauro Carvalho Chehabare usually only needed to work around device issues:
63ccf988b6SMauro Carvalho Chehab
64ccf988b6SMauro Carvalho ChehabI2C_M_IGNORE_NAK:
65ccf988b6SMauro Carvalho Chehab    Normally message is interrupted immediately if there is [NA] from the
66ccf988b6SMauro Carvalho Chehab    client. Setting this flag treats any [NA] as [A], and all of
67ccf988b6SMauro Carvalho Chehab    message is sent.
68ccf988b6SMauro Carvalho Chehab    These messages may still fail to SCL lo->hi timeout.
69ccf988b6SMauro Carvalho Chehab
70ccf988b6SMauro Carvalho ChehabI2C_M_NO_RD_ACK:
71ccf988b6SMauro Carvalho Chehab    In a read message, master A/NA bit is skipped.
72ccf988b6SMauro Carvalho Chehab
73ccf988b6SMauro Carvalho ChehabI2C_M_NOSTART:
74ccf988b6SMauro Carvalho Chehab    In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
75ccf988b6SMauro Carvalho Chehab    point. For example, setting I2C_M_NOSTART on the second partial message
76ccf988b6SMauro Carvalho Chehab    generates something like::
77ccf988b6SMauro Carvalho Chehab
78ccf988b6SMauro Carvalho Chehab      S Addr Rd [A] [Data] NA Data [A] P
79ccf988b6SMauro Carvalho Chehab
80ccf988b6SMauro Carvalho Chehab    If you set the I2C_M_NOSTART variable for the first partial message,
81f954731dSLuca Ceresoli    we do not generate Addr, but we do generate the start condition S.
82f954731dSLuca Ceresoli    This will probably confuse all other clients on your bus, so don't
83f954731dSLuca Ceresoli    try this.
84ccf988b6SMauro Carvalho Chehab
85ccf988b6SMauro Carvalho Chehab    This is often used to gather transmits from multiple data buffers in
86ccf988b6SMauro Carvalho Chehab    system memory into something that appears as a single transfer to the
87ccf988b6SMauro Carvalho Chehab    I2C device but may also be used between direction changes by some
88ccf988b6SMauro Carvalho Chehab    rare devices.
89ccf988b6SMauro Carvalho Chehab
90ccf988b6SMauro Carvalho ChehabI2C_M_REV_DIR_ADDR:
91ccf988b6SMauro Carvalho Chehab    This toggles the Rd/Wr flag. That is, if you want to do a write, but
92ccf988b6SMauro Carvalho Chehab    need to emit an Rd instead of a Wr, or vice versa, you set this
93ccf988b6SMauro Carvalho Chehab    flag. For example::
94ccf988b6SMauro Carvalho Chehab
95ccf988b6SMauro Carvalho Chehab      S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P
96ccf988b6SMauro Carvalho Chehab
97ccf988b6SMauro Carvalho ChehabI2C_M_STOP:
98ccf988b6SMauro Carvalho Chehab    Force a stop condition (P) after the message. Some I2C related protocols
99ccf988b6SMauro Carvalho Chehab    like SCCB require that. Normally, you really don't want to get interrupted
100ccf988b6SMauro Carvalho Chehab    between the messages of one transfer.
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