1#
2# Feature name:          membarrier-sync-core
3#         Kconfig:       ARCH_HAS_MEMBARRIER_SYNC_CORE
4#         description:   arch supports core serializing membarrier
5#
6# Architecture requirements
7#
8# * arm/arm64/powerpc
9#
10# Rely on implicit context synchronization as a result of exception return
11# when returning from IPI handler, and when returning to user-space.
12#
13# * x86
14#
15# x86-32 uses IRET as return from interrupt, which takes care of the IPI.
16# However, it uses both IRET and SYSEXIT to go back to user-space. The IRET
17# instruction is core serializing, but not SYSEXIT.
18#
19# x86-64 uses IRET as return from interrupt, which takes care of the IPI.
20# However, it can return to user-space through either SYSRETL (compat code),
21# SYSRETQ, or IRET.
22#
23# Given that neither SYSRET{L,Q}, nor SYSEXIT, are core serializing, we rely
24# instead on write_cr3() performed by switch_mm() to provide core serialization
25# after changing the current mm, and deal with the special case of kthread ->
26# uthread (temporarily keeping current mm into active_mm) by issuing a
27# sync_core_before_usermode() in that specific case.
28#
29    -----------------------
30    |         arch |status|
31    -----------------------
32    |       alpha: | TODO |
33    |         arc: | TODO |
34    |         arm: |  ok  |
35    |       arm64: |  ok  |
36    |        csky: | TODO |
37    |     hexagon: | TODO |
38    |        ia64: | TODO |
39    |   loongarch: | TODO |
40    |        m68k: | TODO |
41    |  microblaze: | TODO |
42    |        mips: | TODO |
43    |       nios2: | TODO |
44    |    openrisc: | TODO |
45    |      parisc: | TODO |
46    |     powerpc: |  ok  |
47    |       riscv: | TODO |
48    |        s390: | TODO |
49    |          sh: | TODO |
50    |       sparc: | TODO |
51    |          um: | TODO |
52    |         x86: |  ok  |
53    |      xtensa: | TODO |
54    -----------------------
55