1================================== 2VFIO - "Virtual Function I/O" [1]_ 3================================== 4 5Many modern systems now provide DMA and interrupt remapping facilities 6to help ensure I/O devices behave within the boundaries they've been 7allotted. This includes x86 hardware with AMD-Vi and Intel VT-d, 8POWER systems with Partitionable Endpoints (PEs) and embedded PowerPC 9systems such as Freescale PAMU. The VFIO driver is an IOMMU/device 10agnostic framework for exposing direct device access to userspace, in 11a secure, IOMMU protected environment. In other words, this allows 12safe [2]_, non-privileged, userspace drivers. 13 14Why do we want that? Virtual machines often make use of direct device 15access ("device assignment") when configured for the highest possible 16I/O performance. From a device and host perspective, this simply 17turns the VM into a userspace driver, with the benefits of 18significantly reduced latency, higher bandwidth, and direct use of 19bare-metal device drivers [3]_. 20 21Some applications, particularly in the high performance computing 22field, also benefit from low-overhead, direct device access from 23userspace. Examples include network adapters (often non-TCP/IP based) 24and compute accelerators. Prior to VFIO, these drivers had to either 25go through the full development cycle to become proper upstream 26driver, be maintained out of tree, or make use of the UIO framework, 27which has no notion of IOMMU protection, limited interrupt support, 28and requires root privileges to access things like PCI configuration 29space. 30 31The VFIO driver framework intends to unify these, replacing both the 32KVM PCI specific device assignment code as well as provide a more 33secure, more featureful userspace driver environment than UIO. 34 35Groups, Devices, and IOMMUs 36--------------------------- 37 38Devices are the main target of any I/O driver. Devices typically 39create a programming interface made up of I/O access, interrupts, 40and DMA. Without going into the details of each of these, DMA is 41by far the most critical aspect for maintaining a secure environment 42as allowing a device read-write access to system memory imposes the 43greatest risk to the overall system integrity. 44 45To help mitigate this risk, many modern IOMMUs now incorporate 46isolation properties into what was, in many cases, an interface only 47meant for translation (ie. solving the addressing problems of devices 48with limited address spaces). With this, devices can now be isolated 49from each other and from arbitrary memory access, thus allowing 50things like secure direct assignment of devices into virtual machines. 51 52This isolation is not always at the granularity of a single device 53though. Even when an IOMMU is capable of this, properties of devices, 54interconnects, and IOMMU topologies can each reduce this isolation. 55For instance, an individual device may be part of a larger multi- 56function enclosure. While the IOMMU may be able to distinguish 57between devices within the enclosure, the enclosure may not require 58transactions between devices to reach the IOMMU. Examples of this 59could be anything from a multi-function PCI device with backdoors 60between functions to a non-PCI-ACS (Access Control Services) capable 61bridge allowing redirection without reaching the IOMMU. Topology 62can also play a factor in terms of hiding devices. A PCIe-to-PCI 63bridge masks the devices behind it, making transaction appear as if 64from the bridge itself. Obviously IOMMU design plays a major factor 65as well. 66 67Therefore, while for the most part an IOMMU may have device level 68granularity, any system is susceptible to reduced granularity. The 69IOMMU API therefore supports a notion of IOMMU groups. A group is 70a set of devices which is isolatable from all other devices in the 71system. Groups are therefore the unit of ownership used by VFIO. 72 73While the group is the minimum granularity that must be used to 74ensure secure user access, it's not necessarily the preferred 75granularity. In IOMMUs which make use of page tables, it may be 76possible to share a set of page tables between different groups, 77reducing the overhead both to the platform (reduced TLB thrashing, 78reduced duplicate page tables), and to the user (programming only 79a single set of translations). For this reason, VFIO makes use of 80a container class, which may hold one or more groups. A container 81is created by simply opening the /dev/vfio/vfio character device. 82 83On its own, the container provides little functionality, with all 84but a couple version and extension query interfaces locked away. 85The user needs to add a group into the container for the next level 86of functionality. To do this, the user first needs to identify the 87group associated with the desired device. This can be done using 88the sysfs links described in the example below. By unbinding the 89device from the host driver and binding it to a VFIO driver, a new 90VFIO group will appear for the group as /dev/vfio/$GROUP, where 91$GROUP is the IOMMU group number of which the device is a member. 92If the IOMMU group contains multiple devices, each will need to 93be bound to a VFIO driver before operations on the VFIO group 94are allowed (it's also sufficient to only unbind the device from 95host drivers if a VFIO driver is unavailable; this will make the 96group available, but not that particular device). TBD - interface 97for disabling driver probing/locking a device. 98 99Once the group is ready, it may be added to the container by opening 100the VFIO group character device (/dev/vfio/$GROUP) and using the 101VFIO_GROUP_SET_CONTAINER ioctl, passing the file descriptor of the 102previously opened container file. If desired and if the IOMMU driver 103supports sharing the IOMMU context between groups, multiple groups may 104be set to the same container. If a group fails to set to a container 105with existing groups, a new empty container will need to be used 106instead. 107 108With a group (or groups) attached to a container, the remaining 109ioctls become available, enabling access to the VFIO IOMMU interfaces. 110Additionally, it now becomes possible to get file descriptors for each 111device within a group using an ioctl on the VFIO group file descriptor. 112 113The VFIO device API includes ioctls for describing the device, the I/O 114regions and their read/write/mmap offsets on the device descriptor, as 115well as mechanisms for describing and registering interrupt 116notifications. 117 118VFIO Usage Example 119------------------ 120 121Assume user wants to access PCI device 0000:06:0d.0:: 122 123 $ readlink /sys/bus/pci/devices/0000:06:0d.0/iommu_group 124 ../../../../kernel/iommu_groups/26 125 126This device is therefore in IOMMU group 26. This device is on the 127pci bus, therefore the user will make use of vfio-pci to manage the 128group:: 129 130 # modprobe vfio-pci 131 132Binding this device to the vfio-pci driver creates the VFIO group 133character devices for this group:: 134 135 $ lspci -n -s 0000:06:0d.0 136 06:0d.0 0401: 1102:0002 (rev 08) 137 # echo 0000:06:0d.0 > /sys/bus/pci/devices/0000:06:0d.0/driver/unbind 138 # echo 1102 0002 > /sys/bus/pci/drivers/vfio-pci/new_id 139 140Now we need to look at what other devices are in the group to free 141it for use by VFIO:: 142 143 $ ls -l /sys/bus/pci/devices/0000:06:0d.0/iommu_group/devices 144 total 0 145 lrwxrwxrwx. 1 root root 0 Apr 23 16:13 0000:00:1e.0 -> 146 ../../../../devices/pci0000:00/0000:00:1e.0 147 lrwxrwxrwx. 1 root root 0 Apr 23 16:13 0000:06:0d.0 -> 148 ../../../../devices/pci0000:00/0000:00:1e.0/0000:06:0d.0 149 lrwxrwxrwx. 1 root root 0 Apr 23 16:13 0000:06:0d.1 -> 150 ../../../../devices/pci0000:00/0000:00:1e.0/0000:06:0d.1 151 152This device is behind a PCIe-to-PCI bridge [4]_, therefore we also 153need to add device 0000:06:0d.1 to the group following the same 154procedure as above. Device 0000:00:1e.0 is a bridge that does 155not currently have a host driver, therefore it's not required to 156bind this device to the vfio-pci driver (vfio-pci does not currently 157support PCI bridges). 158 159The final step is to provide the user with access to the group if 160unprivileged operation is desired (note that /dev/vfio/vfio provides 161no capabilities on its own and is therefore expected to be set to 162mode 0666 by the system):: 163 164 # chown user:user /dev/vfio/26 165 166The user now has full access to all the devices and the iommu for this 167group and can access them as follows:: 168 169 int container, group, device, i; 170 struct vfio_group_status group_status = 171 { .argsz = sizeof(group_status) }; 172 struct vfio_iommu_type1_info iommu_info = { .argsz = sizeof(iommu_info) }; 173 struct vfio_iommu_type1_dma_map dma_map = { .argsz = sizeof(dma_map) }; 174 struct vfio_device_info device_info = { .argsz = sizeof(device_info) }; 175 176 /* Create a new container */ 177 container = open("/dev/vfio/vfio", O_RDWR); 178 179 if (ioctl(container, VFIO_GET_API_VERSION) != VFIO_API_VERSION) 180 /* Unknown API version */ 181 182 if (!ioctl(container, VFIO_CHECK_EXTENSION, VFIO_TYPE1_IOMMU)) 183 /* Doesn't support the IOMMU driver we want. */ 184 185 /* Open the group */ 186 group = open("/dev/vfio/26", O_RDWR); 187 188 /* Test the group is viable and available */ 189 ioctl(group, VFIO_GROUP_GET_STATUS, &group_status); 190 191 if (!(group_status.flags & VFIO_GROUP_FLAGS_VIABLE)) 192 /* Group is not viable (ie, not all devices bound for vfio) */ 193 194 /* Add the group to the container */ 195 ioctl(group, VFIO_GROUP_SET_CONTAINER, &container); 196 197 /* Enable the IOMMU model we want */ 198 ioctl(container, VFIO_SET_IOMMU, VFIO_TYPE1_IOMMU); 199 200 /* Get addition IOMMU info */ 201 ioctl(container, VFIO_IOMMU_GET_INFO, &iommu_info); 202 203 /* Allocate some space and setup a DMA mapping */ 204 dma_map.vaddr = mmap(0, 1024 * 1024, PROT_READ | PROT_WRITE, 205 MAP_PRIVATE | MAP_ANONYMOUS, 0, 0); 206 dma_map.size = 1024 * 1024; 207 dma_map.iova = 0; /* 1MB starting at 0x0 from device view */ 208 dma_map.flags = VFIO_DMA_MAP_FLAG_READ | VFIO_DMA_MAP_FLAG_WRITE; 209 210 ioctl(container, VFIO_IOMMU_MAP_DMA, &dma_map); 211 212 /* Get a file descriptor for the device */ 213 device = ioctl(group, VFIO_GROUP_GET_DEVICE_FD, "0000:06:0d.0"); 214 215 /* Test and setup the device */ 216 ioctl(device, VFIO_DEVICE_GET_INFO, &device_info); 217 218 for (i = 0; i < device_info.num_regions; i++) { 219 struct vfio_region_info reg = { .argsz = sizeof(reg) }; 220 221 reg.index = i; 222 223 ioctl(device, VFIO_DEVICE_GET_REGION_INFO, ®); 224 225 /* Setup mappings... read/write offsets, mmaps 226 * For PCI devices, config space is a region */ 227 } 228 229 for (i = 0; i < device_info.num_irqs; i++) { 230 struct vfio_irq_info irq = { .argsz = sizeof(irq) }; 231 232 irq.index = i; 233 234 ioctl(device, VFIO_DEVICE_GET_IRQ_INFO, &irq); 235 236 /* Setup IRQs... eventfds, VFIO_DEVICE_SET_IRQS */ 237 } 238 239 /* Gratuitous device reset and go... */ 240 ioctl(device, VFIO_DEVICE_RESET); 241 242VFIO User API 243------------------------------------------------------------------------------- 244 245Please see include/uapi/linux/vfio.h for complete API documentation. 246 247VFIO bus driver API 248------------------------------------------------------------------------------- 249 250VFIO bus drivers, such as vfio-pci make use of only a few interfaces 251into VFIO core. When devices are bound and unbound to the driver, 252Following interfaces are called when devices are bound to and 253unbound from the driver:: 254 255 int vfio_register_group_dev(struct vfio_device *device); 256 int vfio_register_emulated_iommu_dev(struct vfio_device *device); 257 void vfio_unregister_group_dev(struct vfio_device *device); 258 259The driver should embed the vfio_device in its own structure and use 260vfio_alloc_device() to allocate the structure, and can register 261@init/@release callbacks to manage any private state wrapping the 262vfio_device:: 263 264 vfio_alloc_device(dev_struct, member, dev, ops); 265 void vfio_put_device(struct vfio_device *device); 266 267vfio_register_group_dev() indicates to the core to begin tracking the 268iommu_group of the specified dev and register the dev as owned by a VFIO bus 269driver. Once vfio_register_group_dev() returns it is possible for userspace to 270start accessing the driver, thus the driver should ensure it is completely 271ready before calling it. The driver provides an ops structure for callbacks 272similar to a file operations structure:: 273 274 struct vfio_device_ops { 275 char *name; 276 int (*init)(struct vfio_device *vdev); 277 void (*release)(struct vfio_device *vdev); 278 int (*bind_iommufd)(struct vfio_device *vdev, 279 struct iommufd_ctx *ictx, u32 *out_device_id); 280 void (*unbind_iommufd)(struct vfio_device *vdev); 281 int (*attach_ioas)(struct vfio_device *vdev, u32 *pt_id); 282 int (*open_device)(struct vfio_device *vdev); 283 void (*close_device)(struct vfio_device *vdev); 284 ssize_t (*read)(struct vfio_device *vdev, char __user *buf, 285 size_t count, loff_t *ppos); 286 ssize_t (*write)(struct vfio_device *vdev, const char __user *buf, 287 size_t count, loff_t *size); 288 long (*ioctl)(struct vfio_device *vdev, unsigned int cmd, 289 unsigned long arg); 290 int (*mmap)(struct vfio_device *vdev, struct vm_area_struct *vma); 291 void (*request)(struct vfio_device *vdev, unsigned int count); 292 int (*match)(struct vfio_device *vdev, char *buf); 293 void (*dma_unmap)(struct vfio_device *vdev, u64 iova, u64 length); 294 int (*device_feature)(struct vfio_device *device, u32 flags, 295 void __user *arg, size_t argsz); 296 }; 297 298Each function is passed the vdev that was originally registered 299in the vfio_register_group_dev() or vfio_register_emulated_iommu_dev() 300call above. This allows the bus driver to obtain its private data using 301container_of(). 302 303:: 304 305 - The init/release callbacks are issued when vfio_device is initialized 306 and released. 307 308 - The open/close device callbacks are issued when the first 309 instance of a file descriptor for the device is created (eg. 310 via VFIO_GROUP_GET_DEVICE_FD) for a user session. 311 312 - The ioctl callback provides a direct pass through for some VFIO_DEVICE_* 313 ioctls. 314 315 - The [un]bind_iommufd callbacks are issued when the device is bound to 316 and unbound from iommufd. 317 318 - The attach_ioas callback is issued when the device is attached to an 319 IOAS managed by the bound iommufd. The attached IOAS is automatically 320 detached when the device is unbound from iommufd. 321 322 - The read/write/mmap callbacks implement the device region access defined 323 by the device's own VFIO_DEVICE_GET_REGION_INFO ioctl. 324 325 - The request callback is issued when device is going to be unregistered, 326 such as when trying to unbind the device from the vfio bus driver. 327 328 - The dma_unmap callback is issued when a range of iovas are unmapped 329 in the container or IOAS attached by the device. Drivers which make 330 use of the vfio page pinning interface must implement this callback in 331 order to unpin pages within the dma_unmap range. Drivers must tolerate 332 this callback even before calls to open_device(). 333 334PPC64 sPAPR implementation note 335------------------------------- 336 337This implementation has some specifics: 338 3391) On older systems (POWER7 with P5IOC2/IODA1) only one IOMMU group per 340 container is supported as an IOMMU table is allocated at the boot time, 341 one table per a IOMMU group which is a Partitionable Endpoint (PE) 342 (PE is often a PCI domain but not always). 343 344 Newer systems (POWER8 with IODA2) have improved hardware design which allows 345 to remove this limitation and have multiple IOMMU groups per a VFIO 346 container. 347 3482) The hardware supports so called DMA windows - the PCI address range 349 within which DMA transfer is allowed, any attempt to access address space 350 out of the window leads to the whole PE isolation. 351 3523) PPC64 guests are paravirtualized but not fully emulated. There is an API 353 to map/unmap pages for DMA, and it normally maps 1..32 pages per call and 354 currently there is no way to reduce the number of calls. In order to make 355 things faster, the map/unmap handling has been implemented in real mode 356 which provides an excellent performance which has limitations such as 357 inability to do locked pages accounting in real time. 358 3594) According to sPAPR specification, A Partitionable Endpoint (PE) is an I/O 360 subtree that can be treated as a unit for the purposes of partitioning and 361 error recovery. A PE may be a single or multi-function IOA (IO Adapter), a 362 function of a multi-function IOA, or multiple IOAs (possibly including 363 switch and bridge structures above the multiple IOAs). PPC64 guests detect 364 PCI errors and recover from them via EEH RTAS services, which works on the 365 basis of additional ioctl commands. 366 367 So 4 additional ioctls have been added: 368 369 VFIO_IOMMU_SPAPR_TCE_GET_INFO 370 returns the size and the start of the DMA window on the PCI bus. 371 372 VFIO_IOMMU_ENABLE 373 enables the container. The locked pages accounting 374 is done at this point. This lets user first to know what 375 the DMA window is and adjust rlimit before doing any real job. 376 377 VFIO_IOMMU_DISABLE 378 disables the container. 379 380 VFIO_EEH_PE_OP 381 provides an API for EEH setup, error detection and recovery. 382 383 The code flow from the example above should be slightly changed:: 384 385 struct vfio_eeh_pe_op pe_op = { .argsz = sizeof(pe_op), .flags = 0 }; 386 387 ..... 388 /* Add the group to the container */ 389 ioctl(group, VFIO_GROUP_SET_CONTAINER, &container); 390 391 /* Enable the IOMMU model we want */ 392 ioctl(container, VFIO_SET_IOMMU, VFIO_SPAPR_TCE_IOMMU) 393 394 /* Get addition sPAPR IOMMU info */ 395 vfio_iommu_spapr_tce_info spapr_iommu_info; 396 ioctl(container, VFIO_IOMMU_SPAPR_TCE_GET_INFO, &spapr_iommu_info); 397 398 if (ioctl(container, VFIO_IOMMU_ENABLE)) 399 /* Cannot enable container, may be low rlimit */ 400 401 /* Allocate some space and setup a DMA mapping */ 402 dma_map.vaddr = mmap(0, 1024 * 1024, PROT_READ | PROT_WRITE, 403 MAP_PRIVATE | MAP_ANONYMOUS, 0, 0); 404 405 dma_map.size = 1024 * 1024; 406 dma_map.iova = 0; /* 1MB starting at 0x0 from device view */ 407 dma_map.flags = VFIO_DMA_MAP_FLAG_READ | VFIO_DMA_MAP_FLAG_WRITE; 408 409 /* Check here is .iova/.size are within DMA window from spapr_iommu_info */ 410 ioctl(container, VFIO_IOMMU_MAP_DMA, &dma_map); 411 412 /* Get a file descriptor for the device */ 413 device = ioctl(group, VFIO_GROUP_GET_DEVICE_FD, "0000:06:0d.0"); 414 415 .... 416 417 /* Gratuitous device reset and go... */ 418 ioctl(device, VFIO_DEVICE_RESET); 419 420 /* Make sure EEH is supported */ 421 ioctl(container, VFIO_CHECK_EXTENSION, VFIO_EEH); 422 423 /* Enable the EEH functionality on the device */ 424 pe_op.op = VFIO_EEH_PE_ENABLE; 425 ioctl(container, VFIO_EEH_PE_OP, &pe_op); 426 427 /* You're suggested to create additional data struct to represent 428 * PE, and put child devices belonging to same IOMMU group to the 429 * PE instance for later reference. 430 */ 431 432 /* Check the PE's state and make sure it's in functional state */ 433 pe_op.op = VFIO_EEH_PE_GET_STATE; 434 ioctl(container, VFIO_EEH_PE_OP, &pe_op); 435 436 /* Save device state using pci_save_state(). 437 * EEH should be enabled on the specified device. 438 */ 439 440 .... 441 442 /* Inject EEH error, which is expected to be caused by 32-bits 443 * config load. 444 */ 445 pe_op.op = VFIO_EEH_PE_INJECT_ERR; 446 pe_op.err.type = EEH_ERR_TYPE_32; 447 pe_op.err.func = EEH_ERR_FUNC_LD_CFG_ADDR; 448 pe_op.err.addr = 0ul; 449 pe_op.err.mask = 0ul; 450 ioctl(container, VFIO_EEH_PE_OP, &pe_op); 451 452 .... 453 454 /* When 0xFF's returned from reading PCI config space or IO BARs 455 * of the PCI device. Check the PE's state to see if that has been 456 * frozen. 457 */ 458 ioctl(container, VFIO_EEH_PE_OP, &pe_op); 459 460 /* Waiting for pending PCI transactions to be completed and don't 461 * produce any more PCI traffic from/to the affected PE until 462 * recovery is finished. 463 */ 464 465 /* Enable IO for the affected PE and collect logs. Usually, the 466 * standard part of PCI config space, AER registers are dumped 467 * as logs for further analysis. 468 */ 469 pe_op.op = VFIO_EEH_PE_UNFREEZE_IO; 470 ioctl(container, VFIO_EEH_PE_OP, &pe_op); 471 472 /* 473 * Issue PE reset: hot or fundamental reset. Usually, hot reset 474 * is enough. However, the firmware of some PCI adapters would 475 * require fundamental reset. 476 */ 477 pe_op.op = VFIO_EEH_PE_RESET_HOT; 478 ioctl(container, VFIO_EEH_PE_OP, &pe_op); 479 pe_op.op = VFIO_EEH_PE_RESET_DEACTIVATE; 480 ioctl(container, VFIO_EEH_PE_OP, &pe_op); 481 482 /* Configure the PCI bridges for the affected PE */ 483 pe_op.op = VFIO_EEH_PE_CONFIGURE; 484 ioctl(container, VFIO_EEH_PE_OP, &pe_op); 485 486 /* Restored state we saved at initialization time. pci_restore_state() 487 * is good enough as an example. 488 */ 489 490 /* Hopefully, error is recovered successfully. Now, you can resume to 491 * start PCI traffic to/from the affected PE. 492 */ 493 494 .... 495 4965) There is v2 of SPAPR TCE IOMMU. It deprecates VFIO_IOMMU_ENABLE/ 497 VFIO_IOMMU_DISABLE and implements 2 new ioctls: 498 VFIO_IOMMU_SPAPR_REGISTER_MEMORY and VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY 499 (which are unsupported in v1 IOMMU). 500 501 PPC64 paravirtualized guests generate a lot of map/unmap requests, 502 and the handling of those includes pinning/unpinning pages and updating 503 mm::locked_vm counter to make sure we do not exceed the rlimit. 504 The v2 IOMMU splits accounting and pinning into separate operations: 505 506 - VFIO_IOMMU_SPAPR_REGISTER_MEMORY/VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY ioctls 507 receive a user space address and size of the block to be pinned. 508 Bisecting is not supported and VFIO_IOMMU_UNREGISTER_MEMORY is expected to 509 be called with the exact address and size used for registering 510 the memory block. The userspace is not expected to call these often. 511 The ranges are stored in a linked list in a VFIO container. 512 513 - VFIO_IOMMU_MAP_DMA/VFIO_IOMMU_UNMAP_DMA ioctls only update the actual 514 IOMMU table and do not do pinning; instead these check that the userspace 515 address is from pre-registered range. 516 517 This separation helps in optimizing DMA for guests. 518 5196) sPAPR specification allows guests to have an additional DMA window(s) on 520 a PCI bus with a variable page size. Two ioctls have been added to support 521 this: VFIO_IOMMU_SPAPR_TCE_CREATE and VFIO_IOMMU_SPAPR_TCE_REMOVE. 522 The platform has to support the functionality or error will be returned to 523 the userspace. The existing hardware supports up to 2 DMA windows, one is 524 2GB long, uses 4K pages and called "default 32bit window"; the other can 525 be as big as entire RAM, use different page size, it is optional - guests 526 create those in run-time if the guest driver supports 64bit DMA. 527 528 VFIO_IOMMU_SPAPR_TCE_CREATE receives a page shift, a DMA window size and 529 a number of TCE table levels (if a TCE table is going to be big enough and 530 the kernel may not be able to allocate enough of physically contiguous 531 memory). It creates a new window in the available slot and returns the bus 532 address where the new window starts. Due to hardware limitation, the user 533 space cannot choose the location of DMA windows. 534 535 VFIO_IOMMU_SPAPR_TCE_REMOVE receives the bus start address of the window 536 and removes it. 537 538------------------------------------------------------------------------------- 539 540.. [1] VFIO was originally an acronym for "Virtual Function I/O" in its 541 initial implementation by Tom Lyon while as Cisco. We've since 542 outgrown the acronym, but it's catchy. 543 544.. [2] "safe" also depends upon a device being "well behaved". It's 545 possible for multi-function devices to have backdoors between 546 functions and even for single function devices to have alternative 547 access to things like PCI config space through MMIO registers. To 548 guard against the former we can include additional precautions in the 549 IOMMU driver to group multi-function PCI devices together 550 (iommu=group_mf). The latter we can't prevent, but the IOMMU should 551 still provide isolation. For PCI, SR-IOV Virtual Functions are the 552 best indicator of "well behaved", as these are designed for 553 virtualization usage models. 554 555.. [3] As always there are trade-offs to virtual machine device 556 assignment that are beyond the scope of VFIO. It's expected that 557 future IOMMU technologies will reduce some, but maybe not all, of 558 these trade-offs. 559 560.. [4] In this case the device is below a PCI bridge, so transactions 561 from either function of the device are indistinguishable to the iommu:: 562 563 -[0000:00]-+-1e.0-[06]--+-0d.0 564 \-0d.1 565 566 00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev 90) 567