1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/watchdog/snps,dw-wdt.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Synopsys Designware Watchdog Timer 8 9allOf: 10 - $ref: "watchdog.yaml#" 11 12maintainers: 13 - Jamie Iles <jamie@jamieiles.com> 14 15properties: 16 compatible: 17 oneOf: 18 - const: snps,dw-wdt 19 - items: 20 - enum: 21 - rockchip,px30-wdt 22 - rockchip,rk3066-wdt 23 - rockchip,rk3188-wdt 24 - rockchip,rk3228-wdt 25 - rockchip,rk3288-wdt 26 - rockchip,rk3308-wdt 27 - rockchip,rk3328-wdt 28 - rockchip,rk3368-wdt 29 - rockchip,rk3399-wdt 30 - rockchip,rv1108-wdt 31 - const: snps,dw-wdt 32 33 reg: 34 maxItems: 1 35 36 interrupts: 37 description: DW Watchdog pre-timeout interrupt 38 maxItems: 1 39 40 clocks: 41 minItems: 1 42 items: 43 - description: Watchdog timer reference clock 44 - description: APB3 interface clock 45 46 clock-names: 47 minItems: 1 48 items: 49 - const: tclk 50 - const: pclk 51 52 resets: 53 description: Phandle to the DW Watchdog reset lane 54 maxItems: 1 55 56 snps,watchdog-tops: 57 $ref: /schemas/types.yaml#/definitions/uint32-array 58 description: | 59 DW APB Watchdog custom timer intervals - Timeout Period ranges (TOPs). 60 Each TOP is a number loaded into the watchdog counter at the moment of 61 the timer restart. The counter decrementing happens each tick of the 62 reference clock. Therefore the TOPs array is equivalent to an array of 63 the timer expiration intervals supported by the DW APB Watchdog. Note 64 DW APB Watchdog IP-core might be synthesized with fixed TOP values, 65 in which case this property is unnecessary with default TOPs utilized. 66 default: [0x0001000 0x0002000 0x0004000 0x0008000 67 0x0010000 0x0020000 0x0040000 0x0080000 68 0x0100000 0x0200000 0x0400000 0x0800000 69 0x1000000 0x2000000 0x4000000 0x8000000] 70 minItems: 16 71 maxItems: 16 72 73unevaluatedProperties: false 74 75required: 76 - compatible 77 - reg 78 - clocks 79 80examples: 81 - | 82 watchdog@ffd02000 { 83 compatible = "snps,dw-wdt"; 84 reg = <0xffd02000 0x1000>; 85 interrupts = <0 171 4>; 86 clocks = <&per_base_clk>; 87 resets = <&wdt_rst>; 88 }; 89 90 - | 91 watchdog@ffd02000 { 92 compatible = "snps,dw-wdt"; 93 reg = <0xffd02000 0x1000>; 94 interrupts = <0 171 4>; 95 clocks = <&per_base_clk>; 96 clock-names = "tclk"; 97 snps,watchdog-tops = <0x000000FF 0x000001FF 0x000003FF 98 0x000007FF 0x0000FFFF 0x0001FFFF 99 0x0003FFFF 0x0007FFFF 0x000FFFFF 100 0x001FFFFF 0x003FFFFF 0x007FFFFF 101 0x00FFFFFF 0x01FFFFFF 0x03FFFFFF 102 0x07FFFFFF>; 103 }; 104... 105