1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/watchdog/renesas,wdt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas Watchdog Timer (WDT) Controller
8
9maintainers:
10  - Wolfram Sang <wsa+renesas@sang-engineering.com>
11  - Geert Uytterhoeven <geert+renesas@glider.be>
12
13properties:
14  compatible:
15    oneOf:
16      - items:
17          - enum:
18              - renesas,r7s72100-wdt     # RZ/A1
19              - renesas,r7s9210-wdt      # RZ/A2
20          - const: renesas,rza-wdt       # RZ/A
21
22      - items:
23          - enum:
24              - renesas,r9a07g044-wdt    # RZ/G2{L,LC}
25          - const: renesas,rzg2l-wdt     # RZ/G2L
26
27      - items:
28          - enum:
29              - renesas,r8a7742-wdt      # RZ/G1H
30              - renesas,r8a7743-wdt      # RZ/G1M
31              - renesas,r8a7744-wdt      # RZ/G1N
32              - renesas,r8a7745-wdt      # RZ/G1E
33              - renesas,r8a77470-wdt     # RZ/G1C
34              - renesas,r8a7790-wdt      # R-Car H2
35              - renesas,r8a7791-wdt      # R-Car M2-W
36              - renesas,r8a7792-wdt      # R-Car V2H
37              - renesas,r8a7793-wdt      # R-Car M2-N
38              - renesas,r8a7794-wdt      # R-Car E2
39          - const: renesas,rcar-gen2-wdt # R-Car Gen2 and RZ/G1
40
41      - items:
42          - enum:
43              - renesas,r8a774a1-wdt     # RZ/G2M
44              - renesas,r8a774b1-wdt     # RZ/G2N
45              - renesas,r8a774c0-wdt     # RZ/G2E
46              - renesas,r8a774e1-wdt     # RZ/G2H
47              - renesas,r8a7795-wdt      # R-Car H3
48              - renesas,r8a7796-wdt      # R-Car M3-W
49              - renesas,r8a77961-wdt     # R-Car M3-W+
50              - renesas,r8a77965-wdt     # R-Car M3-N
51              - renesas,r8a77970-wdt     # R-Car V3M
52              - renesas,r8a77980-wdt     # R-Car V3H
53              - renesas,r8a77990-wdt     # R-Car E3
54              - renesas,r8a77995-wdt     # R-Car D3
55              - renesas,r8a779a0-wdt     # R-Car V3U
56          - const: renesas,rcar-gen3-wdt # R-Car Gen3 and RZ/G2
57
58      - items:
59          - enum:
60              - renesas,r8a779f0-wdt     # R-Car S4-8
61          - const: renesas,rcar-gen4-wdt # R-Car Gen4
62
63  reg:
64    maxItems: 1
65
66  interrupts: true
67
68  interrupt-names: true
69
70  clocks: true
71
72  clock-names: true
73
74  power-domains:
75    maxItems: 1
76
77  resets:
78    maxItems: 1
79
80  timeout-sec: true
81
82required:
83  - compatible
84  - reg
85  - clocks
86
87allOf:
88  - $ref: "watchdog.yaml#"
89
90  - if:
91      not:
92        properties:
93          compatible:
94            contains:
95              enum:
96                - renesas,rza-wdt
97    then:
98      required:
99        - power-domains
100        - resets
101
102  - if:
103      properties:
104        compatible:
105          contains:
106            enum:
107              - renesas,rzg2l-wdt
108    then:
109      properties:
110        interrupts:
111          maxItems: 2
112        interrupt-names:
113          items:
114            - const: wdt
115            - const: perrout
116        clocks:
117          items:
118            - description: Register access clock
119            - description: Main clock
120        clock-names:
121          items:
122            - const: pclk
123            - const: oscclk
124      required:
125        - clock-names
126        - interrupt-names
127    else:
128      properties:
129        interrupts:
130          maxItems: 1
131        clocks:
132          maxItems: 1
133
134additionalProperties: false
135
136examples:
137  - |
138    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
139    #include <dt-bindings/power/r8a7795-sysc.h>
140    wdt0: watchdog@e6020000 {
141            compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
142            reg = <0xe6020000 0x0c>;
143            clocks = <&cpg CPG_MOD 402>;
144            power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
145            resets = <&cpg 402>;
146            timeout-sec = <60>;
147    };
148