1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/watchdog/qcom-wdt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Krait Processor Sub-system (KPSS) Watchdog timer
8
9maintainers:
10  - Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
11
12properties:
13  $nodename:
14    pattern: "^(watchdog|timer)@[0-9a-f]+$"
15
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - qcom,kpss-wdt-ipq4019
21              - qcom,apss-wdt-msm8994
22              - qcom,apss-wdt-qcs404
23              - qcom,apss-wdt-sa8775p
24              - qcom,apss-wdt-sc7180
25              - qcom,apss-wdt-sc7280
26              - qcom,apss-wdt-sc8180x
27              - qcom,apss-wdt-sc8280xp
28              - qcom,apss-wdt-sdm845
29              - qcom,apss-wdt-sdx55
30              - qcom,apss-wdt-sdx65
31              - qcom,apss-wdt-sm6350
32              - qcom,apss-wdt-sm8150
33              - qcom,apss-wdt-sm8250
34          - const: qcom,kpss-wdt
35      - const: qcom,kpss-wdt
36        deprecated: true
37      - items:
38          - const: qcom,scss-timer
39          - const: qcom,msm-timer
40      - items:
41          - enum:
42              - qcom,kpss-wdt-apq8064
43              - qcom,kpss-wdt-ipq8064
44              - qcom,kpss-wdt-mdm9615
45              - qcom,kpss-wdt-msm8960
46          - const: qcom,kpss-timer
47          - const: qcom,msm-timer
48
49  reg:
50    maxItems: 1
51
52  clocks:
53    maxItems: 1
54
55  clock-names:
56    items:
57      - const: sleep
58
59  clock-frequency:
60    description:
61      The frequency of the general purpose timer in Hz.
62
63  cpu-offset:
64    $ref: /schemas/types.yaml#/definitions/uint32
65    description:
66      Per-CPU offset used when the timer is accessed without the CPU remapping
67      facilities. The offset is cpu-offset + (0x10000 * cpu-nr).
68
69  interrupts:
70    minItems: 1
71    maxItems: 5
72
73required:
74  - compatible
75  - reg
76  - clocks
77
78allOf:
79  - $ref: watchdog.yaml#
80
81  - if:
82      properties:
83        compatible:
84          contains:
85            const: qcom,kpss-wdt
86    then:
87      properties:
88        clock-frequency: false
89        cpu-offset: false
90        interrupts:
91          minItems: 1
92          items:
93            - description: Bark
94            - description: Bite
95
96    else:
97      properties:
98        interrupts:
99          minItems: 3
100          items:
101            - description: Debug
102            - description: First general purpose timer
103            - description: Second general purpose timer
104            - description: First watchdog
105            - description: Second watchdog
106      required:
107        - clock-frequency
108
109unevaluatedProperties: false
110
111examples:
112  - |
113    #include <dt-bindings/interrupt-controller/arm-gic.h>
114
115    watchdog@17c10000 {
116      compatible = "qcom,apss-wdt-sm8150", "qcom,kpss-wdt";
117      reg = <0x17c10000 0x1000>;
118      clocks = <&sleep_clk>;
119      interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
120      timeout-sec = <10>;
121    };
122
123  - |
124    #include <dt-bindings/interrupt-controller/arm-gic.h>
125
126    watchdog@200a000 {
127      compatible = "qcom,kpss-wdt-ipq8064", "qcom,kpss-timer", "qcom,msm-timer";
128      interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
129                   <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
130                   <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
131                   <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
132                   <GIC_PPI 5 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
133      reg = <0x0200a000 0x100>;
134      clock-frequency = <25000000>;
135      clocks = <&sleep_clk>;
136      clock-names = "sleep";
137      cpu-offset = <0x80000>;
138    };
139