1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/watchdog/qcom-wdt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Krait Processor Sub-system (KPSS) Watchdog timer
8
9maintainers:
10  - Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
11
12properties:
13  $nodename:
14    pattern: "^(watchdog|timer)@[0-9a-f]+$"
15
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - qcom,kpss-wdt-ipq4019
21              - qcom,apss-wdt-ipq5018
22              - qcom,apss-wdt-ipq5332
23              - qcom,apss-wdt-ipq9574
24              - qcom,apss-wdt-msm8994
25              - qcom,apss-wdt-qcm2290
26              - qcom,apss-wdt-qcs404
27              - qcom,apss-wdt-sa8775p
28              - qcom,apss-wdt-sc7180
29              - qcom,apss-wdt-sc7280
30              - qcom,apss-wdt-sc8180x
31              - qcom,apss-wdt-sc8280xp
32              - qcom,apss-wdt-sdm845
33              - qcom,apss-wdt-sdx55
34              - qcom,apss-wdt-sdx65
35              - qcom,apss-wdt-sm6115
36              - qcom,apss-wdt-sm6350
37              - qcom,apss-wdt-sm8150
38              - qcom,apss-wdt-sm8250
39          - const: qcom,kpss-wdt
40      - const: qcom,kpss-wdt
41        deprecated: true
42      - items:
43          - const: qcom,scss-timer
44          - const: qcom,msm-timer
45      - items:
46          - enum:
47              - qcom,kpss-wdt-apq8064
48              - qcom,kpss-wdt-ipq8064
49              - qcom,kpss-wdt-mdm9615
50              - qcom,kpss-wdt-msm8960
51          - const: qcom,kpss-timer
52          - const: qcom,msm-timer
53
54  reg:
55    maxItems: 1
56
57  clocks:
58    maxItems: 1
59
60  clock-names:
61    items:
62      - const: sleep
63
64  clock-frequency:
65    description:
66      The frequency of the general purpose timer in Hz.
67
68  cpu-offset:
69    $ref: /schemas/types.yaml#/definitions/uint32
70    description:
71      Per-CPU offset used when the timer is accessed without the CPU remapping
72      facilities. The offset is cpu-offset + (0x10000 * cpu-nr).
73
74  interrupts:
75    minItems: 1
76    maxItems: 5
77
78required:
79  - compatible
80  - reg
81  - clocks
82
83allOf:
84  - $ref: watchdog.yaml#
85
86  - if:
87      properties:
88        compatible:
89          contains:
90            const: qcom,kpss-wdt
91    then:
92      properties:
93        clock-frequency: false
94        cpu-offset: false
95        interrupts:
96          minItems: 1
97          items:
98            - description: Bark
99            - description: Bite
100
101    else:
102      properties:
103        interrupts:
104          minItems: 3
105          items:
106            - description: Debug
107            - description: First general purpose timer
108            - description: Second general purpose timer
109            - description: First watchdog
110            - description: Second watchdog
111      required:
112        - clock-frequency
113
114unevaluatedProperties: false
115
116examples:
117  - |
118    #include <dt-bindings/interrupt-controller/arm-gic.h>
119
120    watchdog@17c10000 {
121        compatible = "qcom,apss-wdt-sm8150", "qcom,kpss-wdt";
122        reg = <0x17c10000 0x1000>;
123        clocks = <&sleep_clk>;
124        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
125        timeout-sec = <10>;
126    };
127
128  - |
129    #include <dt-bindings/interrupt-controller/arm-gic.h>
130
131    watchdog@200a000 {
132        compatible = "qcom,kpss-wdt-ipq8064", "qcom,kpss-timer", "qcom,msm-timer";
133        interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
134                     <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
135                     <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
136                     <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
137                     <GIC_PPI 5 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
138        reg = <0x0200a000 0x100>;
139        clock-frequency = <25000000>;
140        clocks = <&sleep_clk>;
141        clock-names = "sleep";
142        cpu-offset = <0x80000>;
143    };
144