1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/watchdog/mediatek,mtk-wdt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek SoCs Watchdog timer
8
9maintainers:
10  - Matthias Brugger <matthias.bgg@gmail.com>
11
12description:
13  The watchdog supports a pre-timeout interrupt that fires
14  timeout-sec/2 before the expiry.
15
16allOf:
17  - $ref: watchdog.yaml#
18
19properties:
20  compatible:
21    oneOf:
22      - enum:
23          - mediatek,mt2712-wdt
24          - mediatek,mt6589-wdt
25          - mediatek,mt6795-wdt
26          - mediatek,mt7986-wdt
27          - mediatek,mt8183-wdt
28          - mediatek,mt8186-wdt
29          - mediatek,mt8188-wdt
30          - mediatek,mt8192-wdt
31          - mediatek,mt8195-wdt
32      - items:
33          - enum:
34              - mediatek,mt2701-wdt
35              - mediatek,mt6582-wdt
36              - mediatek,mt6797-wdt
37              - mediatek,mt7622-wdt
38              - mediatek,mt7623-wdt
39              - mediatek,mt7629-wdt
40              - mediatek,mt8173-wdt
41              - mediatek,mt8516-wdt
42          - const: mediatek,mt6589-wdt
43
44  reg:
45    maxItems: 1
46
47  interrupts:
48    items:
49      - description: Watchdog pre-timeout (bark) interrupt
50
51  mediatek,disable-extrst:
52    description: Disable sending output reset signal
53    type: boolean
54
55  '#reset-cells':
56    const: 1
57
58required:
59  - compatible
60  - reg
61
62unevaluatedProperties: false
63
64examples:
65  - |
66    #include <dt-bindings/interrupt-controller/arm-gic.h>
67
68    soc {
69        #address-cells = <2>;
70        #size-cells = <2>;
71
72        watchdog: watchdog@10007000 {
73            compatible = "mediatek,mt8183-wdt";
74            reg = <0 0x10007000 0 0x100>;
75            interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_LOW>;
76            mediatek,disable-extrst;
77            timeout-sec = <10>;
78            #reset-cells = <1>;
79        };
80    };
81