1*6592d293SSrinivas Neeli# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*6592d293SSrinivas Neeli%YAML 1.2
3*6592d293SSrinivas Neeli---
4*6592d293SSrinivas Neeli$id: http://devicetree.org/schemas/watchdog/cdns,wdt-r1p2.yaml#
5*6592d293SSrinivas Neeli$schema: http://devicetree.org/meta-schemas/core.yaml#
6*6592d293SSrinivas Neeli
7*6592d293SSrinivas Neelititle: Cadence watchdog timer controller
8*6592d293SSrinivas Neeli
9*6592d293SSrinivas Neelimaintainers:
10*6592d293SSrinivas Neeli  - Neeli Srinivas <srinivas.neeli@amd.com>
11*6592d293SSrinivas Neeli
12*6592d293SSrinivas Neelidescription:
13*6592d293SSrinivas Neeli  The cadence watchdog timer is used to detect and recover from
14*6592d293SSrinivas Neeli  system malfunctions. This watchdog contains 24 bit counter and
15*6592d293SSrinivas Neeli  a programmable reset period. The timeout period varies from 1 ms
16*6592d293SSrinivas Neeli  to 30 seconds while using a 100Mhz clock.
17*6592d293SSrinivas Neeli
18*6592d293SSrinivas NeeliallOf:
19*6592d293SSrinivas Neeli  - $ref: watchdog.yaml#
20*6592d293SSrinivas Neeli
21*6592d293SSrinivas Neeliproperties:
22*6592d293SSrinivas Neeli  compatible:
23*6592d293SSrinivas Neeli    enum:
24*6592d293SSrinivas Neeli      - cdns,wdt-r1p2
25*6592d293SSrinivas Neeli
26*6592d293SSrinivas Neeli  reg:
27*6592d293SSrinivas Neeli    maxItems: 1
28*6592d293SSrinivas Neeli
29*6592d293SSrinivas Neeli  clocks:
30*6592d293SSrinivas Neeli    maxItems: 1
31*6592d293SSrinivas Neeli
32*6592d293SSrinivas Neeli  interrupts:
33*6592d293SSrinivas Neeli    maxItems: 1
34*6592d293SSrinivas Neeli
35*6592d293SSrinivas Neeli  reset-on-timeout:
36*6592d293SSrinivas Neeli    type: boolean
37*6592d293SSrinivas Neeli    description: |
38*6592d293SSrinivas Neeli      If this property exists, then a reset is done when watchdog
39*6592d293SSrinivas Neeli      times out.
40*6592d293SSrinivas Neeli
41*6592d293SSrinivas Neelirequired:
42*6592d293SSrinivas Neeli  - compatible
43*6592d293SSrinivas Neeli  - reg
44*6592d293SSrinivas Neeli  - clocks
45*6592d293SSrinivas Neeli  - interrupts
46*6592d293SSrinivas Neeli
47*6592d293SSrinivas NeeliunevaluatedProperties: false
48*6592d293SSrinivas Neeli
49*6592d293SSrinivas Neeliexamples:
50*6592d293SSrinivas Neeli  - |
51*6592d293SSrinivas Neeli    #include <dt-bindings/interrupt-controller/arm-gic.h>
52*6592d293SSrinivas Neeli
53*6592d293SSrinivas Neeli    watchdog@f8005000 {
54*6592d293SSrinivas Neeli        compatible = "cdns,wdt-r1p2";
55*6592d293SSrinivas Neeli        reg = <0xf8005000 0x1000>;
56*6592d293SSrinivas Neeli        clocks = <&clkc 45>;
57*6592d293SSrinivas Neeli        interrupt-parent = <&intc>;
58*6592d293SSrinivas Neeli        interrupts = <GIC_SPI 9 IRQ_TYPE_EDGE_RISING>;
59*6592d293SSrinivas Neeli        reset-on-timeout;
60*6592d293SSrinivas Neeli        timeout-sec = <10>;
61*6592d293SSrinivas Neeli    };
62*6592d293SSrinivas Neeli...
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