1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/usb/ti,keystone-dwc3.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: TI Keystone Soc USB Controller 8 9maintainers: 10 - Roger Quadros <rogerq@ti.com> 11 12properties: 13 compatible: 14 items: 15 - enum: 16 - ti,keystone-dwc3 17 - ti,am654-dwc3 18 19 reg: 20 maxItems: 1 21 22 '#address-cells': 23 const: 1 24 25 '#size-cells': 26 const: 1 27 28 ranges: true 29 30 interrupts: 31 maxItems: 1 32 33 clocks: 34 minItems: 1 35 maxItems: 2 36 37 assigned-clocks: 38 minItems: 1 39 maxItems: 2 40 41 assigned-clock-parents: 42 minItems: 1 43 maxItems: 2 44 45 power-domains: 46 description: Should contain a phandle to a PM domain provider node 47 and an args specifier containing the USB device id 48 value. This property is as per the binding, 49 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt 50 51 phys: 52 description: 53 PHY specifier for the USB3.0 PHY. Some SoCs need the USB3.0 PHY 54 to be turned on before the controller. 55 Documentation/devicetree/bindings/phy/phy-bindings.txt 56 57 phy-names: 58 items: 59 - const: usb3-phy 60 61 dma-coherent: true 62 63 dma-ranges: true 64 65patternProperties: 66 "usb@[a-f0-9]+$": 67 $ref: snps,dwc3.yaml# 68 69required: 70 - compatible 71 - reg 72 - "#address-cells" 73 - "#size-cells" 74 - ranges 75 - interrupts 76 77additionalProperties: false 78 79examples: 80 - | 81 #include <dt-bindings/interrupt-controller/arm-gic.h> 82 83 dwc3@2680000 { 84 compatible = "ti,keystone-dwc3"; 85 #address-cells = <1>; 86 #size-cells = <1>; 87 reg = <0x2680000 0x10000>; 88 clocks = <&clkusb>; 89 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; 90 ranges; 91 92 usb@2690000 { 93 compatible = "synopsys,dwc3"; 94 reg = <0x2690000 0x70000>; 95 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; 96 usb-phy = <&usb_phy>, <&usb_phy>; 97 }; 98 }; 99