1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/usb/ti,keystone-dwc3.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: TI Keystone Soc USB Controller 8 9maintainers: 10 - Roger Quadros <rogerq@ti.com> 11 12properties: 13 compatible: 14 oneOf: 15 - const: "ti,keystone-dwc3" 16 - const: "ti,am654-dwc3" 17 18 reg: 19 maxItems: 1 20 description: Address and length of the register set for the USB subsystem on 21 the SOC. 22 23 interrupts: 24 maxItems: 1 25 description: The irq number of this device that is used to interrupt the MPU. 26 27 28 clocks: 29 description: Clock ID for USB functional clock. 30 31 power-domains: 32 description: Should contain a phandle to a PM domain provider node 33 and an args specifier containing the USB device id 34 value. This property is as per the binding, 35 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt 36 37 phys: 38 description: 39 PHY specifier for the USB3.0 PHY. Some SoCs need the USB3.0 PHY 40 to be turned on before the controller. 41 Documentation/devicetree/bindings/phy/phy-bindings.txt 42 43 phy-names: 44 items: 45 - const: "usb3-phy" 46 47 dwc3: 48 description: This is the node representing the DWC3 controller instance 49 Documentation/devicetree/bindings/usb/dwc3.txt 50 51required: 52 - compatible 53 - reg 54 - interrupts 55 - clocks 56 57examples: 58 - | 59 #include <dt-bindings/interrupt-controller/arm-gic.h> 60 61 usb: usb@2680000 { 62 compatible = "ti,keystone-dwc3"; 63 #address-cells = <1>; 64 #size-cells = <1>; 65 reg = <0x2680000 0x10000>; 66 clocks = <&clkusb>; 67 clock-names = "usb"; 68 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; 69 ranges; 70 71 dwc3@2690000 { 72 compatible = "synopsys,dwc3"; 73 reg = <0x2690000 0x70000>; 74 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; 75 usb-phy = <&usb_phy>, <&usb_phy>; 76 }; 77 }; 78