1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/usb/ti,keystone-dwc3.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: TI Keystone Soc USB Controller 8 9maintainers: 10 - Roger Quadros <rogerq@kernel.org> 11 12properties: 13 compatible: 14 items: 15 - enum: 16 - ti,keystone-dwc3 17 - ti,am654-dwc3 18 19 reg: 20 maxItems: 1 21 22 '#address-cells': 23 const: 1 24 25 '#size-cells': 26 const: 1 27 28 ranges: true 29 30 interrupts: 31 maxItems: 1 32 33 clocks: 34 minItems: 1 35 maxItems: 2 36 37 assigned-clocks: 38 minItems: 1 39 maxItems: 2 40 41 assigned-clock-parents: 42 minItems: 1 43 maxItems: 2 44 45 power-domains: 46 maxItems: 1 47 description: Should contain a phandle to a PM domain provider node 48 and an args specifier containing the USB device id 49 value. This property is as per the binding, 50 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml 51 52 phys: 53 maxItems: 1 54 description: 55 PHY specifier for the USB3.0 PHY. Some SoCs need the USB3.0 PHY 56 to be turned on before the controller. 57 Documentation/devicetree/bindings/phy/phy-bindings.txt 58 59 phy-names: 60 items: 61 - const: usb3-phy 62 63 dma-coherent: true 64 65 dma-ranges: true 66 67patternProperties: 68 "usb@[a-f0-9]+$": 69 $ref: snps,dwc3.yaml# 70 71required: 72 - compatible 73 - reg 74 - "#address-cells" 75 - "#size-cells" 76 - ranges 77 - interrupts 78 79additionalProperties: false 80 81examples: 82 - | 83 #include <dt-bindings/interrupt-controller/arm-gic.h> 84 85 dwc3@2680000 { 86 compatible = "ti,keystone-dwc3"; 87 #address-cells = <1>; 88 #size-cells = <1>; 89 reg = <0x2680000 0x10000>; 90 clocks = <&clkusb>; 91 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; 92 ranges; 93 94 usb@2690000 { 95 compatible = "snps,dwc3"; 96 reg = <0x2690000 0x70000>; 97 interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; 98 usb-phy = <&usb_phy>, <&usb_phy>; 99 }; 100 }; 101