1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/usb/ti,j721e-usb.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: Bindings for the TI wrapper module for the Cadence USBSS-DRD controller
8
9maintainers:
10  - Roger Quadros <rogerq@ti.com>
11
12properties:
13  compatible:
14    items:
15      - const: ti,j721e-usb
16
17  reg:
18    description: module registers
19
20  power-domains:
21    description:
22       PM domain provider node and an args specifier containing
23       the USB device id value. See,
24       Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
25
26  clocks:
27    description: Clock phandles to usb2_refclk and lpm_clk
28    minItems: 2
29    maxItems: 2
30
31  clock-names:
32    items:
33      - const: ref
34      - const: lpm
35
36  ti,usb2-only:
37    description:
38      If present, it restricts the controller to USB2.0 mode of
39      operation. Must be present if USB3 PHY is not available
40      for USB.
41    type: boolean
42
43  ti,vbus-divider:
44    description:
45      Should be present if USB VBUS line is connected to the
46      VBUS pin of the SoC via a 1/3 voltage divider.
47    type: boolean
48
49required:
50  - compatible
51  - reg
52  - power-domains
53  - clocks
54  - clock-names
55
56examples:
57  - |
58    #include <dt-bindings/soc/ti,sci_pm_domain.h>
59    #include <dt-bindings/interrupt-controller/arm-gic.h>
60    cdns_usb@4104000 {
61          compatible = "ti,j721e-usb";
62          reg = <0x00 0x4104000 0x00 0x100>;
63          power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
64          clocks = <&k3_clks 288 15>, <&k3_clks 288 3>;
65          clock-names = "ref", "lpm";
66          assigned-clocks = <&k3_clks 288 15>;	/* USB2_REFCLK */
67          assigned-clock-parents = <&k3_clks 288 16>; /* HFOSC0 */
68          #address-cells = <2>;
69          #size-cells = <2>;
70
71          usb@6000000 {
72                compatible = "cdns,usb3";
73                reg = <0x00 0x6000000 0x00 0x10000>,
74                      <0x00 0x6010000 0x00 0x10000>,
75                      <0x00 0x6020000 0x00 0x10000>;
76                reg-names = "otg", "xhci", "dev";
77                interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,	/* irq.0 */
78                             <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,	/* irq.6 */
79                             <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;	/* otgirq.0 */
80                interrupt-names = "host",
81                                  "peripheral",
82                                  "otg";
83                maximum-speed = "super-speed";
84                dr_mode = "otg";
85        };
86    };
87