1*ee11ae36SAswath Govindraju# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*ee11ae36SAswath Govindraju%YAML 1.2 3*ee11ae36SAswath Govindraju--- 4*ee11ae36SAswath Govindraju$id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml# 5*ee11ae36SAswath Govindraju$schema: http://devicetree.org/meta-schemas/core.yaml# 6*ee11ae36SAswath Govindraju 7*ee11ae36SAswath Govindrajutitle: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller 8*ee11ae36SAswath Govindraju 9*ee11ae36SAswath Govindrajumaintainers: 10*ee11ae36SAswath Govindraju - Aswath Govindraju <a-govindraju@ti.com> 11*ee11ae36SAswath Govindraju 12*ee11ae36SAswath Govindrajuproperties: 13*ee11ae36SAswath Govindraju compatible: 14*ee11ae36SAswath Govindraju const: ti,am62-usb 15*ee11ae36SAswath Govindraju 16*ee11ae36SAswath Govindraju reg: 17*ee11ae36SAswath Govindraju maxItems: 1 18*ee11ae36SAswath Govindraju 19*ee11ae36SAswath Govindraju ranges: true 20*ee11ae36SAswath Govindraju 21*ee11ae36SAswath Govindraju power-domains: 22*ee11ae36SAswath Govindraju description: 23*ee11ae36SAswath Govindraju PM domain provider node and an args specifier containing 24*ee11ae36SAswath Govindraju the USB ISO device id value. See, 25*ee11ae36SAswath Govindraju Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml 26*ee11ae36SAswath Govindraju maxItems: 1 27*ee11ae36SAswath Govindraju 28*ee11ae36SAswath Govindraju clocks: 29*ee11ae36SAswath Govindraju description: Clock phandle to usb2_refclk 30*ee11ae36SAswath Govindraju maxItems: 1 31*ee11ae36SAswath Govindraju 32*ee11ae36SAswath Govindraju clock-names: 33*ee11ae36SAswath Govindraju items: 34*ee11ae36SAswath Govindraju - const: ref 35*ee11ae36SAswath Govindraju 36*ee11ae36SAswath Govindraju ti,vbus-divider: 37*ee11ae36SAswath Govindraju description: 38*ee11ae36SAswath Govindraju Should be present if USB VBUS line is connected to the 39*ee11ae36SAswath Govindraju VBUS pin of the SoC via a 1/3 voltage divider. 40*ee11ae36SAswath Govindraju type: boolean 41*ee11ae36SAswath Govindraju 42*ee11ae36SAswath Govindraju ti,syscon-phy-pll-refclk: 43*ee11ae36SAswath Govindraju $ref: /schemas/types.yaml#/definitions/phandle-array 44*ee11ae36SAswath Govindraju items: 45*ee11ae36SAswath Govindraju - items: 46*ee11ae36SAswath Govindraju - description: Phandle to the SYSCON entry 47*ee11ae36SAswath Govindraju - description: USB phy control register offset within SYSCON 48*ee11ae36SAswath Govindraju description: 49*ee11ae36SAswath Govindraju Specifier for conveying frequency of ref clock input, for the 50*ee11ae36SAswath Govindraju operation of USB2PHY. 51*ee11ae36SAswath Govindraju 52*ee11ae36SAswath Govindraju '#address-cells': 53*ee11ae36SAswath Govindraju const: 2 54*ee11ae36SAswath Govindraju 55*ee11ae36SAswath Govindraju '#size-cells': 56*ee11ae36SAswath Govindraju const: 2 57*ee11ae36SAswath Govindraju 58*ee11ae36SAswath GovindrajupatternProperties: 59*ee11ae36SAswath Govindraju "^usb@[0-9a-f]+$": 60*ee11ae36SAswath Govindraju $ref: snps,dwc3.yaml# 61*ee11ae36SAswath Govindraju description: Required child node 62*ee11ae36SAswath Govindraju 63*ee11ae36SAswath Govindrajurequired: 64*ee11ae36SAswath Govindraju - compatible 65*ee11ae36SAswath Govindraju - reg 66*ee11ae36SAswath Govindraju - power-domains 67*ee11ae36SAswath Govindraju - clocks 68*ee11ae36SAswath Govindraju - clock-names 69*ee11ae36SAswath Govindraju - ti,syscon-phy-pll-refclk 70*ee11ae36SAswath Govindraju 71*ee11ae36SAswath GovindrajuadditionalProperties: false 72*ee11ae36SAswath Govindraju 73*ee11ae36SAswath Govindrajuexamples: 74*ee11ae36SAswath Govindraju - | 75*ee11ae36SAswath Govindraju #include <dt-bindings/soc/ti,sci_pm_domain.h> 76*ee11ae36SAswath Govindraju #include <dt-bindings/interrupt-controller/arm-gic.h> 77*ee11ae36SAswath Govindraju #include <dt-bindings/gpio/gpio.h> 78*ee11ae36SAswath Govindraju 79*ee11ae36SAswath Govindraju bus { 80*ee11ae36SAswath Govindraju #address-cells = <2>; 81*ee11ae36SAswath Govindraju #size-cells = <2>; 82*ee11ae36SAswath Govindraju 83*ee11ae36SAswath Govindraju usbss1: usb@f910000 { 84*ee11ae36SAswath Govindraju compatible = "ti,am62-usb"; 85*ee11ae36SAswath Govindraju reg = <0x00 0x0f910000 0x00 0x800>; 86*ee11ae36SAswath Govindraju clocks = <&k3_clks 162 3>; 87*ee11ae36SAswath Govindraju clock-names = "ref"; 88*ee11ae36SAswath Govindraju ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>; 89*ee11ae36SAswath Govindraju power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; 90*ee11ae36SAswath Govindraju #address-cells = <2>; 91*ee11ae36SAswath Govindraju #size-cells = <2>; 92*ee11ae36SAswath Govindraju 93*ee11ae36SAswath Govindraju usb@31100000 { 94*ee11ae36SAswath Govindraju compatible = "snps,dwc3"; 95*ee11ae36SAswath Govindraju reg = <0x00 0x31100000 0x00 0x50000>; 96*ee11ae36SAswath Govindraju interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */ 97*ee11ae36SAswath Govindraju <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */ 98*ee11ae36SAswath Govindraju interrupt-names = "host", "peripheral"; 99*ee11ae36SAswath Govindraju maximum-speed = "high-speed"; 100*ee11ae36SAswath Govindraju dr_mode = "otg"; 101*ee11ae36SAswath Govindraju }; 102*ee11ae36SAswath Govindraju }; 103*ee11ae36SAswath Govindraju }; 104