1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/usb/samsung,exynos-dwc3.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Samsung Exynos SoC USB 3.0 DWC3 Controller 8 9maintainers: 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 12properties: 13 compatible: 14 enum: 15 - samsung,exynos5250-dwusb3 16 - samsung,exynos5433-dwusb3 17 - samsung,exynos7-dwusb3 18 19 '#address-cells': 20 const: 1 21 22 clocks: 23 minItems: 1 24 maxItems: 4 25 26 clock-names: 27 minItems: 1 28 maxItems: 4 29 30 ranges: true 31 32 '#size-cells': 33 const: 1 34 35 vdd10-supply: 36 description: 1.0V power supply 37 38 vdd33-supply: 39 description: 3.0V/3.3V power supply 40 41patternProperties: 42 "^usb@[0-9a-f]+$": 43 $ref: snps,dwc3.yaml# 44 description: Required child node 45 46required: 47 - compatible 48 - '#address-cells' 49 - clocks 50 - clock-names 51 - ranges 52 - '#size-cells' 53 - vdd10-supply 54 - vdd33-supply 55 56allOf: 57 - if: 58 properties: 59 compatible: 60 contains: 61 const: samsung,exynos5250-dwusb3 62 then: 63 properties: 64 clocks: 65 minItems: 1 66 maxItems: 1 67 clock-names: 68 items: 69 - const: usbdrd30 70 71 - if: 72 properties: 73 compatible: 74 contains: 75 const: samsung,exynos54333-dwusb3 76 then: 77 properties: 78 clocks: 79 minItems: 4 80 maxItems: 4 81 clock-names: 82 items: 83 - const: aclk 84 - const: susp_clk 85 - const: pipe_pclk 86 - const: phyclk 87 88 - if: 89 properties: 90 compatible: 91 contains: 92 const: samsung,exynos7-dwusb3 93 then: 94 properties: 95 clocks: 96 minItems: 3 97 maxItems: 3 98 clock-names: 99 items: 100 - const: usbdrd30 101 - const: usbdrd30_susp_clk 102 - const: usbdrd30_axius_clk 103 104additionalProperties: false 105 106examples: 107 - | 108 #include <dt-bindings/clock/exynos5420.h> 109 #include <dt-bindings/interrupt-controller/arm-gic.h> 110 111 usb@12000000 { 112 compatible = "samsung,exynos5250-dwusb3"; 113 #address-cells = <1>; 114 #size-cells = <1>; 115 ranges = <0x0 0x12000000 0x10000>; 116 clocks = <&clock CLK_USBD300>; 117 clock-names = "usbdrd30"; 118 vdd33-supply = <&ldo9_reg>; 119 vdd10-supply = <&ldo11_reg>; 120 121 usb@0 { 122 compatible = "snps,dwc3"; 123 reg = <0x0 0x10000>; 124 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 125 phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>; 126 phy-names = "usb2-phy", "usb3-phy"; 127 snps,dis_u3_susphy_quirk; 128 }; 129 }; 130