1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SuperSpeed DWC3 USB SoC controller
8
9maintainers:
10  - Wesley Cheng <quic_wcheng@quicinc.com>
11
12properties:
13  compatible:
14    items:
15      - enum:
16          - qcom,ipq4019-dwc3
17          - qcom,ipq6018-dwc3
18          - qcom,ipq8064-dwc3
19          - qcom,ipq8074-dwc3
20          - qcom,ipq9574-dwc3
21          - qcom,msm8953-dwc3
22          - qcom,msm8994-dwc3
23          - qcom,msm8996-dwc3
24          - qcom,msm8998-dwc3
25          - qcom,qcm2290-dwc3
26          - qcom,qcs404-dwc3
27          - qcom,sc7180-dwc3
28          - qcom,sc7280-dwc3
29          - qcom,sc8280xp-dwc3
30          - qcom,sdm660-dwc3
31          - qcom,sdm670-dwc3
32          - qcom,sdm845-dwc3
33          - qcom,sdx55-dwc3
34          - qcom,sdx65-dwc3
35          - qcom,sm4250-dwc3
36          - qcom,sm6115-dwc3
37          - qcom,sm6125-dwc3
38          - qcom,sm6350-dwc3
39          - qcom,sm6375-dwc3
40          - qcom,sm8150-dwc3
41          - qcom,sm8250-dwc3
42          - qcom,sm8350-dwc3
43          - qcom,sm8450-dwc3
44          - qcom,sm8550-dwc3
45      - const: qcom,dwc3
46
47  reg:
48    description: Offset and length of register set for QSCRATCH wrapper
49    maxItems: 1
50
51  "#address-cells":
52    enum: [ 1, 2 ]
53
54  "#size-cells":
55    enum: [ 1, 2 ]
56
57  ranges: true
58
59  power-domains:
60    description: specifies a phandle to PM domain provider node
61    maxItems: 1
62
63  required-opps:
64    maxItems: 1
65
66  clocks:
67    description: |
68      Several clocks are used, depending on the variant. Typical ones are::
69       - cfg_noc:: System Config NOC clock.
70       - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >=
71                60MHz for HS operation.
72       - iface:: System bus AXI clock.
73       - sleep:: Sleep clock, used for wakeup when USB3 core goes into low
74                 power mode (U3).
75       - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host
76                     mode. Its frequency should be 19.2MHz.
77    minItems: 1
78    maxItems: 9
79
80  clock-names:
81    minItems: 1
82    maxItems: 9
83
84  assigned-clocks:
85    items:
86      - description: Phandle and clock specifier of MOCK_UTMI_CLK.
87      - description: Phandle and clock specifoer of MASTER_CLK.
88
89  assigned-clock-rates:
90    items:
91      - description: Must be 19.2MHz (19200000).
92      - description: Must be >= 60 MHz in HS mode, >= 125 MHz in SS mode.
93  resets:
94    maxItems: 1
95
96  interconnects:
97    maxItems: 2
98
99  interconnect-names:
100    items:
101      - const: usb-ddr
102      - const: apps-usb
103
104  interrupts:
105    minItems: 1
106    maxItems: 4
107
108  interrupt-names:
109    minItems: 1
110    maxItems: 4
111
112  qcom,select-utmi-as-pipe-clk:
113    description:
114      If present, disable USB3 pipe_clk requirement.
115      Used when dwc3 operates without SSPHY and only
116      HS/FS/LS modes are supported.
117    type: boolean
118
119  wakeup-source: true
120
121# Required child node:
122
123patternProperties:
124  "^usb@[0-9a-f]+$":
125    $ref: snps,dwc3.yaml#
126    unevaluatedProperties: false
127
128    properties:
129      wakeup-source: false
130
131required:
132  - compatible
133  - reg
134  - "#address-cells"
135  - "#size-cells"
136  - ranges
137  - clocks
138  - clock-names
139  - interrupts
140  - interrupt-names
141
142allOf:
143  - if:
144      properties:
145        compatible:
146          contains:
147            enum:
148              - qcom,ipq4019-dwc3
149    then:
150      properties:
151        clocks:
152          maxItems: 3
153        clock-names:
154          items:
155            - const: core
156            - const: sleep
157            - const: mock_utmi
158
159  - if:
160      properties:
161        compatible:
162          contains:
163            enum:
164              - qcom,ipq8064-dwc3
165    then:
166      properties:
167        clocks:
168          items:
169            - description: Master/Core clock, has to be >= 125 MHz
170                for SS operation and >= 60MHz for HS operation.
171        clock-names:
172          items:
173            - const: core
174
175  - if:
176      properties:
177        compatible:
178          contains:
179            enum:
180              - qcom,ipq9574-dwc3
181              - qcom,msm8953-dwc3
182              - qcom,msm8996-dwc3
183              - qcom,msm8998-dwc3
184              - qcom,sc7180-dwc3
185              - qcom,sc7280-dwc3
186              - qcom,sdm670-dwc3
187              - qcom,sdm845-dwc3
188              - qcom,sdx55-dwc3
189              - qcom,sm6350-dwc3
190    then:
191      properties:
192        clocks:
193          maxItems: 5
194        clock-names:
195          items:
196            - const: cfg_noc
197            - const: core
198            - const: iface
199            - const: sleep
200            - const: mock_utmi
201
202  - if:
203      properties:
204        compatible:
205          contains:
206            enum:
207              - qcom,ipq6018-dwc3
208    then:
209      properties:
210        clocks:
211          minItems: 3
212          maxItems: 4
213        clock-names:
214          oneOf:
215            - items:
216                - const: core
217                - const: sleep
218                - const: mock_utmi
219            - items:
220                - const: cfg_noc
221                - const: core
222                - const: sleep
223                - const: mock_utmi
224
225  - if:
226      properties:
227        compatible:
228          contains:
229            enum:
230              - qcom,ipq8074-dwc3
231    then:
232      properties:
233        clocks:
234          maxItems: 4
235        clock-names:
236          items:
237            - const: cfg_noc
238            - const: core
239            - const: sleep
240            - const: mock_utmi
241
242  - if:
243      properties:
244        compatible:
245          contains:
246            enum:
247              - qcom,msm8994-dwc3
248              - qcom,qcs404-dwc3
249    then:
250      properties:
251        clocks:
252          maxItems: 4
253        clock-names:
254          items:
255            - const: core
256            - const: iface
257            - const: sleep
258            - const: mock_utmi
259
260  - if:
261      properties:
262        compatible:
263          contains:
264            enum:
265              - qcom,sc8280xp-dwc3
266    then:
267      properties:
268        clocks:
269          maxItems: 9
270        clock-names:
271          items:
272            - const: cfg_noc
273            - const: core
274            - const: iface
275            - const: sleep
276            - const: mock_utmi
277            - const: noc_aggr
278            - const: noc_aggr_north
279            - const: noc_aggr_south
280            - const: noc_sys
281
282  - if:
283      properties:
284        compatible:
285          contains:
286            enum:
287              - qcom,sdm660-dwc3
288    then:
289      properties:
290        clocks:
291          minItems: 6
292        clock-names:
293          items:
294            - const: cfg_noc
295            - const: core
296            - const: iface
297            - const: sleep
298            - const: mock_utmi
299            - const: bus
300
301  - if:
302      properties:
303        compatible:
304          contains:
305            enum:
306              - qcom,qcm2290-dwc3
307              - qcom,sm6115-dwc3
308              - qcom,sm6125-dwc3
309              - qcom,sm8150-dwc3
310              - qcom,sm8250-dwc3
311              - qcom,sm8450-dwc3
312              - qcom,sm8550-dwc3
313    then:
314      properties:
315        clocks:
316          minItems: 6
317        clock-names:
318          items:
319            - const: cfg_noc
320            - const: core
321            - const: iface
322            - const: sleep
323            - const: mock_utmi
324            - const: xo
325
326  - if:
327      properties:
328        compatible:
329          contains:
330            enum:
331              - qcom,sm8350-dwc3
332    then:
333      properties:
334        clocks:
335          minItems: 5
336          maxItems: 6
337        clock-names:
338          minItems: 5
339          items:
340            - const: cfg_noc
341            - const: core
342            - const: iface
343            - const: sleep
344            - const: mock_utmi
345            - const: xo
346
347  - if:
348      properties:
349        compatible:
350          contains:
351            enum:
352              - qcom,ipq4019-dwc3
353              - qcom,ipq6018-dwc3
354              - qcom,ipq8064-dwc3
355              - qcom,ipq8074-dwc3
356              - qcom,msm8994-dwc3
357              - qcom,qcs404-dwc3
358              - qcom,sc7180-dwc3
359              - qcom,sdm670-dwc3
360              - qcom,sdm845-dwc3
361              - qcom,sdx55-dwc3
362              - qcom,sdx65-dwc3
363              - qcom,sm4250-dwc3
364              - qcom,sm6125-dwc3
365              - qcom,sm6350-dwc3
366              - qcom,sm8150-dwc3
367              - qcom,sm8250-dwc3
368              - qcom,sm8350-dwc3
369              - qcom,sm8450-dwc3
370              - qcom,sm8550-dwc3
371    then:
372      properties:
373        interrupts:
374          items:
375            - description: The interrupt that is asserted
376                when a wakeup event is received on USB2 bus.
377            - description: The interrupt that is asserted
378                when a wakeup event is received on USB3 bus.
379            - description: Wakeup event on DM line.
380            - description: Wakeup event on DP line.
381        interrupt-names:
382          items:
383            - const: hs_phy_irq
384            - const: ss_phy_irq
385            - const: dm_hs_phy_irq
386            - const: dp_hs_phy_irq
387
388  - if:
389      properties:
390        compatible:
391          contains:
392            enum:
393              - qcom,msm8953-dwc3
394              - qcom,msm8996-dwc3
395              - qcom,msm8998-dwc3
396              - qcom,sm6115-dwc3
397    then:
398      properties:
399        interrupts:
400          maxItems: 2
401        interrupt-names:
402          items:
403            - const: hs_phy_irq
404            - const: ss_phy_irq
405
406  - if:
407      properties:
408        compatible:
409          contains:
410            enum:
411              - qcom,sdm660-dwc3
412    then:
413      properties:
414        interrupts:
415          minItems: 1
416          maxItems: 2
417        interrupt-names:
418          minItems: 1
419          items:
420            - const: hs_phy_irq
421            - const: ss_phy_irq
422
423  - if:
424      properties:
425        compatible:
426          contains:
427            enum:
428              - qcom,sc7280-dwc3
429    then:
430      properties:
431        interrupts:
432          minItems: 3
433          maxItems: 4
434        interrupt-names:
435          minItems: 3
436          items:
437            - const: hs_phy_irq
438            - const: dp_hs_phy_irq
439            - const: dm_hs_phy_irq
440            - const: ss_phy_irq
441
442  - if:
443      properties:
444        compatible:
445          contains:
446            enum:
447              - qcom,sc8280xp-dwc3
448    then:
449      properties:
450        interrupts:
451          maxItems: 4
452        interrupt-names:
453          items:
454            - const: pwr_event
455            - const: dp_hs_phy_irq
456            - const: dm_hs_phy_irq
457            - const: ss_phy_irq
458
459additionalProperties: false
460
461examples:
462  - |
463    #include <dt-bindings/clock/qcom,gcc-sdm845.h>
464    #include <dt-bindings/interrupt-controller/arm-gic.h>
465    #include <dt-bindings/interrupt-controller/irq.h>
466    soc {
467        #address-cells = <2>;
468        #size-cells = <2>;
469
470        usb@a6f8800 {
471            compatible = "qcom,sdm845-dwc3", "qcom,dwc3";
472            reg = <0 0x0a6f8800 0 0x400>;
473
474            #address-cells = <2>;
475            #size-cells = <2>;
476            ranges;
477            clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
478                     <&gcc GCC_USB30_PRIM_MASTER_CLK>,
479                     <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
480                     <&gcc GCC_USB30_PRIM_SLEEP_CLK>,
481                     <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
482            clock-names = "cfg_noc",
483                          "core",
484                          "iface",
485                          "sleep",
486                          "mock_utmi";
487
488            assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
489                          <&gcc GCC_USB30_PRIM_MASTER_CLK>;
490            assigned-clock-rates = <19200000>, <150000000>;
491
492            interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
493                         <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
494                         <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
495                         <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
496            interrupt-names = "hs_phy_irq", "ss_phy_irq",
497                          "dm_hs_phy_irq", "dp_hs_phy_irq";
498
499            power-domains = <&gcc USB30_PRIM_GDSC>;
500
501            resets = <&gcc GCC_USB30_PRIM_BCR>;
502
503            usb@a600000 {
504                compatible = "snps,dwc3";
505                reg = <0 0x0a600000 0 0xcd00>;
506                interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
507                iommus = <&apps_smmu 0x740 0>;
508                snps,dis_u2_susphy_quirk;
509                snps,dis_enblslpm_quirk;
510                phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
511                phy-names = "usb2-phy", "usb3-phy";
512            };
513        };
514    };
515