1f3d549ddSStephen WarrenTegra SOC USB controllers 2f3d549ddSStephen Warren 3f3d549ddSStephen WarrenThe device node for a USB controller that is part of a Tegra 4f3d549ddSStephen WarrenSOC is as described in the document "Open Firmware Recommended 5f3d549ddSStephen WarrenPractice : Universal Serial Bus" with the following modifications 6f3d549ddSStephen Warrenand additions : 7f3d549ddSStephen Warren 8f3d549ddSStephen WarrenRequired properties : 9193c9d23SPaul Walmsley - compatible : For Tegra20, must contain "nvidia,tegra20-ehci". 10193c9d23SPaul Walmsley For Tegra30, must contain "nvidia,tegra30-ehci". Otherwise, must contain 11193c9d23SPaul Walmsley "nvidia,<chip>-ehci" plus at least one of the above, where <chip> is 12193c9d23SPaul Walmsley tegra114, tegra124, tegra132, or tegra210. 13d400f209SVenu Byravarasu - nvidia,phy : phandle of the PHY that the controller is connected to. 14d8f64797SStephen Warren - clocks : Must contain one entry, for the module clock. 15d8f64797SStephen Warren See ../clocks/clock-bindings.txt for details. 1607999587SStephen Warren - resets : Must contain an entry for each entry in reset-names. 1707999587SStephen Warren See ../reset/reset.txt for details. 1807999587SStephen Warren - reset-names : Must include the following entries: 1907999587SStephen Warren - usb 20f3d549ddSStephen Warren 21f3d549ddSStephen WarrenOptional properties: 22d400f209SVenu Byravarasu - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20 23b4e07478SVenu Byravarasu USB ports, which need reset twice due to hardware issues. 24